fsl_lpi2c_cmsis.c 69 KB

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  1. /*
  2. * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
  3. * Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
  4. * Copyright 2016-2017 NXP. Not a Contribution.
  5. *
  6. * SPDX-License-Identifier: Apache-2.0
  7. *
  8. * Licensed under the Apache License, Version 2.0 (the License); you may
  9. * not use this file except in compliance with the License.
  10. * You may obtain a copy of the License at
  11. *
  12. * http://www.apache.org/licenses/LICENSE-2.0
  13. *
  14. * Unless required by applicable law or agreed to in writing, software
  15. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  16. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  17. * See the License for the specific language governing permissions and
  18. * limitations under the License.
  19. */
  20. #include "fsl_lpi2c_cmsis.h"
  21. #if ((RTE_I2C0 && defined(LPI2C0)) || (RTE_I2C1 && defined(LPI2C1)) || (RTE_I2C2 && defined(LPI2C2)) || \
  22. (RTE_I2C3 && defined(LPI2C3)) || (RTE_I2C4 && defined(LPI2C4)) || (RTE_I2C5 && defined(LPI2C5)) || \
  23. (RTE_I2C6 && defined(LPI2C6)))
  24. #define ARM_LPI2C_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0)
  25. /*
  26. * ARMCC does not support split the data section automatically, so the driver
  27. * needs to split the data to separate sections explicitly, to reduce codesize.
  28. */
  29. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  30. #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
  31. #endif
  32. /*******************************************************************************
  33. * Definitions
  34. ******************************************************************************/
  35. /* Component ID definition, used by tools. */
  36. #ifndef FSL_COMPONENT_ID
  37. #define FSL_COMPONENT_ID "platform.drivers.lpi2c_cmsis"
  38. #endif
  39. /*! @brief Common sets of flags used by the driver. */
  40. enum _lpi2c_flag_constants
  41. {
  42. /*! IRQ sources enabled by the non-blocking transactional API. */
  43. kMasterIrqFlags = kLPI2C_MasterArbitrationLostFlag | kLPI2C_MasterTxReadyFlag | kLPI2C_MasterRxReadyFlag |
  44. kLPI2C_MasterStopDetectFlag | kLPI2C_MasterNackDetectFlag | kLPI2C_MasterPinLowTimeoutFlag |
  45. kLPI2C_MasterFifoErrFlag,
  46. /*! IRQ sources enabled by the non-blocking transactional API. */
  47. kSlaveIrqFlags = kLPI2C_SlaveTxReadyFlag | kLPI2C_SlaveRxReadyFlag | kLPI2C_SlaveStopDetectFlag |
  48. kLPI2C_SlaveRepeatedStartDetectFlag | kLPI2C_SlaveFifoErrFlag | kLPI2C_SlaveBitErrFlag |
  49. kLPI2C_SlaveTransmitAckFlag | kLPI2C_SlaveAddressValidFlag,
  50. };
  51. typedef const struct _cmsis_lpi2c_resource
  52. {
  53. LPI2C_Type *base; /*!< LPI2C peripheral base address. */
  54. uint32_t (*GetFreq)(void); /*!< Function to get the clock frequency. */
  55. } cmsis_lpi2c_resource_t;
  56. typedef union _cmsis_i2c_handle
  57. {
  58. lpi2c_master_handle_t master_handle;
  59. lpi2c_slave_handle_t slave_handle;
  60. } cmsis_i2c_handle_t;
  61. typedef struct _cmsis_lpi2c_interrupt_driver_state
  62. {
  63. cmsis_lpi2c_resource_t *resource; /*!< Basic LPI2C resource. */
  64. cmsis_i2c_handle_t *handle;
  65. uint8_t *slave_data; /*!< slave Transfer buffer */
  66. size_t slave_dataSize; /*!< slave Transfer size */
  67. ARM_I2C_SignalEvent_t cb_event; /*!< call back function */
  68. uint8_t flags; /*!< Control and state flags. */
  69. } cmsis_lpi2c_interrupt_driver_state_t;
  70. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  71. typedef const struct _cmsis_lpi2c_edma_resource
  72. {
  73. DMA_Type *txEdmaBase; /*!< EDMA peripheral base address for Tx. */
  74. uint32_t txEdmaChannel; /*!< EDMA channel for Tx */
  75. uint16_t txDmaRequest; /*!< Tx EDMA request source. */
  76. DMA_Type *rxEdmaBase; /*!< EDMA peripheral base address for Rx. */
  77. uint32_t rxEdmaChannel; /*!< EDMA channel for Rx */
  78. uint16_t rxDmaRequest; /*!< Rx EDMA request source. */
  79. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  80. DMAMUX_Type *txDmamuxBase; /*!< DMAMUX peripheral base address for Tx */
  81. DMAMUX_Type *rxDmamuxBase; /*!< DMAMUX peripheral base address for Rx */
  82. #endif
  83. } cmsis_lpi2c_edma_resource_t;
  84. typedef struct _cmsis_lpi2c_edma_driver_state
  85. {
  86. cmsis_lpi2c_resource_t *resource; /*!< lpi2c basic resource. */
  87. cmsis_lpi2c_edma_resource_t *edmaResource; /*!< lpi2c EDMA resource. */
  88. lpi2c_master_edma_handle_t *master_edma_handle; /*!< lpi2c EDMA transfer handle. */
  89. edma_handle_t *edmaTxHandle; /*!< EDMA lpi2c Tx handle. */
  90. edma_handle_t *edmaRxHandle; /*!< EDMA lpi2c Rx handle. */
  91. uint8_t flags; /*!< Control and state flags. */
  92. } cmsis_lpi2c_edma_driver_state_t;
  93. #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
  94. /*******************************************************************************
  95. * Prototypes
  96. ******************************************************************************/
  97. static const ARM_DRIVER_VERSION s_lpi2cDriverVersion = {ARM_I2C_API_VERSION, ARM_LPI2C_DRV_VERSION};
  98. static const ARM_I2C_CAPABILITIES s_lpi2cDriverCapabilities = {
  99. 0, /* Do not support 10-bit addressing.*/
  100. };
  101. /*******************************************************************************
  102. * Code
  103. ******************************************************************************/
  104. /* Returns version information */
  105. static ARM_DRIVER_VERSION LPI2Cx_GetVersion(void)
  106. {
  107. return s_lpi2cDriverVersion;
  108. }
  109. /* Returns information about capabilities of this driver implementation */
  110. static ARM_I2C_CAPABILITIES LPI2Cx_GetCapabilities(void)
  111. {
  112. return s_lpi2cDriverCapabilities;
  113. }
  114. #endif
  115. #if (RTE_I2C0_DMA_EN || RTE_I2C1_DMA_EN || RTE_I2C2_DMA_EN || RTE_I2C3_DMA_EN || RTE_I2C4_DMA_EN || RTE_I2C5_DMA_EN || \
  116. RTE_I2C6_DMA_EN)
  117. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  118. void KSDK_LPI2C_MASTER_EdmaCallback(LPI2C_Type *base,
  119. lpi2c_master_edma_handle_t *handle,
  120. status_t status,
  121. void *userData)
  122. {
  123. uint32_t event = 0;
  124. /* Signal transfer success when received success status. */
  125. if (status == kStatus_Success)
  126. {
  127. event = ARM_I2C_EVENT_TRANSFER_DONE;
  128. }
  129. if (userData)
  130. {
  131. ((ARM_I2C_SignalEvent_t)userData)(event);
  132. }
  133. }
  134. static int32_t LPI2C_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  135. {
  136. if (!(lpi2c->flags & I2C_FLAG_INIT))
  137. {
  138. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  139. /* TxDMAMUX init */
  140. DMAMUX_SetSource(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel,
  141. (uint8_t)lpi2c->edmaResource->txDmaRequest);
  142. DMAMUX_EnableChannel(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel);
  143. /* RxDMAMUX init */
  144. DMAMUX_SetSource(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel,
  145. (uint8_t)lpi2c->edmaResource->rxDmaRequest);
  146. DMAMUX_EnableChannel(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel);
  147. #endif
  148. /* Create edmaTxHandle */
  149. EDMA_CreateHandle(lpi2c->edmaTxHandle, lpi2c->edmaResource->txEdmaBase, lpi2c->edmaResource->txEdmaChannel);
  150. /* Create edmaRxHandle */
  151. EDMA_CreateHandle(lpi2c->edmaRxHandle, lpi2c->edmaResource->rxEdmaBase, lpi2c->edmaResource->rxEdmaChannel);
  152. /* Create master_edma_handle */
  153. LPI2C_MasterCreateEDMAHandle(lpi2c->resource->base, lpi2c->master_edma_handle, lpi2c->edmaRxHandle,
  154. lpi2c->edmaTxHandle, KSDK_LPI2C_MASTER_EdmaCallback, (void *)cb_event);
  155. lpi2c->flags = I2C_FLAG_INIT;
  156. }
  157. return ARM_DRIVER_OK;
  158. }
  159. int32_t LPI2C_Master_EdmaUninitialize(cmsis_lpi2c_edma_driver_state_t *lpi2c)
  160. {
  161. lpi2c->flags = I2C_FLAG_UNINIT;
  162. return ARM_DRIVER_OK;
  163. }
  164. int32_t LPI2C_Master_EdmaTransmit(
  165. uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  166. {
  167. int32_t status;
  168. int32_t ret;
  169. lpi2c_master_transfer_t masterXfer;
  170. /* Setup the master transfer */
  171. masterXfer.slaveAddress = addr;
  172. masterXfer.direction = kLPI2C_Write;
  173. masterXfer.subaddress = 0;
  174. masterXfer.subaddressSize = 0;
  175. masterXfer.data = (uint8_t *)data;
  176. masterXfer.dataSize = num;
  177. masterXfer.flags = kLPI2C_TransferDefaultFlag;
  178. if (xfer_pending)
  179. {
  180. /* Do not transfer stop */
  181. masterXfer.flags |= kLPI2C_TransferNoStopFlag;
  182. }
  183. /* Send master non-blocking data to slave */
  184. status = LPI2C_MasterTransferEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &masterXfer);
  185. switch (status)
  186. {
  187. case kStatus_Success:
  188. ret = ARM_DRIVER_OK;
  189. break;
  190. case kStatus_LPI2C_Busy:
  191. ret = ARM_DRIVER_ERROR_BUSY;
  192. break;
  193. default:
  194. ret = ARM_DRIVER_ERROR;
  195. break;
  196. }
  197. return ret;
  198. }
  199. int32_t LPI2C_Master_EdmaReceive(
  200. uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  201. {
  202. int32_t status;
  203. int32_t ret;
  204. lpi2c_master_transfer_t masterXfer;
  205. /* Setup the master transfer */
  206. masterXfer.slaveAddress = addr;
  207. masterXfer.direction = kLPI2C_Read;
  208. masterXfer.subaddress = 0;
  209. masterXfer.subaddressSize = 0;
  210. masterXfer.data = data;
  211. masterXfer.dataSize = num;
  212. masterXfer.flags = kLPI2C_TransferDefaultFlag;
  213. if (xfer_pending)
  214. {
  215. masterXfer.flags |= kLPI2C_TransferNoStopFlag;
  216. }
  217. /* Receive non-blocking data from slave */
  218. status = LPI2C_MasterTransferEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &masterXfer);
  219. switch (status)
  220. {
  221. case kStatus_Success:
  222. ret = ARM_DRIVER_OK;
  223. break;
  224. case kStatus_LPI2C_Busy:
  225. ret = ARM_DRIVER_ERROR_BUSY;
  226. break;
  227. default:
  228. ret = ARM_DRIVER_ERROR;
  229. break;
  230. }
  231. return ret;
  232. }
  233. int32_t LPI2C_Master_EdmaGetDataCount(cmsis_lpi2c_edma_driver_state_t *lpi2c)
  234. {
  235. size_t cnt;
  236. LPI2C_MasterTransferGetCountEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &cnt);
  237. return cnt;
  238. }
  239. int32_t LPI2C_Master_EdmaControl(uint32_t control, uint32_t arg, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  240. {
  241. uint32_t baudRate_Bps;
  242. switch (control)
  243. {
  244. /* Set Own Slave Address */
  245. case ARM_I2C_OWN_ADDRESS:
  246. return ARM_DRIVER_ERROR_UNSUPPORTED;
  247. /* Set Bus Speed; arg = bus speed */
  248. case ARM_I2C_BUS_SPEED:
  249. switch (arg)
  250. {
  251. case ARM_I2C_BUS_SPEED_STANDARD:
  252. baudRate_Bps = 100000;
  253. break;
  254. case ARM_I2C_BUS_SPEED_FAST:
  255. baudRate_Bps = 400000;
  256. break;
  257. case ARM_I2C_BUS_SPEED_FAST_PLUS:
  258. baudRate_Bps = 1000000;
  259. break;
  260. default:
  261. return ARM_DRIVER_ERROR_UNSUPPORTED;
  262. }
  263. LPI2C_MasterSetBaudRate(lpi2c->resource->base, lpi2c->resource->GetFreq(), baudRate_Bps);
  264. return ARM_DRIVER_OK;
  265. /* Not supported. */
  266. case ARM_I2C_BUS_CLEAR:
  267. return ARM_DRIVER_ERROR_UNSUPPORTED;
  268. /* Only support aborting data transfer when master transmit in master mode */
  269. case ARM_I2C_ABORT_TRANSFER:
  270. if ((lpi2c->resource->base->MDER & 0x3) == 0x3)
  271. {
  272. if (lpi2c->master_edma_handle->transfer.direction == kLPI2C_Write)
  273. {
  274. LPI2C_MasterTransferAbortEDMA(lpi2c->resource->base, lpi2c->master_edma_handle);
  275. lpi2c->master_edma_handle->transfer.data = NULL;
  276. lpi2c->master_edma_handle->transfer.dataSize = 0;
  277. }
  278. }
  279. return ARM_DRIVER_OK;
  280. default:
  281. return ARM_DRIVER_ERROR_UNSUPPORTED;
  282. }
  283. }
  284. int32_t LPI2C_Master_EdmaPowerControl(ARM_POWER_STATE state, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  285. {
  286. lpi2c_master_config_t masterConfig;
  287. switch (state)
  288. {
  289. case ARM_POWER_OFF:
  290. if (lpi2c->flags & I2C_FLAG_POWER)
  291. {
  292. /* Terminates any pending data transfers */
  293. LPI2C_Master_EdmaControl(ARM_I2C_ABORT_TRANSFER, 0, lpi2c);
  294. /* Disables peripheral */
  295. LPI2C_MasterDeinit(lpi2c->resource->base);
  296. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  297. /* Disable DMAMUX channel */
  298. DMAMUX_DisableChannel(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel);
  299. DMAMUX_DisableChannel(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel);
  300. #endif
  301. lpi2c->flags = I2C_FLAG_INIT;
  302. }
  303. return ARM_DRIVER_OK;
  304. case ARM_POWER_LOW:
  305. return ARM_DRIVER_ERROR_UNSUPPORTED;
  306. case ARM_POWER_FULL:
  307. if (lpi2c->flags == I2C_FLAG_UNINIT)
  308. {
  309. return ARM_DRIVER_ERROR;
  310. }
  311. if (lpi2c->flags & I2C_FLAG_POWER)
  312. {
  313. /* Driver already powered */
  314. break;
  315. }
  316. /*
  317. * masterConfig.debugEnable = false;
  318. * masterConfig.ignoreAck = false;
  319. * masterConfig.pinConfig = kLPI2C_2PinOpenDrain;
  320. * masterConfig.baudRate_Hz = 100000U;
  321. * masterConfig.busIdleTimeout_ns = 0;
  322. * masterConfig.pinLowTimeout_ns = 0;
  323. * masterConfig.sdaGlitchFilterWidth_ns = 0;
  324. * masterConfig.sclGlitchFilterWidth_ns = 0;
  325. */
  326. LPI2C_MasterGetDefaultConfig(&masterConfig);
  327. /* Initialize the LPI2C master peripheral */
  328. LPI2C_MasterInit(lpi2c->resource->base, &masterConfig, lpi2c->resource->GetFreq());
  329. lpi2c->flags |= I2C_FLAG_POWER;
  330. return ARM_DRIVER_OK;
  331. default:
  332. return ARM_DRIVER_ERROR_UNSUPPORTED;
  333. }
  334. return ARM_DRIVER_OK;
  335. }
  336. ARM_I2C_STATUS LPI2C_Master_EdmaGetStatus(cmsis_lpi2c_edma_driver_state_t *lpi2c)
  337. {
  338. ARM_I2C_STATUS stat = {0};
  339. uint32_t ksdk_lpi2c_master_status = LPI2C_MasterGetStatusFlags(lpi2c->resource->base);
  340. stat.busy = !(!(ksdk_lpi2c_master_status & kLPI2C_MasterBusyFlag)); /* Busy flag */
  341. stat.mode = 1; /* Mode: 0=Slave, 1=Master */
  342. stat.direction = lpi2c->master_edma_handle->transfer.direction; /* Direction: 0=Transmitter, 1=Receiver */
  343. stat.arbitration_lost =
  344. !(!(ksdk_lpi2c_master_status & kLPI2C_MasterArbitrationLostFlag)); /* Master lost arbitration */
  345. return stat;
  346. }
  347. #endif
  348. #endif
  349. #if ((RTE_I2C0 && !RTE_I2C0_DMA_EN) || (RTE_I2C1 && !RTE_I2C1_DMA_EN) || (RTE_I2C2 && !RTE_I2C2_DMA_EN) || \
  350. (RTE_I2C3 && !RTE_I2C3_DMA_EN) || (RTE_I2C4 && !RTE_I2C4_DMA_EN) || (RTE_I2C5 && !RTE_I2C5_DMA_EN) || \
  351. (RTE_I2C6 && !RTE_I2C6_DMA_EN))
  352. static void KSDK_LPI2C_SLAVE_InterruptCallback(LPI2C_Type *base,
  353. lpi2c_slave_transfer_t *xfer,
  354. void *userData,
  355. cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  356. {
  357. uint32_t event = 0;
  358. switch (xfer->event)
  359. {
  360. /* Transfer done */
  361. case kLPI2C_SlaveCompletionEvent:
  362. event = ARM_I2C_EVENT_TRANSFER_DONE;
  363. break;
  364. /* Setup the slave receive buffer */
  365. case kLPI2C_SlaveReceiveEvent:
  366. xfer->data = lpi2c->slave_data;
  367. xfer->dataSize = lpi2c->slave_dataSize;
  368. break;
  369. /* Setup the slave transmit buffer */
  370. case kLPI2C_SlaveTransmitEvent:
  371. xfer->data = lpi2c->slave_data;
  372. xfer->dataSize = lpi2c->slave_dataSize;
  373. break;
  374. default:
  375. event = ARM_I2C_EVENT_TRANSFER_INCOMPLETE;
  376. break;
  377. }
  378. if (userData)
  379. {
  380. ((ARM_I2C_SignalEvent_t)userData)(event);
  381. }
  382. }
  383. static void KSDK_LPI2C_MASTER_InterruptCallback(LPI2C_Type *base,
  384. lpi2c_master_handle_t *handle,
  385. status_t status,
  386. void *userData)
  387. {
  388. uint32_t event = 0;
  389. /* Signal transfer success when received success status. */
  390. switch (status)
  391. {
  392. /* Transfer done */
  393. case kStatus_Success:
  394. event = ARM_I2C_EVENT_TRANSFER_DONE;
  395. break;
  396. /* Occurs in master mode when arbitration is lost */
  397. case kStatus_LPI2C_ArbitrationLost:
  398. event = ARM_I2C_EVENT_ARBITRATION_LOST;
  399. break;
  400. default:
  401. event = ARM_I2C_EVENT_TRANSFER_INCOMPLETE;
  402. break;
  403. }
  404. if (userData)
  405. {
  406. ((ARM_I2C_SignalEvent_t)userData)(event);
  407. }
  408. }
  409. static int32_t LPI2C_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  410. {
  411. if (!(lpi2c->flags & I2C_FLAG_INIT))
  412. {
  413. lpi2c->cb_event = cb_event; /* Call back function */
  414. lpi2c->flags = I2C_FLAG_INIT;
  415. }
  416. return ARM_DRIVER_OK;
  417. }
  418. static int32_t LPI2C_InterruptUninitialize(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  419. {
  420. lpi2c->flags = I2C_FLAG_UNINIT;
  421. return ARM_DRIVER_OK;
  422. }
  423. int32_t LPI2C_Master_InterruptTransmit(
  424. uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  425. {
  426. int32_t status;
  427. int32_t ret;
  428. lpi2c_master_transfer_t masterXfer;
  429. if (lpi2c->handle->master_handle.state != 0)
  430. {
  431. return ARM_DRIVER_ERROR_BUSY; /* Master is busy */
  432. }
  433. /* Create master_handle */
  434. LPI2C_MasterTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->master_handle),
  435. KSDK_LPI2C_MASTER_InterruptCallback, (void *)lpi2c->cb_event);
  436. /* Setup the master transfer */
  437. masterXfer.slaveAddress = addr;
  438. masterXfer.direction = kLPI2C_Write;
  439. masterXfer.subaddress = (uint32_t)NULL;
  440. masterXfer.subaddressSize = 0;
  441. masterXfer.data = (uint8_t *)data;
  442. masterXfer.dataSize = num;
  443. masterXfer.flags = kLPI2C_TransferDefaultFlag;
  444. if (xfer_pending)
  445. {
  446. /* Stop condition will not be generated */
  447. masterXfer.flags |= kLPI2C_TransferNoStopFlag;
  448. }
  449. /* Send master non-blocking data to slave */
  450. status = LPI2C_MasterTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->master_handle), &masterXfer);
  451. switch (status)
  452. {
  453. case kStatus_Success:
  454. ret = ARM_DRIVER_OK;
  455. break;
  456. case kStatus_LPI2C_Busy:
  457. ret = ARM_DRIVER_ERROR_BUSY;
  458. break;
  459. default:
  460. ret = ARM_DRIVER_ERROR;
  461. break;
  462. }
  463. return ret;
  464. }
  465. int32_t LPI2C_Master_InterruptReceive(
  466. uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  467. {
  468. int32_t status;
  469. int32_t ret;
  470. lpi2c_master_transfer_t masterXfer;
  471. if (lpi2c->handle->master_handle.state != 0)
  472. {
  473. /* Master is busy */
  474. return ARM_DRIVER_ERROR_BUSY;
  475. }
  476. /* Create master_handle */
  477. LPI2C_MasterTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->master_handle),
  478. KSDK_LPI2C_MASTER_InterruptCallback, (void *)lpi2c->cb_event);
  479. /* Setup the master transfer */
  480. masterXfer.slaveAddress = addr;
  481. masterXfer.direction = kLPI2C_Read;
  482. masterXfer.subaddress = (uint32_t)NULL;
  483. masterXfer.subaddressSize = 0;
  484. masterXfer.data = data;
  485. masterXfer.dataSize = num;
  486. masterXfer.flags = kLPI2C_TransferDefaultFlag;
  487. if (xfer_pending)
  488. {
  489. /* Stop condition will not be generated */
  490. masterXfer.flags |= kLPI2C_TransferNoStopFlag;
  491. }
  492. /* Receive non-blocking data from slave */
  493. status = LPI2C_MasterTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->master_handle), &masterXfer);
  494. switch (status)
  495. {
  496. case kStatus_Success:
  497. ret = ARM_DRIVER_OK;
  498. break;
  499. case kStatus_LPI2C_Busy:
  500. ret = ARM_DRIVER_ERROR_BUSY;
  501. break;
  502. default:
  503. ret = ARM_DRIVER_ERROR;
  504. break;
  505. }
  506. return ret;
  507. }
  508. int32_t LPI2C_Slave_InterruptTransmit(const uint8_t *data, uint32_t num, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  509. {
  510. int32_t status;
  511. int32_t ret;
  512. /* Create slave_handle */
  513. LPI2C_SlaveTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  514. lpi2c->handle->slave_handle.callback, (void *)lpi2c->cb_event);
  515. /* Slave send Nonblocking data to master */
  516. status = LPI2C_SlaveTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  517. kLPI2C_SlaveCompletionEvent);
  518. lpi2c->slave_data = (uint8_t *)data; /*!< slave Transfer buffer */
  519. lpi2c->slave_dataSize = num; /*!< slave Transfer data size */
  520. lpi2c->handle->slave_handle.transferredCount = 0; /*!< slave Transfered data count */
  521. switch (status)
  522. {
  523. case kStatus_Success:
  524. ret = ARM_DRIVER_OK;
  525. break;
  526. case kStatus_LPI2C_Busy:
  527. ret = ARM_DRIVER_ERROR_BUSY;
  528. break;
  529. default:
  530. ret = ARM_DRIVER_ERROR;
  531. break;
  532. }
  533. return ret;
  534. }
  535. int32_t LPI2C_Slave_InterruptReceive(uint8_t *data, uint32_t num, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  536. {
  537. int32_t status;
  538. int32_t ret;
  539. /* Create slave_handle */
  540. LPI2C_SlaveTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  541. lpi2c->handle->slave_handle.callback, (void *)lpi2c->cb_event);
  542. /* Slave receive Nonblocking data from master */
  543. status = LPI2C_SlaveTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  544. kLPI2C_SlaveCompletionEvent);
  545. lpi2c->slave_data = data; /*!< slave Transfer buffer */
  546. lpi2c->slave_dataSize = num; /*!< slave Transfer data size */
  547. lpi2c->handle->slave_handle.transferredCount = 0; /*!< slave Transfered data count */
  548. switch (status)
  549. {
  550. case kStatus_Success:
  551. ret = ARM_DRIVER_OK;
  552. break;
  553. case kStatus_LPI2C_Busy:
  554. ret = ARM_DRIVER_ERROR_BUSY;
  555. break;
  556. default:
  557. ret = ARM_DRIVER_ERROR;
  558. break;
  559. }
  560. return ret;
  561. }
  562. int32_t LPI2C_InterruptGetDataCount(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  563. {
  564. size_t cnt;
  565. if ((lpi2c->resource->base->SIER & kSlaveIrqFlags) == kSlaveIrqFlags)
  566. {
  567. /* In slave mode */
  568. LPI2C_SlaveTransferGetCount(lpi2c->resource->base, &lpi2c->handle->slave_handle, &cnt);
  569. }
  570. else
  571. {
  572. /* In master mode */
  573. LPI2C_MasterTransferGetCount(lpi2c->resource->base, &lpi2c->handle->master_handle, &cnt);
  574. }
  575. return cnt;
  576. }
  577. int32_t LPI2C_InterruptControl(uint32_t control, uint32_t arg, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  578. {
  579. uint32_t baudRate_Bps;
  580. switch (control)
  581. {
  582. case ARM_I2C_OWN_ADDRESS:
  583. /* Set Own Slave Address */
  584. lpi2c->resource->base->SAMR = (arg << 1U);
  585. return ARM_DRIVER_OK;
  586. case ARM_I2C_BUS_SPEED:
  587. /* Set Bus Speed */
  588. switch (arg)
  589. {
  590. case ARM_I2C_BUS_SPEED_STANDARD:
  591. baudRate_Bps = 100000;
  592. break;
  593. case ARM_I2C_BUS_SPEED_FAST:
  594. baudRate_Bps = 400000;
  595. break;
  596. case ARM_I2C_BUS_SPEED_FAST_PLUS:
  597. baudRate_Bps = 1000000;
  598. break;
  599. default:
  600. return ARM_DRIVER_ERROR_UNSUPPORTED;
  601. }
  602. LPI2C_MasterSetBaudRate(lpi2c->resource->base, lpi2c->resource->GetFreq(), baudRate_Bps);
  603. return ARM_DRIVER_OK;
  604. /* Not supported. */
  605. case ARM_I2C_BUS_CLEAR:
  606. return ARM_DRIVER_ERROR_UNSUPPORTED;
  607. /* Only support aborting data transfer when master transmit(in master mode) or slave receive(in slave mode) */
  608. case ARM_I2C_ABORT_TRANSFER:
  609. /* Abort data transfer when slave receive(in slave mode) */
  610. if ((lpi2c->resource->base->SIER & kSlaveIrqFlags) == kSlaveIrqFlags)
  611. {
  612. /* Disable slave mode */
  613. lpi2c->resource->base->SCR = 0;
  614. /* Diable slave interrupt */
  615. LPI2C_SlaveTransferAbort(lpi2c->resource->base, &(lpi2c->handle->slave_handle));
  616. /* Enable slave mode */
  617. lpi2c->resource->base->SCR = 0x31;
  618. }
  619. /* Bort data transfer when master transmit abort(in master mode) */
  620. if ((lpi2c->resource->base->MIER & kMasterIrqFlags) == kMasterIrqFlags)
  621. {
  622. /* Disable master interrupt and send stop */
  623. LPI2C_MasterTransferAbort(lpi2c->resource->base, &(lpi2c->handle->master_handle));
  624. lpi2c->handle->master_handle.remainingBytes = 0;
  625. lpi2c->handle->master_handle.transfer.data = NULL;
  626. lpi2c->handle->master_handle.transfer.dataSize = 0;
  627. }
  628. return ARM_DRIVER_OK;
  629. default:
  630. return ARM_DRIVER_ERROR_UNSUPPORTED;
  631. }
  632. }
  633. static int32_t LPI2C_InterruptPowerControl(ARM_POWER_STATE state, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  634. {
  635. switch (state)
  636. {
  637. lpi2c_slave_config_t slaveConfig;
  638. lpi2c_master_config_t masterConfig;
  639. case ARM_POWER_OFF:
  640. if (lpi2c->flags & I2C_FLAG_POWER)
  641. {
  642. /* Terminates any pending data transfers */
  643. LPI2C_InterruptControl(ARM_I2C_ABORT_TRANSFER, 0, lpi2c);
  644. /* Disables peripheral */
  645. LPI2C_MasterDeinit(lpi2c->resource->base);
  646. lpi2c->flags = I2C_FLAG_INIT;
  647. }
  648. return ARM_DRIVER_OK;
  649. case ARM_POWER_LOW:
  650. return ARM_DRIVER_ERROR_UNSUPPORTED;
  651. case ARM_POWER_FULL:
  652. if (lpi2c->flags == I2C_FLAG_UNINIT)
  653. {
  654. return ARM_DRIVER_ERROR;
  655. }
  656. if (lpi2c->flags & I2C_FLAG_POWER)
  657. {
  658. /* Driver already powered */
  659. break;
  660. }
  661. /*
  662. * slaveConfig.address0 = 0U;
  663. * slaveConfig.address1 = 0U;
  664. * slaveConfig.addressMatchMode = kLPI2C_MatchAddress0;
  665. * slaveConfig.filterDozeEnable = true;
  666. * slaveConfig.filterEnable = true;
  667. * slaveConfig.enableGeneralCall = false;
  668. * slaveConfig.ignoreAck = false;
  669. * slaveConfig.enableReceivedAddressRead = false;
  670. * slaveConfig.sdaGlitchFilterWidth_ns = 0;
  671. * slaveConfig.sclGlitchFilterWidth_ns = 0;
  672. * slaveConfig.dataValidDelay_ns = 0;
  673. * slaveConfig.clockHoldTime_ns = 0;
  674. */
  675. LPI2C_SlaveGetDefaultConfig(&slaveConfig);
  676. /* Initialize the LPI2C slave peripheral */
  677. LPI2C_SlaveInit(lpi2c->resource->base, &slaveConfig, lpi2c->resource->GetFreq());
  678. /*
  679. * masterConfig.debugEnable = false;
  680. * masterConfig.ignoreAck = false;
  681. * masterConfig.pinConfig = kLPI2C_2PinOpenDrain;
  682. * masterConfig.baudRate_Hz = 100000U;
  683. * masterConfig.busIdleTimeout_ns = 0;
  684. * masterConfig.pinLowTimeout_ns = 0;
  685. * masterConfig.sdaGlitchFilterWidth_ns = 0;
  686. * masterConfig.sclGlitchFilterWidth_ns = 0;
  687. */
  688. LPI2C_MasterGetDefaultConfig(&masterConfig);
  689. /* Initialize the LPI2C master peripheral */
  690. LPI2C_MasterInit(lpi2c->resource->base, &masterConfig, lpi2c->resource->GetFreq());
  691. lpi2c->flags |= I2C_FLAG_POWER;
  692. return ARM_DRIVER_OK;
  693. default:
  694. return ARM_DRIVER_ERROR_UNSUPPORTED;
  695. }
  696. return ARM_DRIVER_OK;
  697. }
  698. ARM_I2C_STATUS LPI2C_InterruptGetStatus(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  699. {
  700. ARM_I2C_STATUS stat = {0};
  701. uint32_t ksdk_lpi2c_master_status = LPI2C_MasterGetStatusFlags(lpi2c->resource->base);
  702. uint32_t ksdk_lpi2c_slave_status = LPI2C_SlaveGetStatusFlags(lpi2c->resource->base);
  703. /* Busy flag */
  704. stat.busy =
  705. !(!((ksdk_lpi2c_master_status & kLPI2C_MasterBusyFlag) | (ksdk_lpi2c_slave_status & kLPI2C_SlaveBusyFlag)));
  706. /* Mode: 0=Slave, 1=Master */
  707. if ((lpi2c->resource->base->SIER & kSlaveIrqFlags) == kSlaveIrqFlags)
  708. {
  709. stat.mode = 0;
  710. }
  711. else
  712. {
  713. stat.mode = 1;
  714. }
  715. /* Direction: 0=Transmitter, 1=Receiver */
  716. stat.direction = lpi2c->handle->master_handle.transfer.direction;
  717. /* Master lost arbitration */
  718. stat.arbitration_lost = !(!(ksdk_lpi2c_master_status & kLPI2C_MasterArbitrationLostFlag));
  719. return stat;
  720. }
  721. #endif
  722. #if defined(LPI2C0) && RTE_I2C0
  723. /* User needs to provide the implementation for LPI2C0_GetFreq/InitPins/DeinitPins
  724. in the application for enabling according instance. */
  725. extern uint32_t LPI2C0_GetFreq(void);
  726. extern void LPI2C0_InitPins(void);
  727. extern void LPI2C0_DeinitPins(void);
  728. cmsis_lpi2c_resource_t LPI2C0_Resource = {LPI2C0, LPI2C0_GetFreq};
  729. #if RTE_I2C0_DMA_EN
  730. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  731. cmsis_lpi2c_edma_resource_t LPI2C0_EdmaResource = {
  732. RTE_I2C0_DMA_TX_DMA_BASE, RTE_I2C0_DMA_TX_CH, RTE_I2C0_DMA_TX_PERI_SEL,
  733. RTE_I2C0_DMA_RX_DMA_BASE, RTE_I2C0_DMA_RX_CH, RTE_I2C0_DMA_RX_PERI_SEL,
  734. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  735. RTE_I2C0_DMA_TX_DMAMUX_BASE, RTE_I2C0_DMA_RX_DMAMUX_BASE,
  736. #endif
  737. };
  738. AT_NONCACHEABLE_SECTION(lpi2c_master_edma_handle_t LPI2C0_EdmaHandle);
  739. edma_handle_t LPI2C0_EdmaTxHandle;
  740. edma_handle_t LPI2C0_EdmaRxHandle;
  741. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  742. ARMCC_SECTION("lpi2c0_edma_driver_state")
  743. cmsis_lpi2c_edma_driver_state_t LPI2C0_EdmaDriverState = {
  744. #else
  745. cmsis_lpi2c_edma_driver_state_t LPI2C0_EdmaDriverState = {
  746. #endif
  747. &LPI2C0_Resource, &LPI2C0_EdmaResource, &LPI2C0_EdmaHandle, &LPI2C0_EdmaTxHandle, &LPI2C0_EdmaRxHandle,
  748. };
  749. static int32_t LPI2C0_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  750. {
  751. LPI2C0_InitPins();
  752. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C0_EdmaDriverState);
  753. }
  754. int32_t LPI2C0_Master_EdmaUninitialize(void)
  755. {
  756. LPI2C0_DeinitPins();
  757. return LPI2C_Master_EdmaUninitialize(&LPI2C0_EdmaDriverState);
  758. }
  759. int32_t LPI2C0_Master_EdmaPowerControl(ARM_POWER_STATE state)
  760. {
  761. return LPI2C_Master_EdmaPowerControl(state, &LPI2C0_EdmaDriverState);
  762. }
  763. int32_t LPI2C0_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  764. {
  765. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C0_EdmaDriverState);
  766. }
  767. int32_t LPI2C0_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  768. {
  769. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C0_EdmaDriverState);
  770. }
  771. int32_t LPI2C0_Master_EdmaGetDataCount(void)
  772. {
  773. return LPI2C_Master_EdmaGetDataCount(&LPI2C0_EdmaDriverState);
  774. }
  775. int32_t LPI2C0_Master_EdmaControl(uint32_t control, uint32_t arg)
  776. {
  777. return LPI2C_Master_EdmaControl(control, arg, &LPI2C0_EdmaDriverState);
  778. }
  779. ARM_I2C_STATUS LPI2C0_Master_EdmaGetStatus(void)
  780. {
  781. return LPI2C_Master_EdmaGetStatus(&LPI2C0_EdmaDriverState);
  782. }
  783. #endif
  784. #else
  785. cmsis_i2c_handle_t LPI2C0_Handle;
  786. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  787. ARMCC_SECTION("lpi2c0_interrupt_driver_state")
  788. cmsis_lpi2c_interrupt_driver_state_t LPI2C0_InterruptDriverState = {
  789. #else
  790. cmsis_lpi2c_interrupt_driver_state_t LPI2C0_InterruptDriverState = {
  791. #endif
  792. &LPI2C0_Resource, &LPI2C0_Handle,
  793. };
  794. static void KSDK_LPI2C0_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  795. {
  796. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C0_InterruptDriverState);
  797. }
  798. static int32_t LPI2C0_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  799. {
  800. LPI2C0_InitPins();
  801. return LPI2C_InterruptInitialize(cb_event, &LPI2C0_InterruptDriverState);
  802. }
  803. static int32_t LPI2C0_InterruptUninitialize(void)
  804. {
  805. LPI2C0_DeinitPins();
  806. return LPI2C_InterruptUninitialize(&LPI2C0_InterruptDriverState);
  807. }
  808. static int32_t LPI2C0_InterruptPowerControl(ARM_POWER_STATE state)
  809. {
  810. return LPI2C_InterruptPowerControl(state, &LPI2C0_InterruptDriverState);
  811. }
  812. int32_t LPI2C0_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  813. {
  814. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C0_InterruptDriverState);
  815. }
  816. int32_t LPI2C0_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  817. {
  818. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C0_InterruptDriverState);
  819. }
  820. int32_t LPI2C0_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  821. {
  822. LPI2C0_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C0_SLAVE_InterruptCallback;
  823. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C0_InterruptDriverState);
  824. }
  825. int32_t LPI2C0_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  826. {
  827. LPI2C0_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C0_SLAVE_InterruptCallback;
  828. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C0_InterruptDriverState);
  829. }
  830. int32_t LPI2C0_InterruptGetDataCount(void)
  831. {
  832. return LPI2C_InterruptGetDataCount(&LPI2C0_InterruptDriverState);
  833. }
  834. int32_t LPI2C0_InterruptControl(uint32_t control, uint32_t arg)
  835. {
  836. return LPI2C_InterruptControl(control, arg, &LPI2C0_InterruptDriverState);
  837. }
  838. ARM_I2C_STATUS LPI2C0_InterruptGetStatus(void)
  839. {
  840. return LPI2C_InterruptGetStatus(&LPI2C0_InterruptDriverState);
  841. }
  842. #endif
  843. ARM_DRIVER_I2C Driver_I2C0 = {LPI2Cx_GetVersion, LPI2Cx_GetCapabilities,
  844. #if RTE_I2C0_DMA_EN
  845. LPI2C0_Master_EdmaInitialize, LPI2C0_Master_EdmaUninitialize,
  846. LPI2C0_Master_EdmaPowerControl, LPI2C0_Master_EdmaTransmit, LPI2C0_Master_EdmaReceive,
  847. NULL, NULL, LPI2C0_Master_EdmaGetDataCount, LPI2C0_Master_EdmaControl,
  848. LPI2C0_Master_EdmaGetStatus
  849. #else
  850. LPI2C0_InterruptInitialize, LPI2C0_InterruptUninitialize, LPI2C0_InterruptPowerControl,
  851. LPI2C0_Master_InterruptTransmit, LPI2C0_Master_InterruptReceive,
  852. LPI2C0_Slave_InterruptTransmit, LPI2C0_Slave_InterruptReceive,
  853. LPI2C0_InterruptGetDataCount, LPI2C0_InterruptControl, LPI2C0_InterruptGetStatus
  854. #endif
  855. };
  856. #endif
  857. #if defined(LPI2C1) && RTE_I2C1
  858. /* User needs to provide the implementation for LPI2C1_GetFreq/InitPins/DeinitPins
  859. in the application for enabling according instance. */
  860. extern uint32_t LPI2C1_GetFreq(void);
  861. extern void LPI2C1_InitPins(void);
  862. extern void LPI2C1_DeinitPins(void);
  863. cmsis_lpi2c_resource_t LPI2C1_Resource = {LPI2C1, LPI2C1_GetFreq};
  864. #if RTE_I2C1_DMA_EN
  865. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  866. cmsis_lpi2c_edma_resource_t LPI2C1_EdmaResource = {
  867. RTE_I2C1_DMA_TX_DMA_BASE, RTE_I2C1_DMA_TX_CH, RTE_I2C1_DMA_TX_PERI_SEL,
  868. RTE_I2C1_DMA_RX_DMA_BASE, RTE_I2C1_DMA_RX_CH, RTE_I2C1_DMA_RX_PERI_SEL,
  869. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  870. RTE_I2C1_DMA_TX_DMAMUX_BASE, RTE_I2C1_DMA_RX_DMAMUX_BASE,
  871. #endif
  872. };
  873. AT_NONCACHEABLE_SECTION(lpi2c_master_edma_handle_t LPI2C1_EdmaHandle);
  874. edma_handle_t LPI2C1_EdmaTxHandle;
  875. edma_handle_t LPI2C1_EdmaRxHandle;
  876. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  877. ARMCC_SECTION("lpi2c1_edma_driver_state")
  878. cmsis_lpi2c_edma_driver_state_t LPI2C1_EdmaDriverState = {
  879. #else
  880. cmsis_lpi2c_edma_driver_state_t LPI2C1_EdmaDriverState = {
  881. #endif
  882. &LPI2C1_Resource, &LPI2C1_EdmaResource, &LPI2C1_EdmaHandle, &LPI2C1_EdmaTxHandle, &LPI2C1_EdmaRxHandle,
  883. };
  884. static int32_t LPI2C1_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  885. {
  886. LPI2C1_InitPins();
  887. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C1_EdmaDriverState);
  888. }
  889. int32_t LPI2C1_Master_EdmaUninitialize(void)
  890. {
  891. LPI2C1_DeinitPins();
  892. return LPI2C_Master_EdmaUninitialize(&LPI2C1_EdmaDriverState);
  893. }
  894. int32_t LPI2C1_Master_EdmaPowerControl(ARM_POWER_STATE state)
  895. {
  896. return LPI2C_Master_EdmaPowerControl(state, &LPI2C1_EdmaDriverState);
  897. }
  898. int32_t LPI2C1_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  899. {
  900. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C1_EdmaDriverState);
  901. }
  902. int32_t LPI2C1_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  903. {
  904. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C1_EdmaDriverState);
  905. }
  906. int32_t LPI2C1_Master_EdmaGetDataCount(void)
  907. {
  908. return LPI2C_Master_EdmaGetDataCount(&LPI2C1_EdmaDriverState);
  909. }
  910. int32_t LPI2C1_Master_EdmaControl(uint32_t control, uint32_t arg)
  911. {
  912. return LPI2C_Master_EdmaControl(control, arg, &LPI2C1_EdmaDriverState);
  913. }
  914. ARM_I2C_STATUS LPI2C1_Master_EdmaGetStatus(void)
  915. {
  916. return LPI2C_Master_EdmaGetStatus(&LPI2C1_EdmaDriverState);
  917. }
  918. #endif
  919. #else
  920. cmsis_i2c_handle_t LPI2C1_Handle;
  921. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  922. ARMCC_SECTION("lpi2c1_interrupt_driver_state")
  923. cmsis_lpi2c_interrupt_driver_state_t LPI2C1_InterruptDriverState = {
  924. #else
  925. cmsis_lpi2c_interrupt_driver_state_t LPI2C1_InterruptDriverState = {
  926. #endif
  927. &LPI2C1_Resource, &LPI2C1_Handle,
  928. };
  929. static void KSDK_LPI2C1_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  930. {
  931. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C1_InterruptDriverState);
  932. }
  933. static int32_t LPI2C1_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  934. {
  935. LPI2C1_InitPins();
  936. return LPI2C_InterruptInitialize(cb_event, &LPI2C1_InterruptDriverState);
  937. }
  938. static int32_t LPI2C1_InterruptUninitialize(void)
  939. {
  940. LPI2C1_DeinitPins();
  941. return LPI2C_InterruptUninitialize(&LPI2C1_InterruptDriverState);
  942. }
  943. static int32_t LPI2C1_InterruptPowerControl(ARM_POWER_STATE state)
  944. {
  945. return LPI2C_InterruptPowerControl(state, &LPI2C1_InterruptDriverState);
  946. }
  947. int32_t LPI2C1_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  948. {
  949. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C1_InterruptDriverState);
  950. }
  951. int32_t LPI2C1_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  952. {
  953. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C1_InterruptDriverState);
  954. }
  955. int32_t LPI2C1_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  956. {
  957. LPI2C1_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C1_SLAVE_InterruptCallback;
  958. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C1_InterruptDriverState);
  959. }
  960. int32_t LPI2C1_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  961. {
  962. LPI2C1_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C1_SLAVE_InterruptCallback;
  963. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C1_InterruptDriverState);
  964. }
  965. int32_t LPI2C1_InterruptGetDataCount(void)
  966. {
  967. return LPI2C_InterruptGetDataCount(&LPI2C1_InterruptDriverState);
  968. }
  969. int32_t LPI2C1_InterruptControl(uint32_t control, uint32_t arg)
  970. {
  971. return LPI2C_InterruptControl(control, arg, &LPI2C1_InterruptDriverState);
  972. }
  973. ARM_I2C_STATUS LPI2C1_InterruptGetStatus(void)
  974. {
  975. return LPI2C_InterruptGetStatus(&LPI2C1_InterruptDriverState);
  976. }
  977. #endif
  978. ARM_DRIVER_I2C Driver_I2C1 = {LPI2Cx_GetVersion, LPI2Cx_GetCapabilities,
  979. #if RTE_I2C1_DMA_EN
  980. LPI2C1_Master_EdmaInitialize, LPI2C1_Master_EdmaUninitialize,
  981. LPI2C1_Master_EdmaPowerControl, LPI2C1_Master_EdmaTransmit, LPI2C1_Master_EdmaReceive,
  982. NULL, NULL, LPI2C1_Master_EdmaGetDataCount, LPI2C1_Master_EdmaControl,
  983. LPI2C1_Master_EdmaGetStatus
  984. #else
  985. LPI2C1_InterruptInitialize, LPI2C1_InterruptUninitialize, LPI2C1_InterruptPowerControl,
  986. LPI2C1_Master_InterruptTransmit, LPI2C1_Master_InterruptReceive,
  987. LPI2C1_Slave_InterruptTransmit, LPI2C1_Slave_InterruptReceive,
  988. LPI2C1_InterruptGetDataCount, LPI2C1_InterruptControl, LPI2C1_InterruptGetStatus
  989. #endif
  990. };
  991. #endif
  992. #if defined(LPI2C2) && RTE_I2C2
  993. /* User needs to provide the implementation for LPI2C2_GetFreq/InitPins/DeinitPins
  994. in the application for enabling according instance. */
  995. extern uint32_t LPI2C2_GetFreq(void);
  996. extern void LPI2C2_InitPins(void);
  997. extern void LPI2C2_DeinitPins(void);
  998. cmsis_lpi2c_resource_t LPI2C2_Resource = {LPI2C2, LPI2C2_GetFreq};
  999. #if RTE_I2C2_DMA_EN
  1000. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1001. cmsis_lpi2c_edma_resource_t LPI2C2_EdmaResource = {
  1002. RTE_I2C2_DMA_TX_DMA_BASE, RTE_I2C2_DMA_TX_CH, RTE_I2C2_DMA_TX_PERI_SEL,
  1003. RTE_I2C2_DMA_RX_DMA_BASE, RTE_I2C2_DMA_RX_CH, RTE_I2C2_DMA_RX_PERI_SEL,
  1004. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1005. RTE_I2C2_DMA_TX_DMAMUX_BASE, RTE_I2C2_DMA_RX_DMAMUX_BASE,
  1006. #endif
  1007. };
  1008. AT_NONCACHEABLE_SECTION(lpi2c_master_edma_handle_t LPI2C2_EdmaHandle);
  1009. edma_handle_t LPI2C2_EdmaTxHandle;
  1010. edma_handle_t LPI2C2_EdmaRxHandle;
  1011. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1012. ARMCC_SECTION("lpi2c2_edma_driver_state")
  1013. cmsis_lpi2c_edma_driver_state_t LPI2C2_EdmaDriverState = {
  1014. #else
  1015. cmsis_lpi2c_edma_driver_state_t LPI2C2_EdmaDriverState = {
  1016. #endif
  1017. &LPI2C2_Resource, &LPI2C2_EdmaResource, &LPI2C2_EdmaHandle, &LPI2C2_EdmaTxHandle, &LPI2C2_EdmaRxHandle,
  1018. };
  1019. static int32_t LPI2C2_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1020. {
  1021. LPI2C2_InitPins();
  1022. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C2_EdmaDriverState);
  1023. }
  1024. int32_t LPI2C2_Master_EdmaUninitialize(void)
  1025. {
  1026. LPI2C2_DeinitPins();
  1027. return LPI2C_Master_EdmaUninitialize(&LPI2C2_EdmaDriverState);
  1028. }
  1029. int32_t LPI2C2_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1030. {
  1031. return LPI2C_Master_EdmaPowerControl(state, &LPI2C2_EdmaDriverState);
  1032. }
  1033. int32_t LPI2C2_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1034. {
  1035. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C2_EdmaDriverState);
  1036. }
  1037. int32_t LPI2C2_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1038. {
  1039. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C2_EdmaDriverState);
  1040. }
  1041. int32_t LPI2C2_Master_EdmaGetDataCount(void)
  1042. {
  1043. return LPI2C_Master_EdmaGetDataCount(&LPI2C2_EdmaDriverState);
  1044. }
  1045. int32_t LPI2C2_Master_EdmaControl(uint32_t control, uint32_t arg)
  1046. {
  1047. return LPI2C_Master_EdmaControl(control, arg, &LPI2C2_EdmaDriverState);
  1048. }
  1049. ARM_I2C_STATUS LPI2C2_Master_EdmaGetStatus(void)
  1050. {
  1051. return LPI2C_Master_EdmaGetStatus(&LPI2C2_EdmaDriverState);
  1052. }
  1053. #endif
  1054. #else
  1055. cmsis_i2c_handle_t LPI2C2_Handle;
  1056. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1057. ARMCC_SECTION("lpi2c2_interrupt_driver_state")
  1058. cmsis_lpi2c_interrupt_driver_state_t LPI2C2_InterruptDriverState = {
  1059. #else
  1060. cmsis_lpi2c_interrupt_driver_state_t LPI2C2_InterruptDriverState = {
  1061. #endif
  1062. &LPI2C2_Resource, &LPI2C2_Handle,
  1063. };
  1064. static void KSDK_LPI2C2_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1065. {
  1066. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C2_InterruptDriverState);
  1067. }
  1068. static int32_t LPI2C2_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1069. {
  1070. LPI2C2_InitPins();
  1071. return LPI2C_InterruptInitialize(cb_event, &LPI2C2_InterruptDriverState);
  1072. }
  1073. static int32_t LPI2C2_InterruptUninitialize(void)
  1074. {
  1075. LPI2C2_DeinitPins();
  1076. return LPI2C_InterruptUninitialize(&LPI2C2_InterruptDriverState);
  1077. }
  1078. static int32_t LPI2C2_InterruptPowerControl(ARM_POWER_STATE state)
  1079. {
  1080. return LPI2C_InterruptPowerControl(state, &LPI2C2_InterruptDriverState);
  1081. }
  1082. int32_t LPI2C2_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1083. {
  1084. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C2_InterruptDriverState);
  1085. }
  1086. int32_t LPI2C2_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1087. {
  1088. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C2_InterruptDriverState);
  1089. }
  1090. int32_t LPI2C2_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1091. {
  1092. LPI2C2_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C2_SLAVE_InterruptCallback;
  1093. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C2_InterruptDriverState);
  1094. }
  1095. int32_t LPI2C2_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1096. {
  1097. LPI2C2_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C2_SLAVE_InterruptCallback;
  1098. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C2_InterruptDriverState);
  1099. }
  1100. int32_t LPI2C2_InterruptGetDataCount(void)
  1101. {
  1102. return LPI2C_InterruptGetDataCount(&LPI2C2_InterruptDriverState);
  1103. }
  1104. int32_t LPI2C2_InterruptControl(uint32_t control, uint32_t arg)
  1105. {
  1106. return LPI2C_InterruptControl(control, arg, &LPI2C2_InterruptDriverState);
  1107. }
  1108. ARM_I2C_STATUS LPI2C2_InterruptGetStatus(void)
  1109. {
  1110. return LPI2C_InterruptGetStatus(&LPI2C2_InterruptDriverState);
  1111. }
  1112. #endif
  1113. ARM_DRIVER_I2C Driver_I2C2 = {LPI2Cx_GetVersion, LPI2Cx_GetCapabilities,
  1114. #if RTE_I2C2_DMA_EN
  1115. LPI2C2_Master_EdmaInitialize, LPI2C2_Master_EdmaUninitialize,
  1116. LPI2C2_Master_EdmaPowerControl, LPI2C2_Master_EdmaTransmit, LPI2C2_Master_EdmaReceive,
  1117. NULL, NULL, LPI2C2_Master_EdmaGetDataCount, LPI2C2_Master_EdmaControl,
  1118. LPI2C2_Master_EdmaGetStatus
  1119. #else
  1120. LPI2C2_InterruptInitialize, LPI2C2_InterruptUninitialize, LPI2C2_InterruptPowerControl,
  1121. LPI2C2_Master_InterruptTransmit, LPI2C2_Master_InterruptReceive,
  1122. LPI2C2_Slave_InterruptTransmit, LPI2C2_Slave_InterruptReceive,
  1123. LPI2C2_InterruptGetDataCount, LPI2C2_InterruptControl, LPI2C2_InterruptGetStatus
  1124. #endif
  1125. };
  1126. #endif
  1127. #if defined(LPI2C3) && RTE_I2C3
  1128. /* User needs to provide the implementation for LPI2C3_GetFreq/InitPins/DeinitPins
  1129. in the application for enabling according instance. */
  1130. extern uint32_t LPI2C3_GetFreq(void);
  1131. extern void LPI2C3_InitPins(void);
  1132. extern void LPI2C3_DeinitPins(void);
  1133. cmsis_lpi2c_resource_t LPI2C3_Resource = {LPI2C3, LPI2C3_GetFreq};
  1134. #if RTE_I2C3_DMA_EN
  1135. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1136. cmsis_lpi2c_edma_resource_t LPI2C3_EdmaResource = {
  1137. RTE_I2C3_DMA_TX_DMA_BASE, RTE_I2C3_DMA_TX_CH, RTE_I2C3_DMA_TX_PERI_SEL,
  1138. RTE_I2C3_DMA_RX_DMA_BASE, RTE_I2C3_DMA_RX_CH, RTE_I2C3_DMA_RX_PERI_SEL,
  1139. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1140. RTE_I2C3_DMA_TX_DMAMUX_BASE, RTE_I2C3_DMA_RX_DMAMUX_BASE,
  1141. #endif
  1142. };
  1143. AT_NONCACHEABLE_SECTION(lpi2c_master_edma_handle_t LPI2C3_EdmaHandle);
  1144. edma_handle_t LPI2C3_EdmaTxHandle;
  1145. edma_handle_t LPI2C3_EdmaRxHandle;
  1146. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1147. ARMCC_SECTION("lpi2c3_edma_driver_state")
  1148. cmsis_lpi2c_edma_driver_state_t LPI2C3_EdmaDriverState = {
  1149. #else
  1150. cmsis_lpi2c_edma_driver_state_t LPI2C3_EdmaDriverState = {
  1151. #endif
  1152. &LPI2C3_Resource, &LPI2C3_EdmaResource, &LPI2C3_EdmaHandle, &LPI2C3_EdmaTxHandle, &LPI2C3_EdmaRxHandle,
  1153. };
  1154. static int32_t LPI2C3_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1155. {
  1156. LPI2C3_InitPins();
  1157. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C3_EdmaDriverState);
  1158. }
  1159. int32_t LPI2C3_Master_EdmaUninitialize(void)
  1160. {
  1161. LPI2C3_DeinitPins();
  1162. return LPI2C_Master_EdmaUninitialize(&LPI2C3_EdmaDriverState);
  1163. }
  1164. int32_t LPI2C3_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1165. {
  1166. return LPI2C_Master_EdmaPowerControl(state, &LPI2C3_EdmaDriverState);
  1167. }
  1168. int32_t LPI2C3_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1169. {
  1170. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C3_EdmaDriverState);
  1171. }
  1172. int32_t LPI2C3_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1173. {
  1174. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C3_EdmaDriverState);
  1175. }
  1176. int32_t LPI2C3_Master_EdmaGetDataCount(void)
  1177. {
  1178. return LPI2C_Master_EdmaGetDataCount(&LPI2C3_EdmaDriverState);
  1179. }
  1180. int32_t LPI2C3_Master_EdmaControl(uint32_t control, uint32_t arg)
  1181. {
  1182. return LPI2C_Master_EdmaControl(control, arg, &LPI2C3_EdmaDriverState);
  1183. }
  1184. ARM_I2C_STATUS LPI2C3_Master_EdmaGetStatus(void)
  1185. {
  1186. return LPI2C_Master_EdmaGetStatus(&LPI2C3_EdmaDriverState);
  1187. }
  1188. #endif
  1189. #else
  1190. cmsis_i2c_handle_t LPI2C3_Handle;
  1191. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1192. ARMCC_SECTION("lpi2c3_interrupt_driver_state")
  1193. cmsis_lpi2c_interrupt_driver_state_t LPI2C3_InterruptDriverState = {
  1194. #else
  1195. cmsis_lpi2c_interrupt_driver_state_t LPI2C3_InterruptDriverState = {
  1196. #endif
  1197. &LPI2C3_Resource, &LPI2C3_Handle,
  1198. };
  1199. static void KSDK_LPI2C3_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1200. {
  1201. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C3_InterruptDriverState);
  1202. }
  1203. static int32_t LPI2C3_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1204. {
  1205. LPI2C3_InitPins();
  1206. return LPI2C_InterruptInitialize(cb_event, &LPI2C3_InterruptDriverState);
  1207. }
  1208. static int32_t LPI2C3_InterruptUninitialize(void)
  1209. {
  1210. LPI2C3_DeinitPins();
  1211. return LPI2C_InterruptUninitialize(&LPI2C3_InterruptDriverState);
  1212. }
  1213. static int32_t LPI2C3_InterruptPowerControl(ARM_POWER_STATE state)
  1214. {
  1215. return LPI2C_InterruptPowerControl(state, &LPI2C3_InterruptDriverState);
  1216. }
  1217. int32_t LPI2C3_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1218. {
  1219. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C3_InterruptDriverState);
  1220. }
  1221. int32_t LPI2C3_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1222. {
  1223. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C3_InterruptDriverState);
  1224. }
  1225. int32_t LPI2C3_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1226. {
  1227. LPI2C3_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C3_SLAVE_InterruptCallback;
  1228. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C3_InterruptDriverState);
  1229. }
  1230. int32_t LPI2C3_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1231. {
  1232. LPI2C3_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C3_SLAVE_InterruptCallback;
  1233. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C3_InterruptDriverState);
  1234. }
  1235. int32_t LPI2C3_InterruptGetDataCount(void)
  1236. {
  1237. return LPI2C_InterruptGetDataCount(&LPI2C3_InterruptDriverState);
  1238. }
  1239. int32_t LPI2C3_InterruptControl(uint32_t control, uint32_t arg)
  1240. {
  1241. return LPI2C_InterruptControl(control, arg, &LPI2C3_InterruptDriverState);
  1242. }
  1243. ARM_I2C_STATUS LPI2C3_InterruptGetStatus(void)
  1244. {
  1245. return LPI2C_InterruptGetStatus(&LPI2C3_InterruptDriverState);
  1246. }
  1247. #endif /* RTE_I2C3_DMA_EN */
  1248. ARM_DRIVER_I2C Driver_I2C3 = {LPI2Cx_GetVersion, LPI2Cx_GetCapabilities,
  1249. #if RTE_I2C3_DMA_EN
  1250. LPI2C3_Master_EdmaInitialize, LPI2C3_Master_EdmaUninitialize,
  1251. LPI2C3_Master_EdmaPowerControl, LPI2C3_Master_EdmaTransmit, LPI2C3_Master_EdmaReceive,
  1252. NULL, NULL, LPI2C3_Master_EdmaGetDataCount, LPI2C3_Master_EdmaControl,
  1253. LPI2C3_Master_EdmaGetStatus
  1254. #else
  1255. LPI2C3_InterruptInitialize, LPI2C3_InterruptUninitialize, LPI2C3_InterruptPowerControl,
  1256. LPI2C3_Master_InterruptTransmit, LPI2C3_Master_InterruptReceive,
  1257. LPI2C3_Slave_InterruptTransmit, LPI2C3_Slave_InterruptReceive,
  1258. LPI2C3_InterruptGetDataCount, LPI2C3_InterruptControl, LPI2C3_InterruptGetStatus
  1259. #endif /* RTE_I2C3_DMA_EN */
  1260. };
  1261. #endif
  1262. #if defined(LPI2C4) && RTE_I2C4
  1263. /* User needs to provide the implementation for LPI2C4_GetFreq/InitPins/DeinitPins
  1264. in the application for enabling according instance. */
  1265. extern uint32_t LPI2C4_GetFreq(void);
  1266. extern void LPI2C4_InitPins(void);
  1267. extern void LPI2C4_DeinitPins(void);
  1268. cmsis_lpi2c_resource_t LPI2C4_Resource = {LPI2C4, LPI2C4_GetFreq};
  1269. #if RTE_I2C4_DMA_EN
  1270. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1271. cmsis_lpi2c_edma_resource_t LPI2C4_EdmaResource = {
  1272. RTE_I2C4_DMA_TX_DMA_BASE, RTE_I2C4_DMA_TX_CH, RTE_I2C4_DMA_TX_PERI_SEL,
  1273. RTE_I2C4_DMA_RX_DMA_BASE, RTE_I2C4_DMA_RX_CH, RTE_I2C4_DMA_RX_PERI_SEL,
  1274. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1275. RTE_I2C4_DMA_TX_DMAMUX_BASE, RTE_I2C4_DMA_RX_DMAMUX_BASE,
  1276. #endif
  1277. };
  1278. AT_NONCACHEABLE_SECTION(lpi2c_master_edma_handle_t LPI2C4_EdmaHandle);
  1279. edma_handle_t LPI2C4_EdmaTxHandle;
  1280. edma_handle_t LPI2C4_EdmaRxHandle;
  1281. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1282. ARMCC_SECTION("lpi2c4_edma_driver_state")
  1283. cmsis_lpi2c_edma_driver_state_t LPI2C4_EdmaDriverState = {
  1284. #else
  1285. cmsis_lpi2c_edma_driver_state_t LPI2C4_EdmaDriverState = {
  1286. #endif
  1287. &LPI2C4_Resource, &LPI2C4_EdmaResource, &LPI2C4_EdmaHandle, &LPI2C4_EdmaTxHandle, &LPI2C4_EdmaRxHandle,
  1288. };
  1289. static int32_t LPI2C4_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1290. {
  1291. LPI2C4_InitPins();
  1292. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C4_EdmaDriverState);
  1293. }
  1294. int32_t LPI2C4_Master_EdmaUninitialize(void)
  1295. {
  1296. LPI2C4_DeinitPins();
  1297. return LPI2C_Master_EdmaUninitialize(&LPI2C4_EdmaDriverState);
  1298. }
  1299. int32_t LPI2C4_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1300. {
  1301. return LPI2C_Master_EdmaPowerControl(state, &LPI2C4_EdmaDriverState);
  1302. }
  1303. int32_t LPI2C4_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1304. {
  1305. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C4_EdmaDriverState);
  1306. }
  1307. int32_t LPI2C4_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1308. {
  1309. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C4_EdmaDriverState);
  1310. }
  1311. int32_t LPI2C4_Master_EdmaGetDataCount(void)
  1312. {
  1313. return LPI2C_Master_EdmaGetDataCount(&LPI2C4_EdmaDriverState);
  1314. }
  1315. int32_t LPI2C4_Master_EdmaControl(uint32_t control, uint32_t arg)
  1316. {
  1317. return LPI2C_Master_EdmaControl(control, arg, &LPI2C4_EdmaDriverState);
  1318. }
  1319. ARM_I2C_STATUS LPI2C4_Master_EdmaGetStatus(void)
  1320. {
  1321. return LPI2C_Master_EdmaGetStatus(&LPI2C4_EdmaDriverState);
  1322. }
  1323. #endif
  1324. #else
  1325. cmsis_i2c_handle_t LPI2C4_Handle;
  1326. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1327. ARMCC_SECTION("lpi2c4_interrupt_driver_state")
  1328. cmsis_lpi2c_interrupt_driver_state_t LPI2C4_InterruptDriverState = {
  1329. #else
  1330. cmsis_lpi2c_interrupt_driver_state_t LPI2C4_InterruptDriverState = {
  1331. #endif
  1332. &LPI2C4_Resource, &LPI2C4_Handle,
  1333. };
  1334. static void KSDK_LPI2C4_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1335. {
  1336. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C4_InterruptDriverState);
  1337. }
  1338. static int32_t LPI2C4_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1339. {
  1340. LPI2C4_InitPins();
  1341. return LPI2C_InterruptInitialize(cb_event, &LPI2C4_InterruptDriverState);
  1342. }
  1343. static int32_t LPI2C4_InterruptUninitialize(void)
  1344. {
  1345. LPI2C4_DeinitPins();
  1346. return LPI2C_InterruptUninitialize(&LPI2C4_InterruptDriverState);
  1347. }
  1348. static int32_t LPI2C4_InterruptPowerControl(ARM_POWER_STATE state)
  1349. {
  1350. return LPI2C_InterruptPowerControl(state, &LPI2C4_InterruptDriverState);
  1351. }
  1352. int32_t LPI2C4_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1353. {
  1354. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C4_InterruptDriverState);
  1355. }
  1356. int32_t LPI2C4_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1357. {
  1358. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C4_InterruptDriverState);
  1359. }
  1360. int32_t LPI2C4_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1361. {
  1362. LPI2C4_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C4_SLAVE_InterruptCallback;
  1363. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C4_InterruptDriverState);
  1364. }
  1365. int32_t LPI2C4_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1366. {
  1367. LPI2C4_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C4_SLAVE_InterruptCallback;
  1368. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C4_InterruptDriverState);
  1369. }
  1370. int32_t LPI2C4_InterruptGetDataCount(void)
  1371. {
  1372. return LPI2C_InterruptGetDataCount(&LPI2C4_InterruptDriverState);
  1373. }
  1374. int32_t LPI2C4_InterruptControl(uint32_t control, uint32_t arg)
  1375. {
  1376. return LPI2C_InterruptControl(control, arg, &LPI2C4_InterruptDriverState);
  1377. }
  1378. ARM_I2C_STATUS LPI2C4_InterruptGetStatus(void)
  1379. {
  1380. return LPI2C_InterruptGetStatus(&LPI2C4_InterruptDriverState);
  1381. }
  1382. #endif /* RTE_I2C4_DMA_EN */
  1383. ARM_DRIVER_I2C Driver_I2C4 = {LPI2Cx_GetVersion, LPI2Cx_GetCapabilities,
  1384. #if RTE_I2C4_DMA_EN
  1385. LPI2C4_Master_EdmaInitialize, LPI2C4_Master_EdmaUninitialize,
  1386. LPI2C4_Master_EdmaPowerControl, LPI2C4_Master_EdmaTransmit, LPI2C4_Master_EdmaReceive,
  1387. NULL, NULL, LPI2C4_Master_EdmaGetDataCount, LPI2C4_Master_EdmaControl,
  1388. LPI2C4_Master_EdmaGetStatus
  1389. #else
  1390. LPI2C4_InterruptInitialize, LPI2C4_InterruptUninitialize, LPI2C4_InterruptPowerControl,
  1391. LPI2C4_Master_InterruptTransmit, LPI2C4_Master_InterruptReceive,
  1392. LPI2C4_Slave_InterruptTransmit, LPI2C4_Slave_InterruptReceive,
  1393. LPI2C4_InterruptGetDataCount, LPI2C4_InterruptControl, LPI2C4_InterruptGetStatus
  1394. #endif /* RTE_I2C4_DMA_EN */
  1395. };
  1396. #endif
  1397. #if defined(LPI2C5) && RTE_I2C5
  1398. /* User needs to provide the implementation for LPI2C5_GetFreq/InitPins/DeinitPins
  1399. in the application for enabling according instance. */
  1400. extern uint32_t LPI2C5_GetFreq(void);
  1401. extern void LPI2C5_InitPins(void);
  1402. extern void LPI2C5_DeinitPins(void);
  1403. cmsis_lpi2c_resource_t LPI2C5_Resource = {LPI2C5, LPI2C5_GetFreq};
  1404. #if RTE_I2C5_DMA_EN
  1405. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1406. cmsis_lpi2c_edma_resource_t LPI2C5_EdmaResource = {
  1407. RTE_I2C5_DMA_TX_DMA_BASE, RTE_I2C5_DMA_TX_CH, RTE_I2C5_DMA_TX_PERI_SEL,
  1408. RTE_I2C5_DMA_RX_DMA_BASE, RTE_I2C5_DMA_RX_CH, RTE_I2C5_DMA_RX_PERI_SEL,
  1409. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1410. RTE_I2C5_DMA_TX_DMAMUX_BASE, RTE_I2C5_DMA_RX_DMAMUX_BASE,
  1411. #endif
  1412. };
  1413. AT_NONCACHEABLE_SECTION(lpi2c_master_edma_handle_t LPI2C5_EdmaHandle);
  1414. edma_handle_t LPI2C5_EdmaTxHandle;
  1415. edma_handle_t LPI2C5_EdmaRxHandle;
  1416. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1417. ARMCC_SECTION("lpi2c5_edma_driver_state")
  1418. cmsis_lpi2c_edma_driver_state_t LPI2C5_EdmaDriverState = {
  1419. #else
  1420. cmsis_lpi2c_edma_driver_state_t LPI2C5_EdmaDriverState = {
  1421. #endif
  1422. &LPI2C5_Resource, &LPI2C5_EdmaResource, &LPI2C5_EdmaHandle, &LPI2C5_EdmaTxHandle, &LPI2C5_EdmaRxHandle,
  1423. };
  1424. static int32_t LPI2C5_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1425. {
  1426. LPI2C5_InitPins();
  1427. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C5_EdmaDriverState);
  1428. }
  1429. int32_t LPI2C5_Master_EdmaUninitialize(void)
  1430. {
  1431. LPI2C5_DeinitPins();
  1432. return LPI2C_Master_EdmaUninitialize(&LPI2C5_EdmaDriverState);
  1433. }
  1434. int32_t LPI2C5_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1435. {
  1436. return LPI2C_Master_EdmaPowerControl(state, &LPI2C5_EdmaDriverState);
  1437. }
  1438. int32_t LPI2C5_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1439. {
  1440. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C5_EdmaDriverState);
  1441. }
  1442. int32_t LPI2C5_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1443. {
  1444. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C5_EdmaDriverState);
  1445. }
  1446. int32_t LPI2C5_Master_EdmaGetDataCount(void)
  1447. {
  1448. return LPI2C_Master_EdmaGetDataCount(&LPI2C5_EdmaDriverState);
  1449. }
  1450. int32_t LPI2C5_Master_EdmaControl(uint32_t control, uint32_t arg)
  1451. {
  1452. return LPI2C_Master_EdmaControl(control, arg, &LPI2C5_EdmaDriverState);
  1453. }
  1454. ARM_I2C_STATUS LPI2C5_Master_EdmaGetStatus(void)
  1455. {
  1456. return LPI2C_Master_EdmaGetStatus(&LPI2C5_EdmaDriverState);
  1457. }
  1458. #endif
  1459. #else
  1460. cmsis_i2c_handle_t LPI2C5_Handle;
  1461. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1462. ARMCC_SECTION("lpi2c5_interrupt_driver_state")
  1463. cmsis_lpi2c_interrupt_driver_state_t LPI2C5_InterruptDriverState = {
  1464. #else
  1465. cmsis_lpi2c_interrupt_driver_state_t LPI2C5_InterruptDriverState = {
  1466. #endif
  1467. &LPI2C5_Resource, &LPI2C5_Handle,
  1468. };
  1469. static void KSDK_LPI2C5_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1470. {
  1471. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C5_InterruptDriverState);
  1472. }
  1473. static int32_t LPI2C5_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1474. {
  1475. LPI2C5_InitPins();
  1476. return LPI2C_InterruptInitialize(cb_event, &LPI2C5_InterruptDriverState);
  1477. }
  1478. static int32_t LPI2C5_InterruptUninitialize(void)
  1479. {
  1480. LPI2C5_DeinitPins();
  1481. return LPI2C_InterruptUninitialize(&LPI2C5_InterruptDriverState);
  1482. }
  1483. static int32_t LPI2C5_InterruptPowerControl(ARM_POWER_STATE state)
  1484. {
  1485. return LPI2C_InterruptPowerControl(state, &LPI2C5_InterruptDriverState);
  1486. }
  1487. int32_t LPI2C5_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1488. {
  1489. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C5_InterruptDriverState);
  1490. }
  1491. int32_t LPI2C5_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1492. {
  1493. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C5_InterruptDriverState);
  1494. }
  1495. int32_t LPI2C5_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1496. {
  1497. LPI2C5_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C5_SLAVE_InterruptCallback;
  1498. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C5_InterruptDriverState);
  1499. }
  1500. int32_t LPI2C5_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1501. {
  1502. LPI2C5_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C5_SLAVE_InterruptCallback;
  1503. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C5_InterruptDriverState);
  1504. }
  1505. int32_t LPI2C5_InterruptGetDataCount(void)
  1506. {
  1507. return LPI2C_InterruptGetDataCount(&LPI2C5_InterruptDriverState);
  1508. }
  1509. int32_t LPI2C5_InterruptControl(uint32_t control, uint32_t arg)
  1510. {
  1511. return LPI2C_InterruptControl(control, arg, &LPI2C5_InterruptDriverState);
  1512. }
  1513. ARM_I2C_STATUS LPI2C5_InterruptGetStatus(void)
  1514. {
  1515. return LPI2C_InterruptGetStatus(&LPI2C5_InterruptDriverState);
  1516. }
  1517. #endif /* RTE_I2C5_DMA_EN */
  1518. ARM_DRIVER_I2C Driver_I2C5 = {LPI2Cx_GetVersion, LPI2Cx_GetCapabilities,
  1519. #if RTE_I2C5_DMA_EN
  1520. LPI2C5_Master_EdmaInitialize, LPI2C5_Master_EdmaUninitialize,
  1521. LPI2C5_Master_EdmaPowerControl, LPI2C5_Master_EdmaTransmit, LPI2C5_Master_EdmaReceive,
  1522. NULL, NULL, LPI2C5_Master_EdmaGetDataCount, LPI2C5_Master_EdmaControl,
  1523. LPI2C5_Master_EdmaGetStatus
  1524. #else
  1525. LPI2C5_InterruptInitialize, LPI2C5_InterruptUninitialize, LPI2C5_InterruptPowerControl,
  1526. LPI2C5_Master_InterruptTransmit, LPI2C5_Master_InterruptReceive,
  1527. LPI2C5_Slave_InterruptTransmit, LPI2C5_Slave_InterruptReceive,
  1528. LPI2C5_InterruptGetDataCount, LPI2C5_InterruptControl, LPI2C5_InterruptGetStatus
  1529. #endif /* RTE_I2C5_DMA_EN */
  1530. };
  1531. #endif /* LPI2C5 */
  1532. #if defined(LPI2C6) && RTE_I2C6
  1533. /* User needs to provide the implementation for LPI2C6_GetFreq/InitPins/DeinitPins
  1534. in the application for enabling according instance. */
  1535. extern uint32_t LPI2C6_GetFreq(void);
  1536. extern void LPI2C6_InitPins(void);
  1537. extern void LPI2C6_DeinitPins(void);
  1538. cmsis_lpi2c_resource_t LPI2C6_Resource = {LPI2C6, LPI2C6_GetFreq};
  1539. #if RTE_I2C6_DMA_EN
  1540. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1541. cmsis_lpi2c_edma_resource_t LPI2C6_EdmaResource = {
  1542. RTE_I2C6_DMA_TX_DMA_BASE, RTE_I2C6_DMA_TX_CH, RTE_I2C6_DMA_TX_PERI_SEL,
  1543. RTE_I2C6_DMA_RX_DMA_BASE, RTE_I2C6_DMA_RX_CH, RTE_I2C6_DMA_RX_PERI_SEL,
  1544. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1545. RTE_I2C6_DMA_TX_DMAMUX_BASE, RTE_I2C6_DMA_RX_DMAMUX_BASE,
  1546. #endif
  1547. };
  1548. AT_NONCACHEABLE_SECTION(lpi2c_master_edma_handle_t LPI2C6_EdmaHandle);
  1549. edma_handle_t LPI2C6_EdmaTxHandle;
  1550. edma_handle_t LPI2C6_EdmaRxHandle;
  1551. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1552. ARMCC_SECTION("lpi2c6_edma_driver_state")
  1553. cmsis_lpi2c_edma_driver_state_t LPI2C6_EdmaDriverState = {
  1554. #else
  1555. cmsis_lpi2c_edma_driver_state_t LPI2C6_EdmaDriverState = {
  1556. #endif
  1557. &LPI2C6_Resource, &LPI2C6_EdmaResource, &LPI2C6_EdmaHandle, &LPI2C6_EdmaTxHandle, &LPI2C6_EdmaRxHandle,
  1558. };
  1559. static int32_t LPI2C6_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1560. {
  1561. LPI2C6_InitPins();
  1562. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C6_EdmaDriverState);
  1563. }
  1564. int32_t LPI2C6_Master_EdmaUninitialize(void)
  1565. {
  1566. LPI2C6_DeinitPins();
  1567. return LPI2C_Master_EdmaUninitialize(&LPI2C6_EdmaDriverState);
  1568. }
  1569. int32_t LPI2C6_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1570. {
  1571. return LPI2C_Master_EdmaPowerControl(state, &LPI2C6_EdmaDriverState);
  1572. }
  1573. int32_t LPI2C6_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1574. {
  1575. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C6_EdmaDriverState);
  1576. }
  1577. int32_t LPI2C6_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1578. {
  1579. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C6_EdmaDriverState);
  1580. }
  1581. int32_t LPI2C6_Master_EdmaGetDataCount(void)
  1582. {
  1583. return LPI2C_Master_EdmaGetDataCount(&LPI2C6_EdmaDriverState);
  1584. }
  1585. int32_t LPI2C6_Master_EdmaControl(uint32_t control, uint32_t arg)
  1586. {
  1587. return LPI2C_Master_EdmaControl(control, arg, &LPI2C6_EdmaDriverState);
  1588. }
  1589. ARM_I2C_STATUS LPI2C6_Master_EdmaGetStatus(void)
  1590. {
  1591. return LPI2C_Master_EdmaGetStatus(&LPI2C6_EdmaDriverState);
  1592. }
  1593. #endif
  1594. #else
  1595. cmsis_i2c_handle_t LPI2C6_Handle;
  1596. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1597. ARMCC_SECTION("lpi2c6_interrupt_driver_state")
  1598. cmsis_lpi2c_interrupt_driver_state_t LPI2C6_InterruptDriverState = {
  1599. #else
  1600. cmsis_lpi2c_interrupt_driver_state_t LPI2C6_InterruptDriverState = {
  1601. #endif
  1602. &LPI2C6_Resource, &LPI2C6_Handle,
  1603. };
  1604. static void KSDK_LPI2C6_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1605. {
  1606. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C6_InterruptDriverState);
  1607. }
  1608. static int32_t LPI2C6_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1609. {
  1610. LPI2C6_InitPins();
  1611. return LPI2C_InterruptInitialize(cb_event, &LPI2C6_InterruptDriverState);
  1612. }
  1613. static int32_t LPI2C6_InterruptUninitialize(void)
  1614. {
  1615. LPI2C6_DeinitPins();
  1616. return LPI2C_InterruptUninitialize(&LPI2C6_InterruptDriverState);
  1617. }
  1618. static int32_t LPI2C6_InterruptPowerControl(ARM_POWER_STATE state)
  1619. {
  1620. return LPI2C_InterruptPowerControl(state, &LPI2C6_InterruptDriverState);
  1621. }
  1622. int32_t LPI2C6_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1623. {
  1624. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C6_InterruptDriverState);
  1625. }
  1626. int32_t LPI2C6_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1627. {
  1628. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C6_InterruptDriverState);
  1629. }
  1630. int32_t LPI2C6_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1631. {
  1632. LPI2C6_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C6_SLAVE_InterruptCallback;
  1633. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C6_InterruptDriverState);
  1634. }
  1635. int32_t LPI2C6_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1636. {
  1637. LPI2C6_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C6_SLAVE_InterruptCallback;
  1638. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C6_InterruptDriverState);
  1639. }
  1640. int32_t LPI2C6_InterruptGetDataCount(void)
  1641. {
  1642. return LPI2C_InterruptGetDataCount(&LPI2C6_InterruptDriverState);
  1643. }
  1644. int32_t LPI2C6_InterruptControl(uint32_t control, uint32_t arg)
  1645. {
  1646. return LPI2C_InterruptControl(control, arg, &LPI2C6_InterruptDriverState);
  1647. }
  1648. ARM_I2C_STATUS LPI2C6_InterruptGetStatus(void)
  1649. {
  1650. return LPI2C_InterruptGetStatus(&LPI2C6_InterruptDriverState);
  1651. }
  1652. #endif /* RTE_I2C6_DMA_EN */
  1653. ARM_DRIVER_I2C Driver_I2C6 = {LPI2Cx_GetVersion, LPI2Cx_GetCapabilities,
  1654. #if RTE_I2C6_DMA_EN
  1655. LPI2C6_Master_EdmaInitialize, LPI2C6_Master_EdmaUninitialize,
  1656. LPI2C6_Master_EdmaPowerControl, LPI2C6_Master_EdmaTransmit, LPI2C6_Master_EdmaReceive,
  1657. NULL, NULL, LPI2C6_Master_EdmaGetDataCount, LPI2C6_Master_EdmaControl,
  1658. LPI2C6_Master_EdmaGetStatus
  1659. #else
  1660. LPI2C6_InterruptInitialize, LPI2C6_InterruptUninitialize, LPI2C6_InterruptPowerControl,
  1661. LPI2C6_Master_InterruptTransmit, LPI2C6_Master_InterruptReceive,
  1662. LPI2C6_Slave_InterruptTransmit, LPI2C6_Slave_InterruptReceive,
  1663. LPI2C6_InterruptGetDataCount, LPI2C6_InterruptControl, LPI2C6_InterruptGetStatus
  1664. #endif /* RTE_I2C6_DMA_EN */
  1665. };
  1666. #endif /* LPI2C6 */