fsl_enc.c 20 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2021 NXP
  4. * All rights reserved.
  5. *
  6. * SPDX-License-Identifier: BSD-3-Clause
  7. */
  8. #include "fsl_enc.h"
  9. /*******************************************************************************
  10. * Definitions
  11. ******************************************************************************/
  12. /* Component ID definition, used by tools. */
  13. #ifndef FSL_COMPONENT_ID
  14. #define FSL_COMPONENT_ID "platform.drivers.enc"
  15. #endif
  16. #define ENC_CTRL_W1C_FLAGS (ENC_CTRL_HIRQ_MASK | ENC_CTRL_XIRQ_MASK | ENC_CTRL_DIRQ_MASK | ENC_CTRL_CMPIRQ_MASK)
  17. #if (defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
  18. #define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
  19. #else
  20. #define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_SABIRQ_MASK | ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
  21. #endif
  22. /*******************************************************************************
  23. * Prototypes
  24. ******************************************************************************/
  25. /*!
  26. * @brief Get instance number for ENC module.
  27. *
  28. * @param base ENC peripheral base address
  29. */
  30. static uint32_t ENC_GetInstance(ENC_Type *base);
  31. /*******************************************************************************
  32. * Variables
  33. ******************************************************************************/
  34. /*! @brief Pointers to ENC bases for each instance. */
  35. static ENC_Type *const s_encBases[] = ENC_BASE_PTRS;
  36. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  37. /*! @brief Pointers to ENC clocks for each instance. */
  38. static const clock_ip_name_t s_encClocks[] = ENC_CLOCKS;
  39. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  40. /*******************************************************************************
  41. * Code
  42. ******************************************************************************/
  43. static uint32_t ENC_GetInstance(ENC_Type *base)
  44. {
  45. uint32_t instance;
  46. /* Find the instance index from base address mappings. */
  47. for (instance = 0; instance < ARRAY_SIZE(s_encBases); instance++)
  48. {
  49. if (s_encBases[instance] == base)
  50. {
  51. break;
  52. }
  53. }
  54. assert(instance < ARRAY_SIZE(s_encBases));
  55. return instance;
  56. }
  57. /*!
  58. * brief Initialization for the ENC module.
  59. *
  60. * This function is to make the initialization for the ENC module. It should be called firstly before any operation to
  61. * the ENC with the operations like:
  62. * - Enable the clock for ENC module.
  63. * - Configure the ENC's working attributes.
  64. *
  65. * param base ENC peripheral base address.
  66. * param config Pointer to configuration structure. See to "enc_config_t".
  67. */
  68. void ENC_Init(ENC_Type *base, const enc_config_t *config)
  69. {
  70. assert(NULL != config);
  71. uint16_t tmp16;
  72. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  73. /* Enable the clock. */
  74. CLOCK_EnableClock(s_encClocks[ENC_GetInstance(base)]);
  75. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  76. /* ENC_CTRL. */
  77. tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_HIP_MASK | ENC_CTRL_HNE_MASK | ENC_CTRL_REV_MASK |
  78. ENC_CTRL_PH1_MASK | ENC_CTRL_XIP_MASK | ENC_CTRL_XNE_MASK | ENC_CTRL_WDE_MASK));
  79. /* For HOME trigger. */
  80. if (kENC_HOMETriggerDisabled != config->HOMETriggerMode)
  81. {
  82. tmp16 |= ENC_CTRL_HIP_MASK;
  83. if (kENC_HOMETriggerOnFallingEdge == config->HOMETriggerMode)
  84. {
  85. tmp16 |= ENC_CTRL_HNE_MASK;
  86. }
  87. }
  88. /* For encoder work mode. */
  89. if (config->enableReverseDirection)
  90. {
  91. tmp16 |= ENC_CTRL_REV_MASK;
  92. }
  93. if (kENC_DecoderWorkAsSignalPhaseCountMode == config->decoderWorkMode)
  94. {
  95. tmp16 |= ENC_CTRL_PH1_MASK;
  96. }
  97. /* For INDEX trigger. */
  98. if (kENC_INDEXTriggerDisabled != config->INDEXTriggerMode)
  99. {
  100. tmp16 |= ENC_CTRL_XIP_MASK;
  101. if (kENC_INDEXTriggerOnFallingEdge == config->INDEXTriggerMode)
  102. {
  103. tmp16 |= ENC_CTRL_XNE_MASK;
  104. }
  105. }
  106. /* Watchdog. */
  107. if (config->enableWatchdog)
  108. {
  109. tmp16 |= ENC_CTRL_WDE_MASK;
  110. base->WTR = config->watchdogTimeoutValue; /* WDOG can be only available when the feature is enabled. */
  111. }
  112. base->CTRL = tmp16;
  113. /* ENC_FILT. */
  114. base->FILT = ENC_FILT_FILT_CNT(config->filterCount) | ENC_FILT_FILT_PER(config->filterSamplePeriod);
  115. /* ENC_CTRL2. */
  116. tmp16 = base->CTRL2 & (uint16_t)(~(ENC_CTRL2_W1C_FLAGS | ENC_CTRL2_OUTCTL_MASK | ENC_CTRL2_REVMOD_MASK |
  117. ENC_CTRL2_MOD_MASK | ENC_CTRL2_UPDPOS_MASK | ENC_CTRL2_UPDHLD_MASK));
  118. if (kENC_POSMATCHOnReadingAnyPositionCounter == config->positionMatchMode)
  119. {
  120. tmp16 |= ENC_CTRL2_OUTCTL_MASK;
  121. }
  122. if (kENC_RevolutionCountOnRollOverModulus == config->revolutionCountCondition)
  123. {
  124. tmp16 |= ENC_CTRL2_REVMOD_MASK;
  125. }
  126. if (config->enableModuloCountMode)
  127. {
  128. tmp16 |= ENC_CTRL2_MOD_MASK;
  129. /* Set modulus value. */
  130. base->UMOD = (uint16_t)(config->positionModulusValue >> 16U); /* Upper 16 bits. */
  131. base->LMOD = (uint16_t)(config->positionModulusValue); /* Lower 16 bits. */
  132. }
  133. if (config->enableTRIGGERClearPositionCounter)
  134. {
  135. tmp16 |= ENC_CTRL2_UPDPOS_MASK;
  136. }
  137. if (config->enableTRIGGERClearHoldPositionCounter)
  138. {
  139. tmp16 |= ENC_CTRL2_UPDHLD_MASK;
  140. }
  141. base->CTRL2 = tmp16;
  142. #if (defined(FSL_FEATURE_ENC_HAS_CTRL3) && FSL_FEATURE_ENC_HAS_CTRL3)
  143. /* ENC_CTRL3. */
  144. tmp16 = base->CTRL3 & (uint16_t)(~(ENC_CTRL3_PMEN_MASK | ENC_CTRL3_PRSC_MASK));
  145. if (config->enablePeriodMeasurementFunction)
  146. {
  147. tmp16 |= ENC_CTRL3_PMEN_MASK;
  148. /* Set prescaler value. */
  149. tmp16 |= ((uint16_t)config->prescalerValue << ENC_CTRL3_PRSC_SHIFT);
  150. }
  151. base->CTRL3 = tmp16;
  152. #endif
  153. /* ENC_UCOMP & ENC_LCOMP. */
  154. base->UCOMP = (uint16_t)(config->positionCompareValue >> 16U); /* Upper 16 bits. */
  155. base->LCOMP = (uint16_t)(config->positionCompareValue); /* Lower 16 bits. */
  156. /* ENC_UINIT & ENC_LINIT. */
  157. base->UINIT = (uint16_t)(config->positionInitialValue >> 16U); /* Upper 16 bits. */
  158. base->LINIT = (uint16_t)(config->positionInitialValue); /* Lower 16 bits. */
  159. }
  160. /*!
  161. * brief De-initialization for the ENC module.
  162. *
  163. * This function is to make the de-initialization for the ENC module. It could be called when ENC is no longer used with
  164. * the operations like:
  165. * - Disable the clock for ENC module.
  166. *
  167. * param base ENC peripheral base address.
  168. */
  169. void ENC_Deinit(ENC_Type *base)
  170. {
  171. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  172. /* Disable the clock. */
  173. CLOCK_DisableClock(s_encClocks[ENC_GetInstance(base)]);
  174. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  175. }
  176. /*!
  177. * brief Get an available pre-defined settings for ENC's configuration.
  178. *
  179. * This function initializes the ENC configuration structure with an available settings, the default value are:
  180. * code
  181. * config->enableReverseDirection = false;
  182. * config->decoderWorkMode = kENC_DecoderWorkAsNormalMode;
  183. * config->HOMETriggerMode = kENC_HOMETriggerDisabled;
  184. * config->INDEXTriggerMode = kENC_INDEXTriggerDisabled;
  185. * config->enableTRIGGERClearPositionCounter = false;
  186. * config->enableTRIGGERClearHoldPositionCounter = false;
  187. * config->enableWatchdog = false;
  188. * config->watchdogTimeoutValue = 0U;
  189. * config->filterCount = 0U;
  190. * config->filterSamplePeriod = 0U;
  191. * config->positionMatchMode = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
  192. * config->positionCompareValue = 0xFFFFFFFFU;
  193. * config->revolutionCountCondition = kENC_RevolutionCountOnINDEXPulse;
  194. * config->enableModuloCountMode = false;
  195. * config->positionModulusValue = 0U;
  196. * config->positionInitialValue = 0U;
  197. * config->prescalerValue = kENC_ClockDiv1;
  198. * config->enablePeriodMeasurementFunction = true;
  199. * endcode
  200. * param config Pointer to a variable of configuration structure. See to "enc_config_t".
  201. */
  202. void ENC_GetDefaultConfig(enc_config_t *config)
  203. {
  204. assert(NULL != config);
  205. /* Initializes the configure structure to zero. */
  206. (void)memset(config, 0, sizeof(*config));
  207. config->enableReverseDirection = false;
  208. config->decoderWorkMode = kENC_DecoderWorkAsNormalMode;
  209. config->HOMETriggerMode = kENC_HOMETriggerDisabled;
  210. config->INDEXTriggerMode = kENC_INDEXTriggerDisabled;
  211. config->enableTRIGGERClearPositionCounter = false;
  212. config->enableTRIGGERClearHoldPositionCounter = false;
  213. config->enableWatchdog = false;
  214. config->watchdogTimeoutValue = 0U;
  215. config->filterCount = 0U;
  216. config->filterSamplePeriod = 0U;
  217. config->positionMatchMode = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
  218. config->positionCompareValue = 0xFFFFFFFFU;
  219. config->revolutionCountCondition = kENC_RevolutionCountOnINDEXPulse;
  220. config->enableModuloCountMode = false;
  221. config->positionModulusValue = 0U;
  222. config->positionInitialValue = 0U;
  223. #if (defined(FSL_FEATURE_ENC_HAS_CTRL3) && FSL_FEATURE_ENC_HAS_CTRL3)
  224. config->prescalerValue = kENC_ClockDiv1;
  225. config->enablePeriodMeasurementFunction = true;
  226. #endif
  227. }
  228. /*!
  229. * brief Load the initial position value to position counter.
  230. *
  231. * This function is to transfer the initial position value (UINIT and LINIT) contents to position counter (UPOS and
  232. * LPOS), so that to provide the consistent operation the position counter registers.
  233. *
  234. * param base ENC peripheral base address.
  235. */
  236. void ENC_DoSoftwareLoadInitialPositionValue(ENC_Type *base)
  237. {
  238. uint16_t tmp16 = base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS);
  239. tmp16 |= ENC_CTRL_SWIP_MASK; /* Write 1 to trigger the command for loading initial position value. */
  240. base->CTRL = tmp16;
  241. }
  242. /*!
  243. * brief Enable and configure the self test function.
  244. *
  245. * This function is to enable and configuration the self test function. It controls and sets the frequency of a
  246. * quadrature signal generator. It provides a quadrature test signal to the inputs of the quadrature decoder module.
  247. * It is a factory test feature; however, it may be useful to customers' software development and testing.
  248. *
  249. * param base ENC peripheral base address.
  250. * param config Pointer to configuration structure. See to "enc_self_test_config_t". Pass "NULL" to disable.
  251. */
  252. void ENC_SetSelfTestConfig(ENC_Type *base, const enc_self_test_config_t *config)
  253. {
  254. uint16_t tmp16 = 0U;
  255. if (NULL == config) /* Pass "NULL" to disable the feature. */
  256. {
  257. tmp16 = 0U;
  258. }
  259. else
  260. {
  261. tmp16 = ENC_TST_TEN_MASK | ENC_TST_TCE_MASK | ENC_TST_TEST_PERIOD(config->signalPeriod) |
  262. ENC_TST_TEST_COUNT(config->signalCount);
  263. if (kENC_SelfTestDirectionNegative == config->signalDirection)
  264. {
  265. tmp16 |= ENC_TST_QDN_MASK;
  266. }
  267. }
  268. base->TST = tmp16;
  269. }
  270. /*!
  271. * brief Enable watchdog for ENC module.
  272. *
  273. * param base ENC peripheral base address
  274. * param enable Enables or disables the watchdog
  275. */
  276. void ENC_EnableWatchdog(ENC_Type *base, bool enable)
  277. {
  278. uint16_t tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_WDE_MASK));
  279. if (enable)
  280. {
  281. tmp16 |= ENC_CTRL_WDE_MASK;
  282. }
  283. base->CTRL = tmp16;
  284. }
  285. /*!
  286. * brief Get the status flags.
  287. *
  288. * param base ENC peripheral base address.
  289. *
  290. * return Mask value of status flags. For available mask, see to "_enc_status_flags".
  291. */
  292. uint32_t ENC_GetStatusFlags(ENC_Type *base)
  293. {
  294. uint32_t ret32 = 0U;
  295. /* ENC_CTRL. */
  296. if (0U != (ENC_CTRL_HIRQ_MASK & base->CTRL))
  297. {
  298. ret32 |= (uint32_t)kENC_HOMETransitionFlag;
  299. }
  300. if (0U != (ENC_CTRL_XIRQ_MASK & base->CTRL))
  301. {
  302. ret32 |= (uint32_t)kENC_INDEXPulseFlag;
  303. }
  304. if (0U != (ENC_CTRL_DIRQ_MASK & base->CTRL))
  305. {
  306. ret32 |= (uint32_t)kENC_WatchdogTimeoutFlag;
  307. }
  308. if (0U != (ENC_CTRL_CMPIRQ_MASK & base->CTRL))
  309. {
  310. ret32 |= (uint32_t)kENC_PositionCompareFlag;
  311. }
  312. /* ENC_CTRL2. */
  313. #if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
  314. if (0U != (ENC_CTRL2_SABIRQ_MASK & base->CTRL2))
  315. {
  316. ret32 |= (uint32_t)kENC_SimultBothPhaseChangeFlag;
  317. }
  318. #endif
  319. if (0U != (ENC_CTRL2_ROIRQ_MASK & base->CTRL2))
  320. {
  321. ret32 |= (uint32_t)kENC_PositionRollOverFlag;
  322. }
  323. if (0U != (ENC_CTRL2_RUIRQ_MASK & base->CTRL2))
  324. {
  325. ret32 |= (uint32_t)kENC_PositionRollUnderFlag;
  326. }
  327. if (0U != (ENC_CTRL2_DIR_MASK & base->CTRL2))
  328. {
  329. ret32 |= (uint32_t)kENC_LastCountDirectionFlag;
  330. }
  331. return ret32;
  332. }
  333. /*!
  334. * brief Clear the status flags.
  335. *
  336. * param base ENC peripheral base address.
  337. * param mask Mask value of status flags to be cleared. For available mask, see to "_enc_status_flags".
  338. */
  339. void ENC_ClearStatusFlags(ENC_Type *base, uint32_t mask)
  340. {
  341. uint32_t tmp16 = 0U;
  342. /* ENC_CTRL. */
  343. if (0U != ((uint32_t)kENC_HOMETransitionFlag & mask))
  344. {
  345. tmp16 |= ENC_CTRL_HIRQ_MASK;
  346. }
  347. if (0U != ((uint32_t)kENC_INDEXPulseFlag & mask))
  348. {
  349. tmp16 |= ENC_CTRL_XIRQ_MASK;
  350. }
  351. if (0U != ((uint32_t)kENC_WatchdogTimeoutFlag & mask))
  352. {
  353. tmp16 |= ENC_CTRL_DIRQ_MASK;
  354. }
  355. if (0U != ((uint32_t)kENC_PositionCompareFlag & mask))
  356. {
  357. tmp16 |= ENC_CTRL_CMPIRQ_MASK;
  358. }
  359. if (0U != tmp16)
  360. {
  361. base->CTRL = (uint16_t)(((uint32_t)base->CTRL & (~ENC_CTRL_W1C_FLAGS)) | tmp16);
  362. }
  363. /* ENC_CTRL2. */
  364. tmp16 = 0U;
  365. #if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
  366. if (0U != ((uint32_t)kENC_SimultBothPhaseChangeFlag & mask))
  367. {
  368. tmp16 |= ENC_CTRL2_SABIRQ_MASK;
  369. }
  370. #endif
  371. if (0U != ((uint32_t)kENC_PositionRollOverFlag & mask))
  372. {
  373. tmp16 |= ENC_CTRL2_ROIRQ_MASK;
  374. }
  375. if (0U != ((uint32_t)kENC_PositionRollUnderFlag & mask))
  376. {
  377. tmp16 |= ENC_CTRL2_RUIRQ_MASK;
  378. }
  379. if (0U != tmp16)
  380. {
  381. base->CTRL2 = (uint16_t)(((uint32_t)base->CTRL2 & (~ENC_CTRL2_W1C_FLAGS)) | tmp16);
  382. }
  383. }
  384. /*!
  385. * brief Enable the interrupts.
  386. *
  387. * param base ENC peripheral base address.
  388. * param mask Mask value of interrupts to be enabled. For available mask, see to "_enc_interrupt_enable".
  389. */
  390. void ENC_EnableInterrupts(ENC_Type *base, uint32_t mask)
  391. {
  392. uint32_t tmp16 = 0U;
  393. /* ENC_CTRL. */
  394. if (0U != ((uint32_t)kENC_HOMETransitionInterruptEnable & mask))
  395. {
  396. tmp16 |= ENC_CTRL_HIE_MASK;
  397. }
  398. if (0U != ((uint32_t)kENC_INDEXPulseInterruptEnable & mask))
  399. {
  400. tmp16 |= ENC_CTRL_XIE_MASK;
  401. }
  402. if (0U != ((uint32_t)kENC_WatchdogTimeoutInterruptEnable & mask))
  403. {
  404. tmp16 |= ENC_CTRL_DIE_MASK;
  405. }
  406. if (0U != ((uint32_t)kENC_PositionCompareInerruptEnable & mask))
  407. {
  408. tmp16 |= ENC_CTRL_CMPIE_MASK;
  409. }
  410. if (tmp16 != 0U)
  411. {
  412. base->CTRL = (uint16_t)(((uint32_t)base->CTRL & (~ENC_CTRL_W1C_FLAGS)) | tmp16);
  413. }
  414. /* ENC_CTRL2. */
  415. tmp16 = 0U;
  416. #if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
  417. if (0U != ((uint32_t)kENC_SimultBothPhaseChangeInterruptEnable & mask))
  418. {
  419. tmp16 |= ENC_CTRL2_SABIE_MASK;
  420. }
  421. #endif
  422. if (0U != ((uint32_t)kENC_PositionRollOverInterruptEnable & mask))
  423. {
  424. tmp16 |= ENC_CTRL2_ROIE_MASK;
  425. }
  426. if (0U != ((uint32_t)kENC_PositionRollUnderInterruptEnable & mask))
  427. {
  428. tmp16 |= ENC_CTRL2_RUIE_MASK;
  429. }
  430. if (tmp16 != 0U)
  431. {
  432. base->CTRL2 = (uint16_t)(((uint32_t)base->CTRL2 & (~ENC_CTRL2_W1C_FLAGS)) | tmp16);
  433. }
  434. }
  435. /*!
  436. * brief Disable the interrupts.
  437. *
  438. * param base ENC peripheral base address.
  439. * param mask Mask value of interrupts to be disabled. For available mask, see to "_enc_interrupt_enable".
  440. */
  441. void ENC_DisableInterrupts(ENC_Type *base, uint32_t mask)
  442. {
  443. uint16_t tmp16 = 0U;
  444. /* ENC_CTRL. */
  445. if (0U != ((uint32_t)kENC_HOMETransitionInterruptEnable & mask))
  446. {
  447. tmp16 |= ENC_CTRL_HIE_MASK;
  448. }
  449. if (0U != ((uint32_t)kENC_INDEXPulseInterruptEnable & mask))
  450. {
  451. tmp16 |= ENC_CTRL_XIE_MASK;
  452. }
  453. if (0U != ((uint32_t)kENC_WatchdogTimeoutInterruptEnable & mask))
  454. {
  455. tmp16 |= ENC_CTRL_DIE_MASK;
  456. }
  457. if (0U != ((uint32_t)kENC_PositionCompareInerruptEnable & mask))
  458. {
  459. tmp16 |= ENC_CTRL_CMPIE_MASK;
  460. }
  461. if (0U != tmp16)
  462. {
  463. base->CTRL = (uint16_t)(base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) & (uint16_t)(~tmp16);
  464. }
  465. /* ENC_CTRL2. */
  466. tmp16 = 0U;
  467. #if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
  468. if (0U != ((uint32_t)kENC_SimultBothPhaseChangeInterruptEnable & mask))
  469. {
  470. tmp16 |= ENC_CTRL2_SABIE_MASK;
  471. }
  472. #endif
  473. if (0U != ((uint32_t)kENC_PositionRollOverInterruptEnable & mask))
  474. {
  475. tmp16 |= ENC_CTRL2_ROIE_MASK;
  476. }
  477. if (0U != ((uint32_t)kENC_PositionRollUnderInterruptEnable & mask))
  478. {
  479. tmp16 |= ENC_CTRL2_RUIE_MASK;
  480. }
  481. if (tmp16 != 0U)
  482. {
  483. base->CTRL2 = (uint16_t)(base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) & (uint16_t)(~tmp16);
  484. }
  485. }
  486. /*!
  487. * brief Get the enabled interrupts' flags.
  488. *
  489. * param base ENC peripheral base address.
  490. *
  491. * return Mask value of enabled interrupts.
  492. */
  493. uint32_t ENC_GetEnabledInterrupts(ENC_Type *base)
  494. {
  495. uint32_t ret32 = 0U;
  496. /* ENC_CTRL. */
  497. if (0U != (ENC_CTRL_HIE_MASK & base->CTRL))
  498. {
  499. ret32 |= (uint32_t)kENC_HOMETransitionInterruptEnable;
  500. }
  501. if (0U != (ENC_CTRL_XIE_MASK & base->CTRL))
  502. {
  503. ret32 |= (uint32_t)kENC_INDEXPulseInterruptEnable;
  504. }
  505. if (0U != (ENC_CTRL_DIE_MASK & base->CTRL))
  506. {
  507. ret32 |= (uint32_t)kENC_WatchdogTimeoutInterruptEnable;
  508. }
  509. if (0U != (ENC_CTRL_CMPIE_MASK & base->CTRL))
  510. {
  511. ret32 |= (uint32_t)kENC_PositionCompareInerruptEnable;
  512. }
  513. /* ENC_CTRL2. */
  514. #if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
  515. if (0U != (ENC_CTRL2_SABIE_MASK & base->CTRL2))
  516. {
  517. ret32 |= (uint32_t)kENC_SimultBothPhaseChangeInterruptEnable;
  518. }
  519. #endif
  520. if (0U != (ENC_CTRL2_ROIE_MASK & base->CTRL2))
  521. {
  522. ret32 |= (uint32_t)kENC_PositionRollOverInterruptEnable;
  523. }
  524. if (0U != (ENC_CTRL2_RUIE_MASK & base->CTRL2))
  525. {
  526. ret32 |= (uint32_t)kENC_PositionRollUnderInterruptEnable;
  527. }
  528. return ret32;
  529. }
  530. /*!
  531. * brief Set initial position value for ENC module.
  532. *
  533. * param base ENC peripheral base address
  534. * param value Positive initial value
  535. */
  536. void ENC_SetInitialPositionValue(ENC_Type *base, uint32_t value)
  537. {
  538. base->UINIT = (uint16_t)(value >> 16U); /* Set upper 16 bits. */
  539. base->LINIT = (uint16_t)(value); /* Set lower 16 bits. */
  540. }
  541. /*!
  542. * brief Get the current position counter's value.
  543. *
  544. * param base ENC peripheral base address.
  545. *
  546. * return Current position counter's value.
  547. */
  548. uint32_t ENC_GetPositionValue(ENC_Type *base)
  549. {
  550. uint32_t ret32;
  551. ret32 = base->UPOS; /* Get upper 16 bits and make a snapshot. */
  552. ret32 <<= 16U;
  553. ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
  554. return ret32;
  555. }
  556. /*!
  557. * brief Get the hold position counter's value.
  558. *
  559. * When any of the counter registers is read, the contents of each counter register is written to the corresponding hold
  560. * register. Taking a snapshot of the counters' values provides a consistent view of a system position and a velocity to
  561. * be attained.
  562. *
  563. * param base ENC peripheral base address.
  564. *
  565. * return Hold position counter's value.
  566. */
  567. uint32_t ENC_GetHoldPositionValue(ENC_Type *base)
  568. {
  569. uint32_t ret32;
  570. ret32 = base->UPOSH; /* Get upper 16 bits and make a snapshot. */
  571. ret32 <<= 16U;
  572. ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
  573. return ret32;
  574. }