fsl_sai_edma.c 38 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2017 NXP
  4. * All rights reserved.
  5. *
  6. * SPDX-License-Identifier: BSD-3-Clause
  7. */
  8. #include "fsl_sai_edma.h"
  9. /* Component ID definition, used by tools. */
  10. #ifndef FSL_COMPONENT_ID
  11. #define FSL_COMPONENT_ID "platform.drivers.sai_edma"
  12. #endif
  13. /*******************************************************************************
  14. * Definitions
  15. ******************************************************************************/
  16. /* Used for 32byte aligned */
  17. #define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)(address) + 32UL) & ~0x1FU)
  18. static I2S_Type *const s_saiBases[] = I2S_BASE_PTRS;
  19. /* Only support 2 and 4 channel */
  20. #define SAI_CHANNEL_MAP_MODULO(channel) (channel == 2U ? kEDMA_Modulo8bytes : kEDMA_Modulo16bytes)
  21. /*<! Structure definition for uart_edma_private_handle_t. The structure is private. */
  22. typedef struct sai_edma_private_handle
  23. {
  24. I2S_Type *base;
  25. sai_edma_handle_t *handle;
  26. } sai_edma_private_handle_t;
  27. /*! @brief sai_edma_transfer_state, sai edma transfer state.*/
  28. enum
  29. {
  30. kSAI_Busy = 0x0U, /*!< SAI is busy */
  31. kSAI_BusyLoopTransfer, /*!< SAI is busy for Loop transfer */
  32. kSAI_Idle, /*!< Transfer is done. */
  33. };
  34. /*<! Private handle only used for internally. */
  35. static sai_edma_private_handle_t s_edmaPrivateHandle[ARRAY_SIZE(s_saiBases)][2];
  36. /*******************************************************************************
  37. * Prototypes
  38. ******************************************************************************/
  39. /*!
  40. * @brief Get the instance number for SAI.
  41. *
  42. * @param base SAI base pointer.
  43. */
  44. static uint32_t SAI_GetInstance(I2S_Type *base);
  45. /*!
  46. * @brief SAI EDMA callback for send.
  47. *
  48. * @param handle pointer to sai_edma_handle_t structure which stores the transfer state.
  49. * @param userData Parameter for user callback.
  50. * @param done If the DMA transfer finished.
  51. * @param tcds The TCD index.
  52. */
  53. static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
  54. /*!
  55. * @brief SAI EDMA callback for receive.
  56. *
  57. * @param handle pointer to sai_edma_handle_t structure which stores the transfer state.
  58. * @param userData Parameter for user callback.
  59. * @param done If the DMA transfer finished.
  60. * @param tcds The TCD index.
  61. */
  62. static void SAI_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
  63. /*******************************************************************************
  64. * Code
  65. ******************************************************************************/
  66. static uint32_t SAI_GetInstance(I2S_Type *base)
  67. {
  68. uint32_t instance;
  69. /* Find the instance index from base address mappings. */
  70. for (instance = 0; instance < ARRAY_SIZE(s_saiBases); instance++)
  71. {
  72. if (s_saiBases[instance] == base)
  73. {
  74. break;
  75. }
  76. }
  77. assert(instance < ARRAY_SIZE(s_saiBases));
  78. return instance;
  79. }
  80. static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
  81. {
  82. sai_edma_private_handle_t *privHandle = (sai_edma_private_handle_t *)userData;
  83. sai_edma_handle_t *saiHandle = privHandle->handle;
  84. status_t status = kStatus_SAI_TxBusy;
  85. if (saiHandle->state != (uint32_t)kSAI_BusyLoopTransfer)
  86. {
  87. if (saiHandle->queueDriver + tcds > (uint32_t)SAI_XFER_QUEUE_SIZE)
  88. {
  89. (void)memset(&saiHandle->saiQueue[saiHandle->queueDriver], 0,
  90. sizeof(sai_transfer_t) * ((uint32_t)SAI_XFER_QUEUE_SIZE - saiHandle->queueDriver));
  91. (void)memset(&saiHandle->saiQueue[0U], 0,
  92. sizeof(sai_transfer_t) * (saiHandle->queueDriver + tcds - (uint32_t)SAI_XFER_QUEUE_SIZE));
  93. }
  94. else
  95. {
  96. (void)memset(&saiHandle->saiQueue[saiHandle->queueDriver], 0, sizeof(sai_transfer_t) * tcds);
  97. }
  98. saiHandle->queueDriver = (uint8_t)((saiHandle->queueDriver + tcds) % (uint32_t)SAI_XFER_QUEUE_SIZE);
  99. /* If all data finished, just stop the transfer */
  100. if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL)
  101. {
  102. /* Disable DMA enable bit */
  103. SAI_TxEnableDMA(privHandle->base, kSAI_FIFORequestDMAEnable, false);
  104. EDMA_AbortTransfer(handle);
  105. status = kStatus_SAI_TxIdle;
  106. }
  107. }
  108. /* If finished a block, call the callback function */
  109. if (saiHandle->callback != NULL)
  110. {
  111. (saiHandle->callback)(privHandle->base, saiHandle, status, saiHandle->userData);
  112. }
  113. }
  114. static void SAI_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
  115. {
  116. sai_edma_private_handle_t *privHandle = (sai_edma_private_handle_t *)userData;
  117. sai_edma_handle_t *saiHandle = privHandle->handle;
  118. status_t status = kStatus_SAI_RxBusy;
  119. if (saiHandle->state != (uint32_t)kSAI_BusyLoopTransfer)
  120. {
  121. if (saiHandle->queueDriver + tcds > (uint32_t)SAI_XFER_QUEUE_SIZE)
  122. {
  123. (void)memset(&saiHandle->saiQueue[saiHandle->queueDriver], 0,
  124. sizeof(sai_transfer_t) * ((uint32_t)SAI_XFER_QUEUE_SIZE - saiHandle->queueDriver));
  125. (void)memset(&saiHandle->saiQueue[0U], 0,
  126. sizeof(sai_transfer_t) * (saiHandle->queueDriver + tcds - (uint32_t)SAI_XFER_QUEUE_SIZE));
  127. }
  128. else
  129. {
  130. (void)memset(&saiHandle->saiQueue[saiHandle->queueDriver], 0, sizeof(sai_transfer_t) * tcds);
  131. }
  132. saiHandle->queueDriver = (uint8_t)((saiHandle->queueDriver + tcds) % (uint32_t)SAI_XFER_QUEUE_SIZE);
  133. /* If all data finished, just stop the transfer */
  134. if (saiHandle->saiQueue[saiHandle->queueDriver].data == NULL)
  135. {
  136. /* Disable DMA enable bit */
  137. SAI_RxEnableDMA(privHandle->base, kSAI_FIFORequestDMAEnable, false);
  138. EDMA_AbortTransfer(handle);
  139. status = kStatus_SAI_RxIdle;
  140. }
  141. }
  142. /* If finished a block, call the callback function */
  143. if (saiHandle->callback != NULL)
  144. {
  145. (saiHandle->callback)(privHandle->base, saiHandle, status, saiHandle->userData);
  146. }
  147. }
  148. /*!
  149. * brief Initializes the SAI eDMA handle.
  150. *
  151. * This function initializes the SAI master DMA handle, which can be used for other SAI master transactional APIs.
  152. * Usually, for a specified SAI instance, call this API once to get the initialized handle.
  153. *
  154. * param base SAI base pointer.
  155. * param handle SAI eDMA handle pointer.
  156. * param base SAI peripheral base address.
  157. * param callback Pointer to user callback function.
  158. * param userData User parameter passed to the callback function.
  159. * param dmaHandle eDMA handle pointer, this handle shall be static allocated by users.
  160. */
  161. void SAI_TransferTxCreateHandleEDMA(
  162. I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *txDmaHandle)
  163. {
  164. assert((handle != NULL) && (txDmaHandle != NULL));
  165. uint32_t instance = SAI_GetInstance(base);
  166. /* Zero the handle */
  167. (void)memset(handle, 0, sizeof(*handle));
  168. /* Set sai base to handle */
  169. handle->dmaHandle = txDmaHandle;
  170. handle->callback = callback;
  171. handle->userData = userData;
  172. /* Set SAI state to idle */
  173. handle->state = (uint32_t)kSAI_Idle;
  174. s_edmaPrivateHandle[instance][0].base = base;
  175. s_edmaPrivateHandle[instance][0].handle = handle;
  176. /* Need to use scatter gather */
  177. EDMA_InstallTCDMemory(txDmaHandle, (edma_tcd_t *)(STCD_ADDR(handle->tcd)), SAI_XFER_QUEUE_SIZE);
  178. /* Install callback for Tx dma channel */
  179. EDMA_SetCallback(txDmaHandle, SAI_TxEDMACallback, &s_edmaPrivateHandle[instance][0]);
  180. }
  181. /*!
  182. * brief Initializes the SAI Rx eDMA handle.
  183. *
  184. * This function initializes the SAI slave DMA handle, which can be used for other SAI master transactional APIs.
  185. * Usually, for a specified SAI instance, call this API once to get the initialized handle.
  186. *
  187. * param base SAI base pointer.
  188. * param handle SAI eDMA handle pointer.
  189. * param base SAI peripheral base address.
  190. * param callback Pointer to user callback function.
  191. * param userData User parameter passed to the callback function.
  192. * param dmaHandle eDMA handle pointer, this handle shall be static allocated by users.
  193. */
  194. void SAI_TransferRxCreateHandleEDMA(
  195. I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *rxDmaHandle)
  196. {
  197. assert((handle != NULL) && (rxDmaHandle != NULL));
  198. uint32_t instance = SAI_GetInstance(base);
  199. /* Zero the handle */
  200. (void)memset(handle, 0, sizeof(*handle));
  201. /* Set sai base to handle */
  202. handle->dmaHandle = rxDmaHandle;
  203. handle->callback = callback;
  204. handle->userData = userData;
  205. /* Set SAI state to idle */
  206. handle->state = (uint32_t)kSAI_Idle;
  207. s_edmaPrivateHandle[instance][1].base = base;
  208. s_edmaPrivateHandle[instance][1].handle = handle;
  209. /* Need to use scatter gather */
  210. EDMA_InstallTCDMemory(rxDmaHandle, STCD_ADDR(handle->tcd), SAI_XFER_QUEUE_SIZE);
  211. /* Install callback for Tx dma channel */
  212. EDMA_SetCallback(rxDmaHandle, SAI_RxEDMACallback, &s_edmaPrivateHandle[instance][1]);
  213. }
  214. /*!
  215. * brief Configures the SAI Tx audio format.
  216. *
  217. * deprecated Do not use this function. It has been superceded by ref SAI_TransferTxSetConfigEDMA
  218. *
  219. * The audio format can be changed at run-time. This function configures the sample rate and audio data
  220. * format to be transferred. This function also sets the eDMA parameter according to formatting requirements.
  221. *
  222. * param base SAI base pointer.
  223. * param handle SAI eDMA handle pointer.
  224. * param format Pointer to SAI audio data format structure.
  225. * param mclkSourceClockHz SAI master clock source frequency in Hz.
  226. * param bclkSourceClockHz SAI bit clock source frequency in Hz. If bit clock source is master
  227. * clock, this value should equals to masterClockHz in format.
  228. * retval kStatus_Success Audio format set successfully.
  229. * retval kStatus_InvalidArgument The input argument is invalid.
  230. */
  231. void SAI_TransferTxSetFormatEDMA(I2S_Type *base,
  232. sai_edma_handle_t *handle,
  233. sai_transfer_format_t *format,
  234. uint32_t mclkSourceClockHz,
  235. uint32_t bclkSourceClockHz)
  236. {
  237. assert((handle != NULL) && (format != NULL));
  238. /* Configure the audio format to SAI registers */
  239. SAI_TxSetFormat(base, format, mclkSourceClockHz, bclkSourceClockHz);
  240. /* Get the transfer size from format, this should be used in EDMA configuration */
  241. if (format->bitWidth == 24U)
  242. {
  243. handle->bytesPerFrame = 4U;
  244. }
  245. else
  246. {
  247. handle->bytesPerFrame = (uint8_t)(format->bitWidth / 8U);
  248. }
  249. /* Update the data channel SAI used */
  250. handle->channel = format->channel;
  251. /* Clear the channel enable bits until do a send/receive */
  252. base->TCR3 &= ~I2S_TCR3_TCE_MASK;
  253. #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
  254. handle->count = (uint8_t)((uint32_t)FSL_FEATURE_SAI_FIFO_COUNT - format->watermark);
  255. #else
  256. handle->count = 1U;
  257. #endif /* FSL_FEATURE_SAI_FIFO_COUNT */
  258. }
  259. /*!
  260. * brief Configures the SAI Tx.
  261. *
  262. * note SAI eDMA supports data transfer in a multiple SAI channels if the FIFO Combine feature is supported.
  263. * To activate the multi-channel transfer enable SAI channels by filling the channelMask
  264. * of sai_transceiver_t with the corresponding values of _sai_channel_mask enum, enable the FIFO Combine
  265. * mode by assigning kSAI_FifoCombineModeEnabledOnWrite to the fifoCombine member of sai_fifo_combine_t
  266. * which is a member of sai_transceiver_t.
  267. * This is an example of multi-channel data transfer configuration step.
  268. * code
  269. * sai_transceiver_t config;
  270. * SAI_GetClassicI2SConfig(&config, kSAI_WordWidth16bits, kSAI_Stereo, kSAI_Channel0Mask|kSAI_Channel1Mask);
  271. * config.fifo.fifoCombine = kSAI_FifoCombineModeEnabledOnWrite;
  272. * SAI_TransferTxSetConfigEDMA(I2S0, &edmaHandle, &config);
  273. * endcode
  274. * param base SAI base pointer.
  275. * param handle SAI eDMA handle pointer.
  276. * param saiConfig sai configurations.
  277. */
  278. void SAI_TransferTxSetConfigEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transceiver_t *saiConfig)
  279. {
  280. assert((handle != NULL) && (saiConfig != NULL));
  281. /* Configure the audio format to SAI registers */
  282. SAI_TxSetConfig(base, saiConfig);
  283. #if defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE
  284. /* Allow multi-channel transfer only if FIFO Combine mode is enabled */
  285. assert(
  286. (saiConfig->channelNums <= 1U) ||
  287. ((saiConfig->channelNums > 1U) && ((saiConfig->fifo.fifoCombine == kSAI_FifoCombineModeEnabledOnWrite) ||
  288. (saiConfig->fifo.fifoCombine == kSAI_FifoCombineModeEnabledOnReadWrite))));
  289. #endif
  290. /* Get the transfer size from format, this should be used in EDMA configuration */
  291. if (saiConfig->serialData.dataWordLength == 24U)
  292. {
  293. handle->bytesPerFrame = 4U;
  294. }
  295. else
  296. {
  297. handle->bytesPerFrame = saiConfig->serialData.dataWordLength / 8U;
  298. }
  299. /* Update the data channel SAI used */
  300. handle->channel = saiConfig->startChannel;
  301. handle->channelMask = saiConfig->channelMask;
  302. handle->channelNums = saiConfig->channelNums;
  303. /* Clear the channel enable bits until do a send/receive */
  304. base->TCR3 &= ~I2S_TCR3_TCE_MASK;
  305. #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
  306. handle->count = (uint8_t)((uint32_t)FSL_FEATURE_SAI_FIFO_COUNT - saiConfig->fifo.fifoWatermark);
  307. #else
  308. handle->count = 1U;
  309. #endif /* FSL_FEATURE_SAI_FIFO_COUNT */
  310. }
  311. /*!
  312. * brief Configures the SAI Rx audio format.
  313. *
  314. * deprecated Do not use this function. It has been superceded by ref SAI_TransferRxSetConfigEDMA
  315. *
  316. * The audio format can be changed at run-time. This function configures the sample rate and audio data
  317. * format to be transferred. This function also sets the eDMA parameter according to formatting requirements.
  318. *
  319. * param base SAI base pointer.
  320. * param handle SAI eDMA handle pointer.
  321. * param format Pointer to SAI audio data format structure.
  322. * param mclkSourceClockHz SAI master clock source frequency in Hz.
  323. * param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is the master
  324. * clock, this value should equal to masterClockHz in format.
  325. * retval kStatus_Success Audio format set successfully.
  326. * retval kStatus_InvalidArgument The input argument is invalid.
  327. */
  328. void SAI_TransferRxSetFormatEDMA(I2S_Type *base,
  329. sai_edma_handle_t *handle,
  330. sai_transfer_format_t *format,
  331. uint32_t mclkSourceClockHz,
  332. uint32_t bclkSourceClockHz)
  333. {
  334. assert((handle != NULL) && (format != NULL));
  335. /* Configure the audio format to SAI registers */
  336. SAI_RxSetFormat(base, format, mclkSourceClockHz, bclkSourceClockHz);
  337. /* Get the transfer size from format, this should be used in EDMA configuration */
  338. if (format->bitWidth == 24U)
  339. {
  340. handle->bytesPerFrame = 4U;
  341. }
  342. else
  343. {
  344. handle->bytesPerFrame = (uint8_t)(format->bitWidth / 8U);
  345. }
  346. /* Update the data channel SAI used */
  347. handle->channel = format->channel;
  348. /* Clear the channel enable bits until do a send/receive */
  349. base->RCR3 &= ~I2S_RCR3_RCE_MASK;
  350. #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
  351. handle->count = format->watermark;
  352. #else
  353. handle->count = 1U;
  354. #endif /* FSL_FEATURE_SAI_FIFO_COUNT */
  355. }
  356. /*!
  357. * brief Configures the SAI Rx.
  358. *
  359. * note SAI eDMA supports data transfer in a multiple SAI channels if the FIFO Combine feature is supported.
  360. * To activate the multi-channel transfer enable SAI channels by filling the channelMask
  361. * of sai_transceiver_t with the corresponding values of _sai_channel_mask enum, enable the FIFO Combine
  362. * mode by assigning kSAI_FifoCombineModeEnabledOnRead to the fifoCombine member of sai_fifo_combine_t
  363. * which is a member of sai_transceiver_t.
  364. * This is an example of multi-channel data transfer configuration step.
  365. * code
  366. * sai_transceiver_t config;
  367. * SAI_GetClassicI2SConfig(&config, kSAI_WordWidth16bits, kSAI_Stereo, kSAI_Channel0Mask|kSAI_Channel1Mask);
  368. * config.fifo.fifoCombine = kSAI_FifoCombineModeEnabledOnRead;
  369. * SAI_TransferRxSetConfigEDMA(I2S0, &edmaHandle, &config);
  370. * endcode
  371. * param base SAI base pointer.
  372. * param handle SAI eDMA handle pointer.
  373. * param saiConfig sai configurations.
  374. */
  375. void SAI_TransferRxSetConfigEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transceiver_t *saiConfig)
  376. {
  377. assert((handle != NULL) && (saiConfig != NULL));
  378. /* Configure the audio format to SAI registers */
  379. SAI_RxSetConfig(base, saiConfig);
  380. #if defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE
  381. /* Allow multi-channel transfer only if FIFO Combine mode is enabled */
  382. assert(
  383. (saiConfig->channelNums <= 1U) ||
  384. ((saiConfig->channelNums > 1U) && ((saiConfig->fifo.fifoCombine == kSAI_FifoCombineModeEnabledOnRead) ||
  385. (saiConfig->fifo.fifoCombine == kSAI_FifoCombineModeEnabledOnReadWrite))));
  386. #endif
  387. /* Get the transfer size from format, this should be used in EDMA configuration */
  388. if (saiConfig->serialData.dataWordLength == 24U)
  389. {
  390. handle->bytesPerFrame = 4U;
  391. }
  392. else
  393. {
  394. handle->bytesPerFrame = saiConfig->serialData.dataWordLength / 8U;
  395. }
  396. /* Update the data channel SAI used */
  397. handle->channel = saiConfig->startChannel;
  398. handle->channelMask = saiConfig->channelMask;
  399. handle->channelNums = saiConfig->channelNums;
  400. /* Clear the channel enable bits until do a send/receive */
  401. base->RCR3 &= ~I2S_RCR3_RCE_MASK;
  402. #if defined(FSL_FEATURE_SAI_FIFO_COUNT) && (FSL_FEATURE_SAI_FIFO_COUNT > 1)
  403. handle->count = saiConfig->fifo.fifoWatermark;
  404. #else
  405. handle->count = 1U;
  406. #endif /* FSL_FEATURE_SAI_FIFO_COUNT */
  407. }
  408. /*!
  409. * brief Performs a non-blocking SAI transfer using DMA.
  410. *
  411. * note This interface returns immediately after the transfer initiates. Call
  412. * SAI_GetTransferStatus to poll the transfer status and check whether the SAI transfer is finished.
  413. *
  414. * This function support multi channel transfer,
  415. * 1. for the sai IP support fifo combine mode, application should enable the fifo combine mode, no limitation
  416. * on channel numbers
  417. * 2. for the sai IP not support fifo combine mode, sai edma provide another solution which using
  418. * EDMA modulo feature, but support 2 or 4 channels only.
  419. *
  420. * param base SAI base pointer.
  421. * param handle SAI eDMA handle pointer.
  422. * param xfer Pointer to the DMA transfer structure.
  423. * retval kStatus_Success Start a SAI eDMA send successfully.
  424. * retval kStatus_InvalidArgument The input argument is invalid.
  425. * retval kStatus_TxBusy SAI is busy sending data.
  426. */
  427. status_t SAI_TransferSendEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer)
  428. {
  429. assert((handle != NULL) && (xfer != NULL));
  430. edma_transfer_config_t config = {0};
  431. uint32_t destAddr = SAI_TxGetDataRegisterAddress(base, handle->channel);
  432. uint32_t destOffset = 0U;
  433. /* Check if input parameter invalid */
  434. if ((xfer->data == NULL) || (xfer->dataSize == 0U))
  435. {
  436. return kStatus_InvalidArgument;
  437. }
  438. if (handle->saiQueue[handle->queueUser].data != NULL)
  439. {
  440. return kStatus_SAI_QueueFull;
  441. }
  442. /* Change the state of handle */
  443. handle->state = (uint32_t)kSAI_Busy;
  444. /* Update the queue state */
  445. handle->transferSize[handle->queueUser] = xfer->dataSize;
  446. handle->saiQueue[handle->queueUser].data = xfer->data;
  447. handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
  448. handle->queueUser = (handle->queueUser + 1U) % (uint8_t)SAI_XFER_QUEUE_SIZE;
  449. #if !(defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE)
  450. if (handle->channelNums > 1U)
  451. {
  452. destOffset = sizeof(uint32_t);
  453. }
  454. #endif
  455. /* Prepare edma configure */
  456. EDMA_PrepareTransferConfig(&config, xfer->data, (uint32_t)handle->bytesPerFrame, (int16_t)handle->bytesPerFrame,
  457. (uint32_t *)destAddr, (uint32_t)handle->bytesPerFrame, (int16_t)destOffset,
  458. (uint32_t)handle->count * handle->bytesPerFrame, xfer->dataSize);
  459. /* Store the initially configured eDMA minor byte transfer count into the SAI handle */
  460. handle->nbytes = handle->count * handle->bytesPerFrame;
  461. if (EDMA_SubmitTransfer(handle->dmaHandle, &config) != kStatus_Success)
  462. {
  463. return kStatus_SAI_QueueFull;
  464. }
  465. #if !(defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE)
  466. if (handle->channelNums > 1U)
  467. {
  468. if ((handle->channelNums % 2U) != 0U)
  469. {
  470. return kStatus_InvalidArgument;
  471. }
  472. EDMA_SetModulo(handle->dmaHandle->base, handle->dmaHandle->channel, kEDMA_ModuloDisable,
  473. SAI_CHANNEL_MAP_MODULO(handle->channelNums));
  474. }
  475. #endif
  476. /* Start DMA transfer */
  477. EDMA_StartTransfer(handle->dmaHandle);
  478. /* Enable DMA enable bit */
  479. SAI_TxEnableDMA(base, kSAI_FIFORequestDMAEnable, true);
  480. /* Enable SAI Tx clock */
  481. SAI_TxEnable(base, true);
  482. /* Enable the channel FIFO */
  483. base->TCR3 |= I2S_TCR3_TCE(handle->channelMask);
  484. return kStatus_Success;
  485. }
  486. /*!
  487. * brief Performs a non-blocking SAI receive using eDMA.
  488. *
  489. * note This interface returns immediately after the transfer initiates. Call
  490. * the SAI_GetReceiveRemainingBytes to poll the transfer status and check whether the SAI transfer is finished.
  491. *
  492. * This function support multi channel transfer,
  493. * 1. for the sai IP support fifo combine mode, application should enable the fifo combine mode, no limitation
  494. * on channel numbers
  495. * 2. for the sai IP not support fifo combine mode, sai edma provide another solution which using
  496. * EDMA modulo feature, but support 2 or 4 channels only.
  497. *
  498. * param base SAI base pointer
  499. * param handle SAI eDMA handle pointer.
  500. * param xfer Pointer to DMA transfer structure.
  501. * retval kStatus_Success Start a SAI eDMA receive successfully.
  502. * retval kStatus_InvalidArgument The input argument is invalid.
  503. * retval kStatus_RxBusy SAI is busy receiving data.
  504. */
  505. status_t SAI_TransferReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer)
  506. {
  507. assert((handle != NULL) && (xfer != NULL));
  508. edma_transfer_config_t config = {0};
  509. uint32_t srcAddr = SAI_RxGetDataRegisterAddress(base, handle->channel);
  510. uint32_t srcOffset = 0U;
  511. /* Check if input parameter invalid */
  512. if ((xfer->data == NULL) || (xfer->dataSize == 0U))
  513. {
  514. return kStatus_InvalidArgument;
  515. }
  516. if (handle->saiQueue[handle->queueUser].data != NULL)
  517. {
  518. return kStatus_SAI_QueueFull;
  519. }
  520. /* Change the state of handle */
  521. handle->state = (uint32_t)kSAI_Busy;
  522. /* Update queue state */
  523. handle->transferSize[handle->queueUser] = xfer->dataSize;
  524. handle->saiQueue[handle->queueUser].data = xfer->data;
  525. handle->saiQueue[handle->queueUser].dataSize = xfer->dataSize;
  526. handle->queueUser = (handle->queueUser + 1U) % (uint8_t)SAI_XFER_QUEUE_SIZE;
  527. #if !(defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE)
  528. if (handle->channelNums > 1U)
  529. {
  530. srcOffset = sizeof(uint32_t);
  531. }
  532. #endif
  533. /* Prepare edma configure */
  534. EDMA_PrepareTransferConfig(&config, (uint32_t *)srcAddr, (uint32_t)handle->bytesPerFrame, (int16_t)srcOffset,
  535. xfer->data, (uint32_t)handle->bytesPerFrame, (int16_t)handle->bytesPerFrame,
  536. (uint32_t)handle->count * handle->bytesPerFrame, xfer->dataSize);
  537. /* Store the initially configured eDMA minor byte transfer count into the SAI handle */
  538. handle->nbytes = handle->count * handle->bytesPerFrame;
  539. if (EDMA_SubmitTransfer(handle->dmaHandle, &config) != kStatus_Success)
  540. {
  541. return kStatus_SAI_QueueFull;
  542. }
  543. #if !(defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE)
  544. if (handle->channelNums > 1U)
  545. {
  546. if ((handle->channelNums % 2U) != 0U)
  547. {
  548. return kStatus_InvalidArgument;
  549. }
  550. EDMA_SetModulo(handle->dmaHandle->base, handle->dmaHandle->channel, SAI_CHANNEL_MAP_MODULO(handle->channelNums),
  551. kEDMA_ModuloDisable);
  552. }
  553. #endif
  554. /* Start DMA transfer */
  555. EDMA_StartTransfer(handle->dmaHandle);
  556. /* Enable DMA enable bit */
  557. SAI_RxEnableDMA(base, kSAI_FIFORequestDMAEnable, true);
  558. /* Enable the channel FIFO */
  559. base->RCR3 |= I2S_RCR3_RCE(handle->channelMask);
  560. /* Enable SAI Rx clock */
  561. SAI_RxEnable(base, true);
  562. return kStatus_Success;
  563. }
  564. /*!
  565. * brief Performs a non-blocking SAI loop transfer using eDMA.
  566. *
  567. * note This function support loop transfer only,such as A->B->...->A, application must be aware of
  568. * that the more counts of the loop transfer, then more tcd memory required, as the function use the tcd pool in
  569. * sai_edma_handle_t, so application could redefine the SAI_XFER_QUEUE_SIZE to determine the proper TCD pool size.
  570. *
  571. * Once the loop transfer start, application can use function SAI_TransferAbortSendEDMA to stop the loop transfer.
  572. *
  573. * param base SAI base pointer.
  574. * param handle SAI eDMA handle pointer.
  575. * param xfer Pointer to the DMA transfer structure, should be a array with elements counts >=1(loopTransferCount).
  576. * param loopTransferCount the counts of xfer array.
  577. * retval kStatus_Success Start a SAI eDMA send successfully.
  578. * retval kStatus_InvalidArgument The input argument is invalid.
  579. */
  580. status_t SAI_TransferSendLoopEDMA(I2S_Type *base,
  581. sai_edma_handle_t *handle,
  582. sai_transfer_t *xfer,
  583. uint32_t loopTransferCount)
  584. {
  585. assert((handle != NULL) && (xfer != NULL));
  586. edma_transfer_config_t config = {0};
  587. uint32_t destAddr = SAI_TxGetDataRegisterAddress(base, handle->channel);
  588. sai_transfer_t *transfer = xfer;
  589. edma_tcd_t *currentTCD = STCD_ADDR(handle->tcd);
  590. uint32_t tcdIndex = 0U;
  591. /* Change the state of handle */
  592. handle->state = (uint32_t)kSAI_Busy;
  593. for (uint32_t i = 0U; i < loopTransferCount; i++)
  594. {
  595. transfer = &xfer[i];
  596. if ((transfer->data == NULL) || (transfer->dataSize == 0U) || (tcdIndex >= (uint32_t)SAI_XFER_QUEUE_SIZE))
  597. {
  598. return kStatus_InvalidArgument;
  599. }
  600. /* Update the queue state */
  601. handle->transferSize[tcdIndex] = transfer->dataSize;
  602. handle->saiQueue[tcdIndex].data = transfer->data;
  603. handle->saiQueue[tcdIndex].dataSize = transfer->dataSize;
  604. /* Prepare edma configure */
  605. EDMA_PrepareTransfer(&config, transfer->data, handle->bytesPerFrame, (uint32_t *)destAddr,
  606. handle->bytesPerFrame, (uint32_t)handle->count * handle->bytesPerFrame, transfer->dataSize,
  607. kEDMA_MemoryToPeripheral);
  608. if (i == (loopTransferCount - 1U))
  609. {
  610. EDMA_TcdSetTransferConfig(&currentTCD[tcdIndex], &config, &currentTCD[0U]);
  611. EDMA_TcdEnableInterrupts(&currentTCD[tcdIndex], (uint32_t)kEDMA_MajorInterruptEnable);
  612. handle->state = (uint32_t)kSAI_BusyLoopTransfer;
  613. break;
  614. }
  615. else
  616. {
  617. EDMA_TcdSetTransferConfig(&currentTCD[tcdIndex], &config, &currentTCD[tcdIndex + 1U]);
  618. EDMA_TcdEnableInterrupts(&currentTCD[tcdIndex], (uint32_t)kEDMA_MajorInterruptEnable);
  619. }
  620. tcdIndex = tcdIndex + 1U;
  621. }
  622. EDMA_InstallTCD(handle->dmaHandle->base, handle->dmaHandle->channel, &currentTCD[0]);
  623. /* Start DMA transfer */
  624. EDMA_StartTransfer(handle->dmaHandle);
  625. /* Enable DMA enable bit */
  626. SAI_TxEnableDMA(base, kSAI_FIFORequestDMAEnable, true);
  627. /* Enable SAI Tx clock */
  628. SAI_TxEnable(base, true);
  629. /* Enable the channel FIFO */
  630. base->TCR3 |= I2S_TCR3_TCE(1UL << handle->channel);
  631. return kStatus_Success;
  632. }
  633. /*!
  634. * brief Performs a non-blocking SAI loop transfer using eDMA.
  635. *
  636. * note This function support loop transfer only,such as A->B->...->A, application must be aware of
  637. * that the more counts of the loop transfer, then more tcd memory required, as the function use the tcd pool in
  638. * sai_edma_handle_t, so application could redefine the SAI_XFER_QUEUE_SIZE to determine the proper TCD pool size.
  639. *
  640. * Once the loop transfer start, application can use function SAI_TransferAbortReceiveEDMA to stop the loop transfer.
  641. *
  642. * param base SAI base pointer.
  643. * param handle SAI eDMA handle pointer.
  644. * param xfer Pointer to the DMA transfer structure, should be a array with elements counts >=1(loopTransferCount).
  645. * param loopTransferCount the counts of xfer array.
  646. * retval kStatus_Success Start a SAI eDMA receive successfully.
  647. * retval kStatus_InvalidArgument The input argument is invalid.
  648. */
  649. status_t SAI_TransferReceiveLoopEDMA(I2S_Type *base,
  650. sai_edma_handle_t *handle,
  651. sai_transfer_t *xfer,
  652. uint32_t loopTransferCount)
  653. {
  654. assert((handle != NULL) && (xfer != NULL));
  655. edma_transfer_config_t config = {0};
  656. uint32_t srcAddr = SAI_RxGetDataRegisterAddress(base, handle->channel);
  657. sai_transfer_t *transfer = xfer;
  658. edma_tcd_t *currentTCD = STCD_ADDR(handle->tcd);
  659. uint32_t tcdIndex = 0U;
  660. /* Change the state of handle */
  661. handle->state = (uint32_t)kSAI_Busy;
  662. for (uint32_t i = 0U; i < loopTransferCount; i++)
  663. {
  664. transfer = &xfer[i];
  665. if ((tcdIndex >= (uint32_t)SAI_XFER_QUEUE_SIZE) || (xfer->data == NULL) || (xfer->dataSize == 0U))
  666. {
  667. return kStatus_InvalidArgument;
  668. }
  669. /* Update the queue state */
  670. handle->transferSize[tcdIndex] = transfer->dataSize;
  671. handle->saiQueue[tcdIndex].data = transfer->data;
  672. handle->saiQueue[tcdIndex].dataSize = transfer->dataSize;
  673. /* Prepare edma configure */
  674. EDMA_PrepareTransfer(&config, (uint32_t *)srcAddr, handle->bytesPerFrame, transfer->data, handle->bytesPerFrame,
  675. (uint32_t)handle->count * handle->bytesPerFrame, transfer->dataSize,
  676. kEDMA_PeripheralToMemory);
  677. if (i == (loopTransferCount - 1U))
  678. {
  679. EDMA_TcdSetTransferConfig(&currentTCD[tcdIndex], &config, &currentTCD[0U]);
  680. EDMA_TcdEnableInterrupts(&currentTCD[tcdIndex], (uint32_t)kEDMA_MajorInterruptEnable);
  681. handle->state = (uint32_t)kSAI_BusyLoopTransfer;
  682. break;
  683. }
  684. else
  685. {
  686. EDMA_TcdSetTransferConfig(&currentTCD[tcdIndex], &config, &currentTCD[tcdIndex + 1U]);
  687. EDMA_TcdEnableInterrupts(&currentTCD[tcdIndex], (uint32_t)kEDMA_MajorInterruptEnable);
  688. }
  689. tcdIndex = tcdIndex + 1U;
  690. }
  691. EDMA_InstallTCD(handle->dmaHandle->base, handle->dmaHandle->channel, &currentTCD[0]);
  692. /* Start DMA transfer */
  693. EDMA_StartTransfer(handle->dmaHandle);
  694. /* Enable DMA enable bit */
  695. SAI_RxEnableDMA(base, kSAI_FIFORequestDMAEnable, true);
  696. /* Enable the channel FIFO */
  697. base->RCR3 |= I2S_RCR3_RCE(1UL << handle->channel);
  698. /* Enable SAI Rx clock */
  699. SAI_RxEnable(base, true);
  700. return kStatus_Success;
  701. }
  702. /*!
  703. * brief Aborts a SAI transfer using eDMA.
  704. *
  705. * This function only aborts the current transfer slots, the other transfer slots' information still kept
  706. * in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateSendEDMA.
  707. *
  708. * param base SAI base pointer.
  709. * param handle SAI eDMA handle pointer.
  710. */
  711. void SAI_TransferAbortSendEDMA(I2S_Type *base, sai_edma_handle_t *handle)
  712. {
  713. assert(handle != NULL);
  714. /* Disable dma */
  715. EDMA_AbortTransfer(handle->dmaHandle);
  716. /* Disable the channel FIFO */
  717. base->TCR3 &= ~I2S_TCR3_TCE_MASK;
  718. /* Disable DMA enable bit */
  719. SAI_TxEnableDMA(base, kSAI_FIFORequestDMAEnable, false);
  720. /* Disable Tx */
  721. SAI_TxEnable(base, false);
  722. /* If Tx is disabled, reset the FIFO pointer and clear error flags */
  723. if ((base->TCSR & I2S_TCSR_TE_MASK) == 0UL)
  724. {
  725. base->TCSR |= (I2S_TCSR_FR_MASK | I2S_TCSR_SR_MASK);
  726. base->TCSR &= ~I2S_TCSR_SR_MASK;
  727. }
  728. /* Handle the queue index */
  729. (void)memset(&handle->saiQueue[handle->queueDriver], 0, sizeof(sai_transfer_t));
  730. handle->queueDriver = (handle->queueDriver + 1U) % (uint8_t)SAI_XFER_QUEUE_SIZE;
  731. /* Set the handle state */
  732. handle->state = (uint32_t)kSAI_Idle;
  733. }
  734. /*!
  735. * brief Aborts a SAI receive using eDMA.
  736. *
  737. * This function only aborts the current transfer slots, the other transfer slots' information still kept
  738. * in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateReceiveEDMA.
  739. *
  740. * param base SAI base pointer.
  741. * param handle SAI eDMA handle pointer.
  742. */
  743. void SAI_TransferAbortReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle)
  744. {
  745. assert(handle != NULL);
  746. /* Disable dma */
  747. EDMA_AbortTransfer(handle->dmaHandle);
  748. /* Disable the channel FIFO */
  749. base->RCR3 &= ~I2S_RCR3_RCE_MASK;
  750. /* Disable DMA enable bit */
  751. SAI_RxEnableDMA(base, kSAI_FIFORequestDMAEnable, false);
  752. /* Disable Rx */
  753. SAI_RxEnable(base, false);
  754. /* If Rx is disabled, reset the FIFO pointer and clear error flags */
  755. if ((base->RCSR & I2S_RCSR_RE_MASK) == 0UL)
  756. {
  757. base->RCSR |= (I2S_RCSR_FR_MASK | I2S_RCSR_SR_MASK);
  758. base->RCSR &= ~I2S_RCSR_SR_MASK;
  759. }
  760. /* Handle the queue index */
  761. (void)memset(&handle->saiQueue[handle->queueDriver], 0, sizeof(sai_transfer_t));
  762. handle->queueDriver = (handle->queueDriver + 1U) % (uint8_t)SAI_XFER_QUEUE_SIZE;
  763. /* Set the handle state */
  764. handle->state = (uint32_t)kSAI_Idle;
  765. }
  766. /*!
  767. * brief Terminate all SAI send.
  768. *
  769. * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
  770. * current transfer slot, please call SAI_TransferAbortSendEDMA.
  771. *
  772. * param base SAI base pointer.
  773. * param handle SAI eDMA handle pointer.
  774. */
  775. void SAI_TransferTerminateSendEDMA(I2S_Type *base, sai_edma_handle_t *handle)
  776. {
  777. assert(handle != NULL);
  778. /* Abort the current transfer */
  779. SAI_TransferAbortSendEDMA(base, handle);
  780. /* Clear all the internal information */
  781. (void)memset(handle->tcd, 0, sizeof(handle->tcd));
  782. (void)memset(handle->saiQueue, 0, sizeof(handle->saiQueue));
  783. (void)memset(handle->transferSize, 0, sizeof(handle->transferSize));
  784. handle->queueUser = 0U;
  785. handle->queueDriver = 0U;
  786. }
  787. /*!
  788. * brief Terminate all SAI receive.
  789. *
  790. * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
  791. * current transfer slot, please call SAI_TransferAbortReceiveEDMA.
  792. *
  793. * param base SAI base pointer.
  794. * param handle SAI eDMA handle pointer.
  795. */
  796. void SAI_TransferTerminateReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle)
  797. {
  798. assert(handle != NULL);
  799. /* Abort the current transfer */
  800. SAI_TransferAbortReceiveEDMA(base, handle);
  801. /* Clear all the internal information */
  802. (void)memset(handle->tcd, 0, sizeof(handle->tcd));
  803. (void)memset(handle->saiQueue, 0, sizeof(handle->saiQueue));
  804. (void)memset(handle->transferSize, 0, sizeof(handle->transferSize));
  805. handle->queueUser = 0U;
  806. handle->queueDriver = 0U;
  807. }
  808. /*!
  809. * brief Gets byte count sent by SAI.
  810. *
  811. * param base SAI base pointer.
  812. * param handle SAI eDMA handle pointer.
  813. * param count Bytes count sent by SAI.
  814. * retval kStatus_Success Succeed get the transfer count.
  815. * retval kStatus_NoTransferInProgress There is no non-blocking transaction in progress.
  816. */
  817. status_t SAI_TransferGetSendCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count)
  818. {
  819. assert(handle != NULL);
  820. status_t status = kStatus_Success;
  821. if (handle->state != (uint32_t)kSAI_Busy)
  822. {
  823. status = kStatus_NoTransferInProgress;
  824. }
  825. else
  826. {
  827. *count = (handle->transferSize[handle->queueDriver] -
  828. (uint32_t)handle->nbytes *
  829. EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
  830. }
  831. return status;
  832. }
  833. /*!
  834. * brief Gets byte count received by SAI.
  835. *
  836. * param base SAI base pointer
  837. * param handle SAI eDMA handle pointer.
  838. * param count Bytes count received by SAI.
  839. * retval kStatus_Success Succeed get the transfer count.
  840. * retval kStatus_NoTransferInProgress There is no non-blocking transaction in progress.
  841. */
  842. status_t SAI_TransferGetReceiveCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count)
  843. {
  844. assert(handle != NULL);
  845. status_t status = kStatus_Success;
  846. if (handle->state != (uint32_t)kSAI_Busy)
  847. {
  848. status = kStatus_NoTransferInProgress;
  849. }
  850. else
  851. {
  852. *count = (handle->transferSize[handle->queueDriver] -
  853. (uint32_t)handle->nbytes *
  854. EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
  855. }
  856. return status;
  857. }
  858. /*!
  859. * @rief Gets valid transfer slot.
  860. *
  861. * This function can be used to query the valid transfer request slot that the application can submit.
  862. * It should be called in the critical section, that means the application could call it in the corresponding callback
  863. * function or disable IRQ before calling it in the application, otherwise, the returned value may not correct.
  864. *
  865. * param base SAI base pointer
  866. * param handle SAI eDMA handle pointer.
  867. * retval valid slot count that application submit.
  868. */
  869. uint32_t SAI_TransferGetValidTransferSlotsEDMA(I2S_Type *base, sai_edma_handle_t *handle)
  870. {
  871. uint32_t validSlot = 0U;
  872. for (uint32_t i = 0U; i < (uint32_t)SAI_XFER_QUEUE_SIZE; i++)
  873. {
  874. if (handle->saiQueue[i].data == NULL)
  875. {
  876. validSlot++;
  877. }
  878. }
  879. return validSlot;
  880. }