fsl_sema4.c 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263
  1. /*
  2. * Copyright 2017-2019 NXP
  3. * All rights reserved.
  4. *
  5. * SPDX-License-Identifier: BSD-3-Clause
  6. */
  7. #include "fsl_sema4.h"
  8. /******************************************************************************
  9. * Definitions
  10. *****************************************************************************/
  11. /* Component ID definition, used by tools. */
  12. #ifndef FSL_COMPONENT_ID
  13. #define FSL_COMPONENT_ID "platform.drivers.sema4"
  14. #endif
  15. /* The first number write to RSTGDP when reset SEMA4 gate. */
  16. #define SEMA4_GATE_RESET_PATTERN_1 (0xE2U)
  17. /* The second number write to RSTGDP when reset SEMA4 gate. */
  18. #define SEMA4_GATE_RESET_PATTERN_2 (0x1DU)
  19. /* The first number write to RSTGDP when reset SEMA4 gate IRQ notification. */
  20. #define SEMA4_GATE_IRQ_RESET_PATTERN_1 (0x47U)
  21. /* The second number write to RSTGDP when reset SEMA4 gate IRQ notification. */
  22. #define SEMA4_GATE_IRQ_RESET_PATTERN_2 (0xB8U)
  23. #define SEMA4_RSTGT_RSTNSM_MASK (0x30U)
  24. #define SEMA4_RSTNTF_RSTNSM_MASK (0x30U)
  25. /*******************************************************************************
  26. * Prototypes
  27. ******************************************************************************/
  28. #if defined(SEMA4_CLOCKS)
  29. /*!
  30. * @brief Get instance number for SEMA4 module.
  31. *
  32. * @param base SEMA4 peripheral base address.
  33. */
  34. uint32_t SEMA4_GetInstance(SEMA4_Type *base);
  35. #endif
  36. /*******************************************************************************
  37. * Variables
  38. ******************************************************************************/
  39. #if defined(SEMA4_CLOCKS)
  40. /*! @brief Pointers to sema4 bases for each instance. */
  41. static SEMA4_Type *const s_sema4Bases[] = SEMA4_BASE_PTRS;
  42. #endif
  43. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  44. #if defined(SEMA4_CLOCKS)
  45. /*! @brief Pointers to sema4 clocks for each instance. */
  46. static const clock_ip_name_t s_sema4Clocks[] = SEMA4_CLOCKS;
  47. #endif
  48. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  49. /******************************************************************************
  50. * CODE
  51. *****************************************************************************/
  52. #if defined(SEMA4_CLOCKS)
  53. uint32_t SEMA4_GetInstance(SEMA4_Type *base)
  54. {
  55. uint32_t instance;
  56. /* Find the instance index from base address mappings. */
  57. for (instance = 0; instance < ARRAY_SIZE(s_sema4Bases); instance++)
  58. {
  59. if (s_sema4Bases[instance] == base)
  60. {
  61. break;
  62. }
  63. }
  64. assert(instance < ARRAY_SIZE(s_sema4Bases));
  65. return instance;
  66. }
  67. #endif
  68. /*!
  69. * brief Initializes the SEMA4 module.
  70. *
  71. * This function initializes the SEMA4 module. It only enables the clock but does
  72. * not reset the gates because the module might be used by other processors
  73. * at the same time. To reset the gates, call either SEMA4_ResetGate or
  74. * SEMA4_ResetAllGates function.
  75. *
  76. * param base SEMA4 peripheral base address.
  77. */
  78. void SEMA4_Init(SEMA4_Type *base)
  79. {
  80. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  81. #if defined(SEMA4_CLOCKS)
  82. CLOCK_EnableClock(s_sema4Clocks[SEMA4_GetInstance(base)]);
  83. #endif
  84. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  85. }
  86. /*!
  87. * brief De-initializes the SEMA4 module.
  88. *
  89. * This function de-initializes the SEMA4 module. It only disables the clock.
  90. *
  91. * param base SEMA4 peripheral base address.
  92. */
  93. void SEMA4_Deinit(SEMA4_Type *base)
  94. {
  95. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  96. #if defined(SEMA4_CLOCKS)
  97. CLOCK_DisableClock(s_sema4Clocks[SEMA4_GetInstance(base)]);
  98. #endif
  99. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  100. }
  101. /*!
  102. * brief Tries to lock the SEMA4 gate.
  103. *
  104. * This function tries to lock the specific SEMA4 gate. If the gate has been
  105. * locked by another processor, this function returns an error code.
  106. *
  107. * param base SEMA4 peripheral base address.
  108. * param gateNum Gate number to lock.
  109. * param procNum Current processor number.
  110. *
  111. * retval kStatus_Success Lock the sema4 gate successfully.
  112. * retval kStatus_Fail Sema4 gate has been locked by another processor.
  113. */
  114. status_t SEMA4_TryLock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum)
  115. {
  116. status_t status;
  117. assert(gateNum < (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT);
  118. ++procNum;
  119. /* Try to lock. */
  120. SEMA4_GATEn(base, gateNum) = procNum;
  121. /* Check locked or not. */
  122. if (procNum != SEMA4_GATEn(base, gateNum))
  123. {
  124. status = kStatus_Fail;
  125. }
  126. else
  127. {
  128. status = kStatus_Success;
  129. }
  130. return status;
  131. }
  132. /*!
  133. * brief Locks the SEMA4 gate.
  134. *
  135. * This function locks the specific SEMA4 gate. If the gate has been
  136. * locked by other processors, this function waits until it is unlocked and then
  137. * lock it.
  138. *
  139. * param base SEMA4 peripheral base address.
  140. * param gateNum Gate number to lock.
  141. * param procNum Current processor number.
  142. */
  143. void SEMA4_Lock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum)
  144. {
  145. assert(gateNum < (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT);
  146. ++procNum;
  147. while (procNum != SEMA4_GATEn(base, gateNum))
  148. {
  149. /* Wait for unlocked status. */
  150. while (0U != SEMA4_GATEn(base, gateNum))
  151. {
  152. }
  153. /* Lock the gate. */
  154. SEMA4_GATEn(base, gateNum) = procNum;
  155. }
  156. }
  157. /*!
  158. * brief Resets the SEMA4 gate to an unlocked status.
  159. *
  160. * This function resets a SEMA4 gate to an unlocked status.
  161. *
  162. * param base SEMA4 peripheral base address.
  163. * param gateNum Gate number.
  164. *
  165. * retval kStatus_Success SEMA4 gate is reset successfully.
  166. * retval kStatus_Fail Some other reset process is ongoing.
  167. */
  168. status_t SEMA4_ResetGate(SEMA4_Type *base, uint8_t gateNum)
  169. {
  170. status_t status;
  171. /*
  172. * Reset all gates if gateNum >= SEMA4_GATE_NUM_RESET_ALL
  173. * Reset specific gate if gateNum < FSL_FEATURE_SEMA4_GATE_COUNT
  174. */
  175. assert(!((gateNum < SEMA4_GATE_NUM_RESET_ALL) && (gateNum >= (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT)));
  176. /* Check whether some reset is ongoing. */
  177. if (0U != (base->RSTGT & SEMA4_RSTGT_RSTNSM_MASK))
  178. {
  179. status = kStatus_Fail;
  180. }
  181. else
  182. {
  183. /* First step. */
  184. base->RSTGT = SEMA4_RSTGT_RSTGSM_RSTGMS_RSTGDP(SEMA4_GATE_RESET_PATTERN_1);
  185. /* Second step. */
  186. base->RSTGT = SEMA4_RSTGT_RSTGSM_RSTGMS_RSTGDP(SEMA4_GATE_RESET_PATTERN_2) | SEMA4_RSTGT_RSTGTN(gateNum);
  187. status = kStatus_Success;
  188. }
  189. return status;
  190. }
  191. /*!
  192. * brief Resets the SEMA4 gate IRQ notification.
  193. *
  194. * This function resets a SEMA4 gate IRQ notification.
  195. *
  196. * param base SEMA4 peripheral base address.
  197. * param gateNum Gate number.
  198. *
  199. * retval kStatus_Success Reset successfully.
  200. * retval kStatus_Fail Some other reset process is ongoing.
  201. */
  202. status_t SEMA4_ResetGateNotify(SEMA4_Type *base, uint8_t gateNum)
  203. {
  204. status_t status;
  205. /*
  206. * Reset all gates if gateNum >= SEMA4_GATE_NUM_RESET_ALL
  207. * Reset specific gate if gateNum < FSL_FEATURE_SEMA4_GATE_COUNT
  208. */
  209. assert(!((gateNum < (uint8_t)SEMA4_GATE_NUM_RESET_ALL) && (gateNum >= (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT)));
  210. /* Check whether some reset is ongoing. */
  211. if (0U != (base->RSTNTF & SEMA4_RSTNTF_RSTNSM_MASK))
  212. {
  213. status = kStatus_Fail;
  214. }
  215. else
  216. {
  217. /* First step. */
  218. base->RSTNTF = SEMA4_RSTNTF_RSTNSM_RSTNMS_RSTNDP(SEMA4_GATE_IRQ_RESET_PATTERN_1);
  219. /* Second step. */
  220. base->RSTNTF = SEMA4_RSTNTF_RSTNSM_RSTNMS_RSTNDP(SEMA4_GATE_IRQ_RESET_PATTERN_2) | SEMA4_RSTNTF_RSTNTN(gateNum);
  221. status = kStatus_Success;
  222. }
  223. return status;
  224. }