fsl_wdog.h 9.8 KB

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  1. /*
  2. * Copyright (c) 2016, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2019 NXP
  4. * All rights reserved.
  5. *
  6. * SPDX-License-Identifier: BSD-3-Clause
  7. */
  8. #ifndef _FSL_WDOG_H_
  9. #define _FSL_WDOG_H_
  10. #include "fsl_common.h"
  11. /*!
  12. * @addtogroup wdog
  13. * @{
  14. */
  15. /*******************************************************************************
  16. * Definitions
  17. *******************************************************************************/
  18. /*! @name Driver version */
  19. /*@{*/
  20. /*! @brief Defines WDOG driver version */
  21. #define FSL_WDOG_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
  22. /*@}*/
  23. /*! @name Refresh sequence */
  24. /*@{*/
  25. #define WDOG_REFRESH_KEY (0xAAAA5555U)
  26. /*@}*/
  27. /*! @brief Defines WDOG work mode. */
  28. typedef struct _wdog_work_mode
  29. {
  30. bool enableWait; /*!< continue or suspend WDOG in wait mode */
  31. bool enableStop; /*!< continue or suspend WDOG in stop mode */
  32. bool enableDebug; /*!< continue or suspend WDOG in debug mode */
  33. } wdog_work_mode_t;
  34. /*! @brief Describes WDOG configuration structure. */
  35. typedef struct _wdog_config
  36. {
  37. bool enableWdog; /*!< Enables or disables WDOG */
  38. wdog_work_mode_t workMode; /*!< Configures WDOG work mode in debug stop and wait mode */
  39. bool enableInterrupt; /*!< Enables or disables WDOG interrupt */
  40. uint16_t timeoutValue; /*!< Timeout value */
  41. uint16_t interruptTimeValue; /*!< Interrupt count timeout value */
  42. bool softwareResetExtension; /*!< software reset extension */
  43. bool enablePowerDown; /*!< power down enable bit */
  44. bool enableTimeOutAssert; /*!< Enable WDOG_B timeout assertion. */
  45. } wdog_config_t;
  46. /*!
  47. * @brief WDOG interrupt configuration structure, default settings all disabled.
  48. *
  49. * This structure contains the settings for all of the WDOG interrupt configurations.
  50. */
  51. enum _wdog_interrupt_enable
  52. {
  53. kWDOG_InterruptEnable = WDOG_WICR_WIE_MASK /*!< WDOG timeout generates an interrupt before reset*/
  54. };
  55. /*!
  56. * @brief WDOG status flags.
  57. *
  58. * This structure contains the WDOG status flags for use in the WDOG functions.
  59. */
  60. enum _wdog_status_flags
  61. {
  62. kWDOG_RunningFlag = WDOG_WCR_WDE_MASK, /*!< Running flag, set when WDOG is enabled*/
  63. kWDOG_PowerOnResetFlag = WDOG_WRSR_POR_MASK, /*!< Power On flag, set when reset is the result of a powerOnReset*/
  64. kWDOG_TimeoutResetFlag = WDOG_WRSR_TOUT_MASK, /*!< Timeout flag, set when reset is the result of a timeout*/
  65. kWDOG_SoftwareResetFlag = WDOG_WRSR_SFTW_MASK, /*!< Software flag, set when reset is the result of a software*/
  66. kWDOG_InterruptFlag = WDOG_WICR_WTIS_MASK /*!< interrupt flag,whether interrupt has occurred or not*/
  67. };
  68. /*******************************************************************************
  69. * API
  70. *******************************************************************************/
  71. #if defined(__cplusplus)
  72. extern "C" {
  73. #endif /* __cplusplus */
  74. /*!
  75. * @name WDOG Initialization and De-initialization.
  76. * @{
  77. */
  78. /*!
  79. * @brief Initializes the WDOG configuration structure.
  80. *
  81. * This function initializes the WDOG configuration structure to default values. The default
  82. * values are as follows.
  83. * @code
  84. * wdogConfig->enableWdog = true;
  85. * wdogConfig->workMode.enableWait = true;
  86. * wdogConfig->workMode.enableStop = false;
  87. * wdogConfig->workMode.enableDebug = false;
  88. * wdogConfig->enableInterrupt = false;
  89. * wdogConfig->enablePowerdown = false;
  90. * wdogConfig->resetExtension = flase;
  91. * wdogConfig->timeoutValue = 0xFFU;
  92. * wdogConfig->interruptTimeValue = 0x04u;
  93. * @endcode
  94. *
  95. * @param config Pointer to the WDOG configuration structure.
  96. * @see wdog_config_t
  97. */
  98. void WDOG_GetDefaultConfig(wdog_config_t *config);
  99. /*!
  100. * @brief Initializes the WDOG.
  101. *
  102. * This function initializes the WDOG. When called, the WDOG runs according to the configuration.
  103. *
  104. * This is an example.
  105. * @code
  106. * wdog_config_t config;
  107. * WDOG_GetDefaultConfig(&config);
  108. * config.timeoutValue = 0xffU;
  109. * config->interruptTimeValue = 0x04u;
  110. * WDOG_Init(wdog_base,&config);
  111. * @endcode
  112. *
  113. * @param base WDOG peripheral base address
  114. * @param config The configuration of WDOG
  115. */
  116. void WDOG_Init(WDOG_Type *base, const wdog_config_t *config);
  117. /*!
  118. * @brief Shuts down the WDOG.
  119. *
  120. * This function shuts down the WDOG.
  121. * Watchdog Enable bit is a write one once only bit. It is not
  122. * possible to clear this bit by a software write, once the bit is set.
  123. * This bit(WDE) can be set/reset only in debug mode(exception).
  124. */
  125. void WDOG_Deinit(WDOG_Type *base);
  126. /*!
  127. * @brief Enables the WDOG module.
  128. *
  129. * This function writes a value into the WDOG_WCR register to enable the WDOG.
  130. * This is a write one once only bit. It is not possible to clear this bit by a software write,
  131. * once the bit is set. only debug mode exception.
  132. * @param base WDOG peripheral base address
  133. */
  134. static inline void WDOG_Enable(WDOG_Type *base)
  135. {
  136. base->WCR |= WDOG_WCR_WDE_MASK;
  137. }
  138. /*!
  139. * @brief Disables the WDOG module.
  140. *
  141. * This function writes a value into the WDOG_WCR register to disable the WDOG.
  142. * This is a write one once only bit. It is not possible to clear this bit by a software write,once the bit is set.
  143. * only debug mode exception
  144. * @param base WDOG peripheral base address
  145. */
  146. static inline void WDOG_Disable(WDOG_Type *base)
  147. {
  148. base->WCR &= ~(uint16_t)WDOG_WCR_WDE_MASK;
  149. }
  150. /*!
  151. * @brief Trigger the system software reset.
  152. *
  153. * This function will write to the WCR[SRS] bit to trigger a software system reset.
  154. * This bit will automatically resets to "1" after it has been asserted to "0".
  155. * Note: Calling this API will reset the system right now, please using it with more attention.
  156. *
  157. * @param base WDOG peripheral base address
  158. */
  159. static inline void WDOG_TriggerSystemSoftwareReset(WDOG_Type *base)
  160. {
  161. base->WCR &= ~(uint16_t)WDOG_WCR_SRS_MASK;
  162. }
  163. /*!
  164. * @brief Trigger an output assertion.
  165. *
  166. * This function will write to the WCR[WDA] bit to trigger WDOG_B signal assertion.
  167. * The WDOG_B signal can be routed to external pin of the chip, the output pin will turn to
  168. * assertion along with WDOG_B signal.
  169. * Note: The WDOG_B signal will remain assert until a power on reset occurred, so, please
  170. * take more attention while calling it.
  171. *
  172. * @param base WDOG peripheral base address
  173. */
  174. static inline void WDOG_TriggerSoftwareSignal(WDOG_Type *base)
  175. {
  176. base->WCR &= ~(uint16_t)WDOG_WCR_WDA_MASK;
  177. }
  178. /*!
  179. * @brief Enables the WDOG interrupt.
  180. *
  181. *This bit is a write once only bit. Once the software does a write access to this bit, it will get
  182. *locked and cannot be reprogrammed until the next system reset assertion
  183. *
  184. * @param base WDOG peripheral base address
  185. * @param mask The interrupts to enable
  186. * The parameter can be combination of the following source if defined.
  187. * @arg kWDOG_InterruptEnable
  188. */
  189. static inline void WDOG_EnableInterrupts(WDOG_Type *base, uint16_t mask)
  190. {
  191. base->WICR |= mask;
  192. }
  193. /*!
  194. * @brief Gets the WDOG all reset status flags.
  195. *
  196. * This function gets all reset status flags.
  197. *
  198. * @code
  199. * uint16_t status;
  200. * status = WDOG_GetStatusFlags (wdog_base);
  201. * @endcode
  202. * @param base WDOG peripheral base address
  203. * @return State of the status flag: asserted (true) or not-asserted (false).@see _wdog_status_flags
  204. * - true: a related status flag has been set.
  205. * - false: a related status flag is not set.
  206. */
  207. uint16_t WDOG_GetStatusFlags(WDOG_Type *base);
  208. /*!
  209. * @brief Clears the WDOG flag.
  210. *
  211. * This function clears the WDOG status flag.
  212. *
  213. * This is an example for clearing the interrupt flag.
  214. * @code
  215. * WDOG_ClearStatusFlags(wdog_base,KWDOG_InterruptFlag);
  216. * @endcode
  217. * @param base WDOG peripheral base address
  218. * @param mask The status flags to clear.
  219. * The parameter could be any combination of the following values.
  220. * kWDOG_TimeoutFlag
  221. */
  222. void WDOG_ClearInterruptStatus(WDOG_Type *base, uint16_t mask);
  223. /*!
  224. * @brief Sets the WDOG timeout value.
  225. *
  226. * This function sets the timeout value.
  227. * This function writes a value into WCR registers.
  228. * The time-out value can be written at any point of time but it is loaded to the counter at the time
  229. * when WDOG is enabled or after the service routine has been performed.
  230. *
  231. * @param base WDOG peripheral base address
  232. * @param timeoutCount WDOG timeout value; count of WDOG clock tick.
  233. */
  234. static inline void WDOG_SetTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)
  235. {
  236. base->WCR = (base->WCR & (uint16_t)~WDOG_WCR_WT_MASK) | WDOG_WCR_WT(timeoutCount);
  237. }
  238. /*!
  239. * @brief Sets the WDOG interrupt count timeout value.
  240. *
  241. * This function sets the interrupt count timeout value.
  242. * This function writes a value into WIC registers which are wirte-once.
  243. * This field is write once only. Once the software does a write access to this field, it will get locked
  244. * and cannot be reprogrammed until the next system reset assertion.
  245. * @param base WDOG peripheral base address
  246. * @param timeoutCount WDOG timeout value; count of WDOG clock tick.
  247. */
  248. static inline void WDOG_SetInterrputTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)
  249. {
  250. base->WICR = (base->WICR & ~(uint16_t)WDOG_WICR_WICT_MASK) | WDOG_WICR_WICT(timeoutCount);
  251. }
  252. /*!
  253. * @brief Disable the WDOG power down enable bit.
  254. *
  255. * This function disable the WDOG power down enable(PDE).
  256. * This function writes a value into WMCR registers which are wirte-once.
  257. * This field is write once only. Once software sets this bit it cannot be reset until the next system reset.
  258. * @param base WDOG peripheral base address
  259. */
  260. static inline void WDOG_DisablePowerDownEnable(WDOG_Type *base)
  261. {
  262. base->WMCR &= ~(uint16_t)WDOG_WMCR_PDE_MASK;
  263. }
  264. /*!
  265. * @brief Refreshes the WDOG timer.
  266. *
  267. * This function feeds the WDOG.
  268. * This function should be called before the WDOG timer is in timeout. Otherwise, a reset is asserted.
  269. *
  270. * @param base WDOG peripheral base address
  271. */
  272. void WDOG_Refresh(WDOG_Type *base);
  273. /*@}*/
  274. #if defined(__cplusplus)
  275. }
  276. #endif /* __cplusplus */
  277. /*! @}*/
  278. #endif /* _FSL_WDOG_H_ */