synopGMAC_plat.h 6.2 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2017-08-24 chinesebear first version
  9. */
  10. #ifndef SYNOP_GMAC_PLAT_H
  11. #define SYNOP_GMAC_PLAT_H 1
  12. /* sw
  13. #include <linux/kernel.h>
  14. #include <asm/io.h>
  15. #include <linux/gfp.h>
  16. #include <linux/slab.h>
  17. #include <linux/pci.h>
  18. */
  19. #include "synopGMAC_types.h"
  20. #include "synopGMAC_debug.h"
  21. //#include "mii.h"
  22. //#include "GMAC_Pmon.h"
  23. //#include "synopGMAC_Host.h"
  24. #include <rtthread.h>
  25. //sw: copy the type define into here
  26. #define IOCTL_READ_REGISTER SIOCDEVPRIVATE+1
  27. #define IOCTL_WRITE_REGISTER SIOCDEVPRIVATE+2
  28. #define IOCTL_READ_IPSTRUCT SIOCDEVPRIVATE+3
  29. #define IOCTL_READ_RXDESC SIOCDEVPRIVATE+4
  30. #define IOCTL_READ_TXDESC SIOCDEVPRIVATE+5
  31. #define IOCTL_POWER_DOWN SIOCDEVPRIVATE+6
  32. #define SYNOP_GMAC0 1
  33. typedef int bool;
  34. //typedef unsigned long dma_addr_t;
  35. #define KUSEG_ADDR 0x0
  36. #define CACHED_MEMORY_ADDR 0x80000000
  37. #define UNCACHED_MEMORY_ADDR 0xa0000000
  38. #define KSEG2_ADDR 0xc0000000
  39. #define MAX_MEM_ADDR 0xbe000000
  40. #define RESERVED_ADDR 0xbfc80000
  41. #define CACHED_TO_PHYS(x) ((unsigned)(x) & 0x7fffffff)
  42. #define PHYS_TO_CACHED(x) ((unsigned)(x) | CACHED_MEMORY_ADDR)
  43. #define UNCACHED_TO_PHYS(x) ((unsigned)(x) & 0x1fffffff)
  44. #define PHYS_TO_UNCACHED(x) ((unsigned)(x) | UNCACHED_MEMORY_ADDR)
  45. #define VA_TO_CINDEX(x) ((unsigned)(x) & 0xffffff | CACHED_MEMORY_ADDR)
  46. #define CACHED_TO_UNCACHED(x) (PHYS_TO_UNCACHED(CACHED_TO_PHYS(x)))
  47. #define VA_TO_PA(x) UNCACHED_TO_PHYS(x)
  48. /* sw
  49. #define TR0(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
  50. #ifdef DEBUG
  51. #undef TR
  52. # define TR(fmt, args...) printk(KERN_CRIT "SynopGMAC: " fmt, ##args)
  53. #else
  54. # define TR(fmt, args...) // not debugging: nothing
  55. #endif
  56. */
  57. /*
  58. #define TR0(fmt, args...) printf("SynopGMAC: " fmt, ##args)
  59. */
  60. /*
  61. #ifdef DEBUG
  62. #undef TR
  63. # define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
  64. #else
  65. //# define TR(fmt, args...) // not debugging: nothing
  66. #define TR(fmt, args...) printf("SynopGMAC: " fmt, ##args)
  67. #endif
  68. */
  69. //sw: nothing to display
  70. #define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
  71. #define TR(fmt, args...) //rt_kprintf(fmt, ##args)
  72. //#define TR rt_kprintf
  73. //typedef int bool;
  74. enum synopGMAC_boolean
  75. {
  76. false = 0,
  77. true = 1
  78. };
  79. #define DEFAULT_DELAY_VARIABLE 10
  80. #define DEFAULT_LOOP_VARIABLE 10000
  81. /* There are platform related endian conversions
  82. *
  83. */
  84. #define LE32_TO_CPU __le32_to_cpu
  85. #define BE32_TO_CPU __be32_to_cpu
  86. #define CPU_TO_LE32 __cpu_to_le32
  87. /* Error Codes */
  88. #define ESYNOPGMACNOERR 0
  89. #define ESYNOPGMACNOMEM 1
  90. #define ESYNOPGMACPHYERR 2
  91. #define ESYNOPGMACBUSY 3
  92. struct Network_interface_data
  93. {
  94. u32 unit;
  95. u32 addr;
  96. u32 data;
  97. };
  98. /**
  99. * These are the wrapper function prototypes for OS/platform related routines
  100. */
  101. void * plat_alloc_memory(u32 );
  102. void plat_free_memory(void *);
  103. //void * plat_alloc_consistent_dmaable_memory(struct pci_dev *, u32, u32 *);
  104. //void plat_free_consistent_dmaable_memory (struct pci_dev *, u32, void *, u32);
  105. void plat_delay(u32);
  106. /**
  107. * The Low level function to read register contents from Hardware.
  108. *
  109. * @param[in] pointer to the base of register map
  110. * @param[in] Offset from the base
  111. * \return Returns the register contents
  112. */
  113. static u32 synopGMACReadReg(u32 RegBase, u32 RegOffset)
  114. {
  115. u32 addr;
  116. u32 data;
  117. addr = RegBase + (u32)RegOffset;
  118. data = *(volatile u32 *)addr;
  119. #if SYNOP_REG_DEBUG
  120. TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
  121. #endif
  122. // rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
  123. return data;
  124. }
  125. /**
  126. * The Low level function to write to a register in Hardware.
  127. *
  128. * @param[in] pointer to the base of register map
  129. * @param[in] Offset from the base
  130. * @param[in] Data to be written
  131. * \return void
  132. */
  133. static void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData )
  134. {
  135. u32 addr;
  136. addr = RegBase + (u32)RegOffset;
  137. // rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
  138. #if SYNOP_REG_DEBUG
  139. TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
  140. #endif
  141. *(volatile u32 *)addr = RegData;
  142. if(addr == 0xbfe1100c)
  143. DEBUG_MES("regdata = %08x\n", RegData);
  144. return;
  145. }
  146. /**
  147. * The Low level function to set bits of a register in Hardware.
  148. *
  149. * @param[in] pointer to the base of register map
  150. * @param[in] Offset from the base
  151. * @param[in] Bit mask to set bits to logical 1
  152. * \return void
  153. */
  154. static void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos)
  155. {
  156. //u64 addr = (u64)RegBase + (u64)RegOffset;
  157. u32 data;
  158. data = synopGMACReadReg(RegBase, RegOffset);
  159. data |= BitPos;
  160. synopGMACWriteReg(RegBase, RegOffset, data);
  161. // writel(data,(void *)addr);
  162. #if SYNOP_REG_DEBUG
  163. TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
  164. #endif
  165. return;
  166. }
  167. /**
  168. * The Low level function to clear bits of a register in Hardware.
  169. *
  170. * @param[in] pointer to the base of register map
  171. * @param[in] Offset from the base
  172. * @param[in] Bit mask to clear bits to logical 0
  173. * \return void
  174. */
  175. static void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos)
  176. {
  177. u32 data;
  178. data = synopGMACReadReg(RegBase, RegOffset);
  179. data &= (~BitPos);
  180. synopGMACWriteReg(RegBase, RegOffset, data);
  181. #if SYNOP_REG_DEBUG
  182. TR("%s !!!!!!!!!!!!! RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, RegOffset, data );
  183. #endif
  184. return;
  185. }
  186. /**
  187. * The Low level function to Check the setting of the bits.
  188. *
  189. * @param[in] pointer to the base of register map
  190. * @param[in] Offset from the base
  191. * @param[in] Bit mask to set bits to logical 1
  192. * \return returns TRUE if set to '1' returns FALSE if set to '0'. Result undefined there are no bit set in the BitPos argument.
  193. *
  194. */
  195. static bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos)
  196. {
  197. u32 data;
  198. data = synopGMACReadReg(RegBase, RegOffset);
  199. data &= BitPos;
  200. if(data) return true;
  201. else return false;
  202. }
  203. #endif