ata_interface.h 2.5 KB

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  1. /*
  2. * Copyright (c) 2006-2020, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-08-19 lizhirui first version
  9. */
  10. #ifndef __ATA_INTERFACE_H__
  11. #define __ATA_INTERFACE_H__
  12. typedef rt_uint8_t u8;
  13. typedef rt_uint16_t u16;
  14. typedef rt_uint32_t u32;
  15. typedef rt_uint64_t u64;
  16. typedef rt_uint64_t ulong;
  17. typedef rt_int8_t s8;
  18. typedef rt_int16_t s16;
  19. typedef rt_int32_t s32;
  20. typedef rt_int64_t s64;
  21. typedef rt_size_t lbaint_t;
  22. #define __iomem
  23. #define mdelay rt_thread_mdelay
  24. #define udelay(...) rt_thread_mdelay(1)
  25. #define cpu_to_le32
  26. #define cpu_to_le16
  27. #define le32_to_cpu
  28. #define le16_to_cpu
  29. #define flush_cache(...)
  30. #define invalidate_dcache_range(...)
  31. #define ARCH_DMA_MINALIGN 1024
  32. #define CONFIG_IS_ENABLED
  33. #define AHCI 1
  34. #define VADDR_TO_PHY(vaddr) (((u64)vaddr) - KSEG0BASE)
  35. #define LOW_PHY(vaddr) ((u32)VADDR_TO_PHY(vaddr))
  36. #define HIGH_PHY(vaddr) ((u32)((VADDR_TO_PHY(vaddr)) >> 32))
  37. #define ALIGN_1(x, a) __ALIGN_MASK((x), (typeof(x))(a)-1)
  38. #define ALIGN_DOWN(x, a) ALIGN_1((x) - ((a)-1), (a))
  39. #define __ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask))
  40. #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a)))
  41. #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a)-1)) == 0)
  42. #define ROUND(a, b) (((a) + (b)-1) & ~((b)-1))
  43. #define PAD_COUNT(s, pad) (((s)-1) / (pad) + 1)
  44. #define PAD_SIZE(s, pad) (PAD_COUNT(s, pad) * pad)
  45. #define ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, pad) \
  46. char __##name[ROUND(PAD_SIZE((size) * sizeof(type), pad), align) + (align - 1)]; \
  47. \
  48. type *name = (type *)ALIGN_1((rt_ubase_t)__##name, align)
  49. #define ALLOC_ALIGN_BUFFER(type, name, size, align) \
  50. ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, 1)
  51. #define ALLOC_CACHE_ALIGN_BUFFER_PAD(type, name, size, pad) \
  52. ALLOC_ALIGN_BUFFER_PAD(type, name, size, ARCH_DMA_MINALIGN, pad)
  53. #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \
  54. ALLOC_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
  55. static inline u32 readl(void *addr)
  56. {
  57. return *((u32 *)addr);
  58. }
  59. static inline void writel(u32 data, void *addr)
  60. {
  61. *((u32 *)addr) = data;
  62. }
  63. static inline int ffs(int word)
  64. {
  65. int r;
  66. if (word == 0)
  67. {
  68. return 0;
  69. }
  70. word &= (-word);
  71. __asm__("clz %0, %1"
  72. : "=r"(r)
  73. : "r"(word));
  74. return 32 - r;
  75. }
  76. static inline void setbits_le32(u32 *addr, u32 value)
  77. {
  78. *addr = value;
  79. }
  80. #endif