drv_gpio.c 6.1 KB

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  1. /* SPDX-License-Identifier: Apache-2.0 */
  2. /* Copyright (c) 2006-2018, RT-Thread Development Team
  3. * Copyright (c) 2020, duhuanpeng<548708880@qq.com>
  4. *
  5. * Change Logs:
  6. * Date Author Notes
  7. * 2015-01-20 Bernard the first version
  8. * 2017-10-20 ZYH add mode open drain and input pull down
  9. * 2020-06-01 Du Huanpeng GPIO driver based on <components/drivers/include/drivers/pin.h>
  10. */
  11. #include <rtthread.h>
  12. #include <drivers/pin.h>
  13. #include <ls2k1000.h>
  14. #include "drv_gpio.h"
  15. #ifdef RT_USING_PIN
  16. #define GPIO_IRQ_NUM (64)
  17. static struct gpio_irq_def _g_gpio_irq_tbl[GPIO_IRQ_NUM];
  18. static void loongson_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
  19. {
  20. struct loongson_gpio *gpio;
  21. rt_uint64_t m;
  22. gpio = (void *)device->user_data;
  23. m = (rt_uint64_t)1 << pin;
  24. switch (mode)
  25. {
  26. case PIN_MODE_OUTPUT:
  27. gpio->GPIO0_OEN &= ~m;
  28. break;
  29. case PIN_MODE_INPUT:
  30. gpio->GPIO0_OEN |= m;
  31. break;
  32. case PIN_MODE_INPUT_PULLUP:
  33. gpio->GPIO0_OEN |= m;
  34. break;
  35. case PIN_MODE_INPUT_PULLDOWN:
  36. gpio->GPIO0_OEN |= m;
  37. break;
  38. case PIN_MODE_OUTPUT_OD:
  39. gpio->GPIO0_OEN &= ~m;
  40. break;
  41. default:
  42. /* error */
  43. rt_kprintf("error\n");
  44. }
  45. }
  46. static void loongson_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
  47. {
  48. struct loongson_gpio *gpio;
  49. rt_uint64_t m;
  50. if (pin < 0 || pin >= 60)
  51. {
  52. rt_kprintf("error\n");
  53. return;
  54. }
  55. gpio = (void *)device->user_data;
  56. m = (rt_uint64_t)1 << pin;
  57. if (value)
  58. gpio->GPIO0_O |= m;
  59. else
  60. gpio->GPIO0_O &= ~m;
  61. }
  62. static int loongson_pin_read(struct rt_device *device, rt_base_t pin)
  63. {
  64. struct loongson_gpio *gpio;
  65. int rc;
  66. gpio = (void *)device->user_data;
  67. rt_uint64_t m;
  68. m = gpio->GPIO0_I;
  69. m &= (rt_uint64_t)1 << pin;
  70. rc = !!m;
  71. return rc;
  72. }
  73. /* TODO: add GPIO interrupt */
  74. static rt_err_t loongson_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args)
  75. {
  76. rt_uint8_t index;
  77. rt_uint64_t m;
  78. struct loongson_gpio *gpio;
  79. gpio = (void *)device->user_data;
  80. if (pin < 4)
  81. {
  82. index = pin;
  83. }
  84. else if (pin < 32)
  85. {
  86. index = 5;
  87. }
  88. else
  89. {
  90. index = 6;
  91. }
  92. _g_gpio_irq_tbl[index].irq_cb[pin] = hdr;
  93. _g_gpio_irq_tbl[index].irq_arg[pin] = args;
  94. _g_gpio_irq_tbl[index].irq_type[pin] = mode;
  95. liointc_set_irq_mode(index, mode);
  96. m = (rt_uint64_t)1 << pin;
  97. gpio->GPIO0_INTEN |= m;
  98. return RT_EOK;
  99. }
  100. static rt_err_t loongson_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
  101. {
  102. struct loongson_gpio *gpio;
  103. gpio = (void *)device->user_data;
  104. rt_uint8_t index;
  105. if (pin < 4)
  106. {
  107. index = pin;
  108. }
  109. else if (pin < 32)
  110. {
  111. index = 5;
  112. }
  113. else
  114. {
  115. index = 6;
  116. }
  117. _g_gpio_irq_tbl[index].irq_cb[pin] = RT_NULL;
  118. _g_gpio_irq_tbl[index].irq_arg[pin] = RT_NULL;
  119. _g_gpio_irq_tbl[index].irq_type[pin] = RT_NULL;
  120. _g_gpio_irq_tbl[index].state[pin] = RT_NULL;
  121. return RT_EOK;
  122. }
  123. static rt_err_t loongson_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
  124. {
  125. struct loongson_gpio *gpio;
  126. gpio = (void *)device->user_data;
  127. rt_uint8_t index;
  128. if (pin < 4)
  129. {
  130. index = pin;
  131. }
  132. else if (pin < 32)
  133. {
  134. index = 5;
  135. }
  136. else
  137. {
  138. index = 6;
  139. }
  140. if (enabled)
  141. _g_gpio_irq_tbl[index].state[pin] = 1;
  142. else
  143. _g_gpio_irq_tbl[index].state[pin] = 0;
  144. return RT_EOK;
  145. }
  146. static void gpio_irq_handler(int irq, void *param)
  147. {
  148. struct gpio_irq_def *irq_def = (struct gpio_irq_def *)param;
  149. rt_uint32_t pin;
  150. rt_uint32_t value;
  151. rt_uint32_t tmpvalue;
  152. if (irq == LS2K_GPIO0_INT_IRQ)
  153. {
  154. pin = 0;
  155. }
  156. else if (irq == LS2K_GPIO1_INT_IRQ)
  157. {
  158. pin = 1;
  159. }
  160. else if (irq == LS2K_GPIO2_INT_IRQ)
  161. {
  162. pin = 2;
  163. }
  164. else if (irq == LS2K_GPIO3_INT_IRQ)
  165. {
  166. pin = 3;
  167. }
  168. else if (irq == LS2K_GPIO_INTLO_IRQ)
  169. {
  170. pin = 4;
  171. }
  172. else
  173. {
  174. pin = 32;
  175. }
  176. while (value)
  177. {
  178. if ((value & 0x1) && (irq_def->irq_cb[pin] != RT_NULL))
  179. {
  180. if (irq_def->state[pin])
  181. {
  182. irq_def->irq_cb[pin](irq_def->irq_arg[pin]);
  183. }
  184. }
  185. pin++;
  186. value = value >> 1;
  187. }
  188. }
  189. static struct rt_pin_ops loongson_pin_ops =
  190. {
  191. .pin_mode = loongson_pin_mode,
  192. .pin_write = loongson_pin_write,
  193. .pin_read = loongson_pin_read,
  194. /* TODO: add GPIO interrupt */
  195. .pin_attach_irq = loongson_pin_attach_irq,
  196. .pin_detach_irq = loongson_pin_detach_irq,
  197. .pin_irq_enable = loongson_pin_irq_enable,
  198. .pin_get = RT_NULL,
  199. };
  200. int loongson_pin_init(void)
  201. {
  202. int rc;
  203. static struct loongson_gpio *loongson_gpio_priv;
  204. loongson_gpio_priv = (void *)GPIO_BASE;
  205. rc = rt_device_pin_register("pin", &loongson_pin_ops, loongson_gpio_priv);
  206. //gpio0
  207. rt_hw_interrupt_install(LS2K_GPIO0_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[0], "gpio0_irq");
  208. rt_hw_interrupt_umask(LS2K_GPIO0_INT_IRQ);
  209. //gpio1
  210. rt_hw_interrupt_install(LS2K_GPIO1_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[1], "gpio1_irq");
  211. rt_hw_interrupt_umask(LS2K_GPIO1_INT_IRQ);
  212. //gpio2
  213. rt_hw_interrupt_install(LS2K_GPIO2_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[2], "gpio2_irq");
  214. rt_hw_interrupt_umask(LS2K_GPIO2_INT_IRQ);
  215. //gpio3
  216. rt_hw_interrupt_install(LS2K_GPIO3_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[3], "gpio3_irq");
  217. rt_hw_interrupt_umask(LS2K_GPIO3_INT_IRQ);
  218. //gpio4~gpio31
  219. rt_hw_interrupt_install(LS2K_GPIO_INTLO_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[4], "gpio4_irq");
  220. rt_hw_interrupt_umask(LS2K_GPIO_INTLO_IRQ);
  221. //gpio32~gpio63
  222. rt_hw_interrupt_install(LS2K_GPIO_INTHI_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[5], "gpio5_irq");
  223. rt_hw_interrupt_umask(LS2K_GPIO_INTHI_IRQ);
  224. return rc;
  225. }
  226. INIT_BOARD_EXPORT(loongson_pin_init);
  227. #endif /*RT_USING_PIN */