lpc_pwm.h 13 KB

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  1. /**********************************************************************
  2. * $Id$ lpc_pwm.h 2011-06-02
  3. *//**
  4. * @file lpc_pwm.h
  5. * @brief Contains all macro definitions and function prototypes
  6. * support for PWM firmware library on LPC
  7. * @version 1.0
  8. * @date 02. June. 2011
  9. * @author NXP MCU SW Application Team
  10. *
  11. * Copyright(C) 2011, NXP Semiconductor
  12. * All rights reserved.
  13. *
  14. ***********************************************************************
  15. * Software that is described herein is for illustrative purposes only
  16. * which provides customers with programming information regarding the
  17. * products. This software is supplied "AS IS" without any warranties.
  18. * NXP Semiconductors assumes no responsibility or liability for the
  19. * use of the software, conveys no license or title under any patent,
  20. * copyright, or mask work right to the product. NXP Semiconductors
  21. * reserves the right to make changes in the software without
  22. * notification. NXP Semiconductors also make no representation or
  23. * warranty that such application will be suitable for the specified
  24. * use without further testing or modification.
  25. * Permission to use, copy, modify, and distribute this software and its
  26. * documentation is hereby granted, under NXP Semiconductors'
  27. * relevant copyright in the software, without fee, provided that it
  28. * is used in conjunction with NXP Semiconductors microcontrollers. This
  29. * copyright, permission, and disclaimer notice must appear in all copies of
  30. * this code.
  31. **********************************************************************/
  32. /* Peripheral group ----------------------------------------------------------- */
  33. /** @defgroup PWM PWM (Pulse Width Modulator)
  34. * @ingroup LPC_CMSIS_FwLib_Drivers
  35. * @{
  36. */
  37. #ifndef __LPC_PWM_H_
  38. #define __LPC_PWM_H_
  39. /* Includes ------------------------------------------------------------------- */
  40. #include "LPC407x_8x_177x_8x.h"
  41. #include "lpc_types.h"
  42. #ifdef __cplusplus
  43. extern "C"
  44. {
  45. #endif
  46. /* Private Macros ------------------------------------------------------------- */
  47. /** @defgroup PWM_Private_Macros PWM Private Macros
  48. * @{
  49. */
  50. /* --------------------- BIT DEFINITIONS -------------------------------------- */
  51. /**********************************************************************
  52. * IR register definitions
  53. **********************************************************************/
  54. /** Interrupt flag for PWM match channel for 6 channel */
  55. #define PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
  56. /** Interrupt flag for capture input */
  57. #define PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4)))
  58. /** IR register mask */
  59. #define PWM_IR_BITMASK ((uint32_t)(0x0000073F))
  60. /**********************************************************************
  61. * TCR register definitions
  62. **********************************************************************/
  63. /** TCR register mask */
  64. #define PWM_TCR_BITMASK ((uint32_t)(0x0000000B))
  65. /** PWM Counter Enable */
  66. #define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0))
  67. /** PWM Counter Reset */
  68. #define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1))
  69. /** PWM Enable */
  70. #define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3))
  71. /**********************************************************************
  72. * CTCR register definitions
  73. **********************************************************************/
  74. /** CTCR register mask */
  75. #define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))
  76. /** PWM Counter-Timer Mode */
  77. #define PWM_CTCR_MODE(n) ((uint32_t)(n&0x03))
  78. /** PWM Capture input select */
  79. #define PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2))
  80. /**********************************************************************
  81. * MCR register definitions
  82. **********************************************************************/
  83. /** MCR register mask */
  84. #define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))
  85. /** generate a PWM interrupt when a MATCHn occurs */
  86. #define PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
  87. /** reset the PWM when a MATCHn occurs */
  88. #define PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
  89. /** stop the PWM when a MATCHn occurs */
  90. #define PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
  91. /**********************************************************************
  92. * CCR register definitions
  93. **********************************************************************/
  94. /** CCR register mask */
  95. #define PWM_CCR_BITMASK ((uint32_t)(0x0000003F))
  96. /** PCAPn is rising edge sensitive */
  97. #define PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
  98. /** PCAPn is falling edge sensitive */
  99. #define PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
  100. /** PWM interrupt is generated on a PCAP event */
  101. #define PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
  102. /**********************************************************************
  103. * PCR register definitions
  104. **********************************************************************/
  105. /** PCR register mask */
  106. #define PWM_PCR_BITMASK (uint32_t)0x00007E7C
  107. /** PWM output n is a single edge controlled output */
  108. #define PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
  109. /** enable PWM output n */
  110. #define PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
  111. /**********************************************************************
  112. * LER register definitions
  113. **********************************************************************/
  114. /** LER register mask*/
  115. #define PWM_LER_BITMASK ((uint32_t)(0x0000007F))
  116. /** PWM MATCHn register update control */
  117. #define PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0))
  118. /**
  119. * @}
  120. */
  121. /* Public Types --------------------------------------------------------------- */
  122. /** @defgroup PWM_Public_Types PWM Public Types
  123. * @{
  124. */
  125. typedef enum
  126. {
  127. PWM_0 = 0,
  128. PWM_1 = 1
  129. } en_PWM_unitId;
  130. /** @brief Configuration structure in PWM TIMER mode */
  131. typedef struct
  132. {
  133. uint8_t PrescaleOption; /**< Prescale option, should be:
  134. - PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value
  135. - PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value
  136. */
  137. uint8_t Reserved[3];
  138. uint32_t PrescaleValue; /**< Prescale value, 32-bit long, should be matched
  139. with PrescaleOption
  140. */
  141. } PWM_TIMERCFG_Type;
  142. /** @brief Configuration structure in PWM COUNTER mode */
  143. typedef struct
  144. {
  145. uint8_t CounterOption; /**< Counter Option, should be:
  146. - PWM_COUNTER_RISING: Rising Edge
  147. - PWM_COUNTER_FALLING: Falling Edge
  148. - PWM_COUNTER_ANY: Both rising and falling mode
  149. */
  150. uint8_t CountInputSelect; /**< Counter input select, should be:
  151. - PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin
  152. - PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin
  153. */
  154. uint8_t Reserved[2];
  155. } PWM_COUNTERCFG_Type;
  156. /** @brief PWM Match channel configuration structure */
  157. typedef struct
  158. {
  159. uint8_t MatchChannel; /**< Match channel, should be in range
  160. from 0..6 */
  161. uint8_t IntOnMatch; /**< Interrupt On match, should be:
  162. - ENABLE: Enable this function.
  163. - DISABLE: Disable this function.
  164. */
  165. uint8_t StopOnMatch; /**< Stop On match, should be:
  166. - ENABLE: Enable this function.
  167. - DISABLE: Disable this function.
  168. */
  169. uint8_t ResetOnMatch; /**< Reset On match, should be:
  170. - ENABLE: Enable this function.
  171. - DISABLE: Disable this function.
  172. */
  173. } PWM_MATCHCFG_Type;
  174. /** @brief PWM Capture Input configuration structure */
  175. typedef struct
  176. {
  177. uint8_t CaptureChannel; /**< Capture channel, should be in range
  178. from 0..1 */
  179. uint8_t RisingEdge; /**< caption rising edge, should be:
  180. - ENABLE: Enable rising edge.
  181. - DISABLE: Disable this function.
  182. */
  183. uint8_t FallingEdge; /**< caption falling edge, should be:
  184. - ENABLE: Enable falling edge.
  185. - DISABLE: Disable this function.
  186. */
  187. uint8_t IntOnCaption; /**< Interrupt On caption, should be:
  188. - ENABLE: Enable interrupt function.
  189. - DISABLE: Disable this function.
  190. */
  191. } PWM_CAPTURECFG_Type;
  192. /* Timer/Counter in PWM configuration type definition -----------------------------------*/
  193. /** @brief PMW TC mode select option */
  194. typedef enum
  195. {
  196. PWM_MODE_TIMER = 0, /*!< PWM using Timer mode */
  197. PWM_MODE_COUNTER, /*!< PWM using Counter mode */
  198. } PWM_TC_MODE_OPT;
  199. #define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
  200. /** @brief PWM Timer/Counter prescale option */
  201. typedef enum
  202. {
  203. PWM_TIMER_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */
  204. PWM_TIMER_PRESCALE_USVAL /*!< Prescale in microsecond value */
  205. } PWM_TIMER_PRESCALE_OPT;
  206. #define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
  207. /** @brief PWM Input Select in counter mode */
  208. typedef enum
  209. {
  210. PWM_COUNTER_PCAP1_0 = 0, /*!< PWM Counter input selected is PCAP1.0 pin */
  211. PWM_COUNTER_PCAP1_1 /*!< PWM counter input selected is CAP1.1 pin */
  212. } PWM_COUNTER_INPUTSEL_OPT;
  213. #define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
  214. /** @brief PWM Input Edge Option in counter mode */
  215. typedef enum
  216. {
  217. PWM_COUNTER_RISING = 1, /*!< Rising edge mode */
  218. PWM_COUNTER_FALLING = 2, /*!< Falling edge mode */
  219. PWM_COUNTER_ANY = 3 /*!< Both rising and falling mode */
  220. } PWM_COUNTER_EDGE_OPT;
  221. #define PARAM_PWM_COUNTER_EDGE(n) ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \
  222. || (n==PWM_COUNTER_ANY))
  223. /* PWM configuration type definition ----------------------------------------------------- */
  224. /** @brief PWM operating mode options */
  225. typedef enum
  226. {
  227. PWM_CHANNEL_SINGLE_EDGE, /*!< PWM Channel Single edge mode */
  228. PWM_CHANNEL_DUAL_EDGE /*!< PWM Channel Dual edge mode */
  229. } PWM_CHANNEL_EDGE_OPT;
  230. #define PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
  231. /** @brief PWM update type */
  232. typedef enum
  233. {
  234. PWM_MATCH_UPDATE_NOW = 0, /**< PWM Match Channel Update Now */
  235. PWM_MATCH_UPDATE_NEXT_RST /**< PWM Match Channel Update on next
  236. PWM Counter resetting */
  237. } PWM_MATCH_UPDATE_OPT;
  238. #define PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))
  239. /** @brief PWM interrupt status type definition ----------------------------------------------------- */
  240. /** @brief PWM Interrupt status type */
  241. typedef enum
  242. {
  243. PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), /**< Interrupt flag for PWM match channel 0 */
  244. PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), /**< Interrupt flag for PWM match channel 1 */
  245. PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), /**< Interrupt flag for PWM match channel 2 */
  246. PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3), /**< Interrupt flag for PWM match channel 3 */
  247. PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), /**< Interrupt flag for capture input 0 */
  248. PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), /**< Interrupt flag for capture input 1 */
  249. PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), /**< Interrupt flag for PWM match channel 4 */
  250. PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5), /**< Interrupt flag for PWM match channel 5 */
  251. PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6), /**< Interrupt flag for PWM match channel 6 */
  252. }PWM_INTSTAT_TYPE;
  253. /**
  254. * @}
  255. */
  256. /* Public Functions ----------------------------------------------------------- */
  257. /** @defgroup PWM_Public_Functions PWM Public Functions
  258. * @{
  259. */
  260. void PWM_PinConfig(uint8_t pwmId, uint8_t PWM_Channel, uint8_t PinselOption);
  261. IntStatus PWM_GetIntStatus(uint8_t pwmId, uint32_t IntFlag);
  262. void PWM_ClearIntPending(uint8_t pwmId, uint32_t IntFlag);
  263. void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct);
  264. void PWM_Init(uint8_t pwmId, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct);
  265. void PWM_DeInit (uint8_t pwmId);
  266. void PWM_Cmd(uint8_t pwmId, FunctionalState NewState);
  267. void PWM_CounterCmd(uint8_t pwmId, FunctionalState NewState);
  268. void PWM_ResetCounter(uint8_t pwmId);
  269. void PWM_ConfigMatch(uint8_t pwmId, PWM_MATCHCFG_Type *PWM_MatchConfigStruct);
  270. void PWM_ConfigCapture(uint8_t pwmId, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct);
  271. uint32_t PWM_GetCaptureValue(uint8_t pwmId, uint8_t CaptureChannel);
  272. void PWM_MatchUpdate(uint8_t pwmId, uint8_t MatchChannel, \
  273. uint32_t MatchValue, uint8_t UpdateType);
  274. void PWM_ChannelConfig(uint8_t pwmId, uint8_t PWMChannel, uint8_t ModeOption);
  275. void PWM_ChannelCmd(uint8_t pwmId, uint8_t PWMChannel, FunctionalState NewState);
  276. /**
  277. * @}
  278. */
  279. #ifdef __cplusplus
  280. }
  281. #endif
  282. #endif /* __LPC_PWM_H_ */
  283. /**
  284. * @}
  285. */
  286. /* --------------------------------- End Of File ------------------------------ */