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lpc_spifi_rom_api.h 8.9 KB

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  1. /***********************************************************************
  2. * Copyright(C) 2011, NXP Semiconductor
  3. * All rights reserved.
  4. *
  5. * Software that is described herein is for illustrative purposes only
  6. * which provides customers with programming information regarding the
  7. * products. This software is supplied "AS IS" without any warranties.
  8. * NXP Semiconductors assumes no responsibility or liability for the
  9. * use of the software, conveys no license or title under any patent,
  10. * copyright, or mask work right to the product. NXP Semiconductors
  11. * reserves the right to make changes in the software without
  12. * notification. NXP Semiconductors also make no representation or
  13. * warranty that such application will be suitable for the specified
  14. * use without further testing or modification.
  15. **********************************************************************/
  16. #ifndef SPIFI_ROM_API_H
  17. #define SPIFI_ROM_API_H
  18. #include <stdint.h>
  19. /* define the symbol TESTING in the environment if test output desired */
  20. /* maintain LONGEST_PROT >= the length (in bytes) of the largest
  21. protection block of any serial flash that this driver handles */
  22. #define LONGEST_PROT 68
  23. typedef uint8_t uc;
  24. #ifndef NULL
  25. #define NULL ((void *)0)
  26. #endif
  27. /* protection/sector descriptors */
  28. typedef struct {
  29. uint32_t base;
  30. uc flags;
  31. int8_t log2;
  32. uint16_t rept;
  33. } protEnt;
  34. /* bits in the flags byte */
  35. enum {RWPROT=1};
  36. /* overall data structure includes # sectors, length of protection reg,
  37. array of descriptors
  38. typedef struct {
  39. uint16_t sectors;
  40. uint16_t protBytes;
  41. protEnt *entries;
  42. } protDesc; */
  43. typedef union {
  44. uint16_t hw;
  45. uc byte[2];
  46. }stat_t;
  47. /* the object that init returns, and other routines use as an operand */
  48. typedef struct {
  49. uint32_t base, regbase, devSize, memSize;
  50. uc mfger, devType, devID, busy;
  51. stat_t stat;
  52. uint16_t reserved;
  53. uint16_t set_prot, write_prot;
  54. uint32_t mem_cmd, prog_cmd;
  55. uint16_t sectors, protBytes;
  56. uint32_t opts, errCheck;
  57. uc erase_shifts[4], erase_ops[4];
  58. protEnt *protEnts;
  59. char prot[LONGEST_PROT];
  60. } SPIFIobj;
  61. /* operands of program and erase */
  62. typedef struct {
  63. char *dest;
  64. uint32_t length;
  65. char *scratch;
  66. int32_t protect;
  67. uint32_t options;
  68. } SPIFIopers;
  69. /* instruction classes for wait_busy */
  70. typedef enum {stat_inst, block_erase, prog_inst, chip_erase} inst_type;
  71. /* bits in options operands (MODE3, RCVCLK, and FULLCLK
  72. have the same relationship as in the Control register) */
  73. #define S_MODE3 1
  74. #define S_MODE0 0
  75. #define S_MINIMAL 2
  76. #define S_MAXIMAL 0
  77. #define S_FORCE_ERASE 4
  78. #define S_ERASE_NOT_REQD 8
  79. #define S_CALLER_ERASE 8
  80. #define S_ERASE_AS_REQD 0
  81. #define S_VERIFY_PROG 0x10
  82. #define S_VERIFY_ERASE 0x20
  83. #define S_NO_VERIFY 0
  84. #define S_RCVCLK 0x80
  85. #define S_INTCLK 0
  86. #define S_FULLCLK 0x40
  87. #define S_HALFCLK 0
  88. #define S_DUAL 0x100
  89. #define S_CALLER_PROT 0x200
  90. #define S_DRIVER_PROT 0
  91. /* the following values in the first post-address memory command byte work
  92. for all known quad devices that support "no opcode" operation */
  93. #define NO_OPCODE_FOLLOWS 0xA5
  94. #define OPCODE_FOLLOWS 0xFF
  95. /* basic SPI commands for serial flash */
  96. #define BASE_READ_CMD (CMD_RD<<OPCODE_SHIFT|4<<FRAMEFORM_SHIFT|UNL_DATA)
  97. #define FAST_READ_CMD (CMD_READ_FAST<<OPCODE_SHIFT|4<<FRAMEFORM_SHIFT|1<<INTLEN_SHIFT|UNL_DATA)
  98. #define BASE_PROG_CMD (CMD_PROG<<OPCODE_SHIFT|4<<FRAMEFORM_SHIFT|DOUT)
  99. /* the length of a standard program command is 256 on all devices */
  100. #define PROG_SIZE 256
  101. /* options in obj->opts (mostly for setMulti) */
  102. /* used by Winbond: send 0xA3 command so hardware can read faster */
  103. #define OPT_SEND_A3 1
  104. /* used by SST: send 0x38 command to enable quad and allow full command set */
  105. #define OPT_SEND_38 2
  106. /* used by Winbond and others: read status reg 2, check it,
  107. if necessary write it back with Quad Enable set */
  108. #define OPT_35_OR02_01 4
  109. /* used by Atmel: read Configuration register, if necessary set Quad Enable */
  110. #define OPT_3F_OR80_3E 8
  111. /* used by Numonyx to set all-quad mode: only for parts that include RSTQIO */
  112. #define OPT_65_CLR_C0_61 0x10
  113. /* used by Numonyx: send 0x81 command to write Volatile Configuration Register
  114. to set # dummy bytes and allow XIP mode */
  115. #define OPT_81 0x20
  116. /* set for devices without full device erase command (Numonyx type 0x40) */
  117. #define OPT_NO_DEV_ERASE 0x40
  118. /* used by Macronix: status reg 2 includes selection between write-protect
  119. in status reg and command-based */
  120. #define OPT_WPSEL 0x80
  121. /* set when protection data has been read into the SPIFI object */
  122. #define OPT_PROT_READ 0x100
  123. /* set if device needs 4-byte address (and maybe 0x4B command = use 4-byte address) */
  124. #define OPT_4BAD 0x200
  125. /* set if setMulti should set the Dual bit in Control reg */
  126. #define OPT_DUAL 0x400
  127. /* send "# dummy bits" in C0 command to Winbond */
  128. #define OPT_C0 0x800
  129. /* set QE for Chingis */
  130. #define OPT_05_OR40_01 0x1000
  131. /* write status does not go busy */
  132. #define OPT_01_NO_BUSY 0x2000
  133. /* protection mode bits moved from protMode byte to opts Fri May 13 2011 */
  134. #define OPT_PROT_STAT 0x4000
  135. #define OPT_PROT_REG 0x8000
  136. #define OPT_PROT_CMD3 0x10000
  137. #define OPT_PROT_CMDE 0x20000
  138. #define OPT_PROT_MASK 0x3C000
  139. #define OPT_ALL_QUAD 0x40000
  140. #ifndef OMIT_ROM_TABLE
  141. /* interface to ROM API */
  142. typedef struct {
  143. int32_t (*spifi_init) (SPIFIobj *obj, uint32_t csHigh, uint32_t options,
  144. uint32_t mhz);
  145. int32_t (*spifi_program) (SPIFIobj *obj, char *source, SPIFIopers *opers);
  146. int32_t (*spifi_erase) (SPIFIobj *obj, SPIFIopers *opers);
  147. /* mode switching */
  148. void (*cancel_mem_mode)(SPIFIobj *obj);
  149. void (*set_mem_mode) (SPIFIobj *obj);
  150. /* mid level functions */
  151. int32_t (*checkAd) (SPIFIobj *obj, SPIFIopers *opers);
  152. int32_t (*setProt) (SPIFIobj *obj, SPIFIopers *opers, char *change,
  153. char *saveProt);
  154. int32_t (*check_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
  155. uint32_t check_program);
  156. int32_t (*send_erase_cmd) (SPIFIobj *obj, uint8_t op, uint32_t addr);
  157. uint32_t (*ck_erase) (SPIFIobj *obj, uint32_t *addr, uint32_t length);
  158. int32_t (*prog_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
  159. uint32_t *left_in_page);
  160. uint32_t (*ck_prog) (SPIFIobj *obj, char *source, char *dest, uint32_t length);
  161. /* low level functions */
  162. void(*setSize) (SPIFIobj *obj, int32_t value);
  163. int32_t (*setDev) (SPIFIobj *obj, uint32_t opts, uint32_t mem_cmd,
  164. uint32_t prog_cmd);
  165. uint32_t (*cmd) (uc op, uc addrLen, uc intLen, uint16_t len);
  166. uint32_t (*readAd) (SPIFIobj *obj, uint32_t cmd, uint32_t addr);
  167. void (*send04) (SPIFIobj *obj, uc op, uc len, uint32_t value);
  168. void (*wren_sendAd) (SPIFIobj *obj, uint32_t cmd, uint32_t addr, uint32_t value);
  169. int32_t (*write_stat) (SPIFIobj *obj, uc len, uint16_t value);
  170. int32_t (*wait_busy) (SPIFIobj *obj, uc prog_or_erase);
  171. } SPIFI_RTNS;
  172. #define define_spifi_romPtr(name) const SPIFI_RTNS *name=*((SPIFI_RTNS **)SPIFI_ROM_PTR)
  173. #endif /* OMIT_ROM_TABLE */
  174. #ifdef USE_SPIFI_LIB
  175. extern SPIFI_RTNS spifi_table;
  176. #endif /* USE_SPIFI_LIB */
  177. /* example of using this interface:
  178. #include "spifi_rom_api.h"
  179. #define CSHIGH 4
  180. #define SPIFI_MHZ 80
  181. #define source_data_ad (char *)1234
  182. int32_t rc;
  183. SPIFIopers opers;
  184. define_spifi_romPtr(spifi);
  185. SPIFIobj *obj = malloc(sizeof(SPIFIobj));
  186. if (!obj) { can't allocate memory }
  187. rc = spifi->spifi_init (obj, CSHIGH, S_FULLCLK+S_RCVCLK, SPIFI_MHZ);
  188. if (rc) { investigate init error rc }
  189. printf ("the serial flash contains %d bytes\n", obj->devSize);
  190. opers.dest = where_to_program;
  191. opers.length = how_many_bytes;
  192. opers.scratch = NULL; // unprogrammed data is not saved/restored
  193. opers.protect = -1; // save & restore protection
  194. opers.options = S_VERIFY_PROG;
  195. rc = spifi->spifi_program (obj, source_data_ad, &opers);
  196. if (rc) { investigate program error rc }
  197. */
  198. /* these are for normal users, including boot code */
  199. int32_t spifi_init (SPIFIobj *obj, uint32_t csHigh, uint32_t options, uint32_t mhz);
  200. int32_t spifi_program (SPIFIobj *obj, char *source, SPIFIopers *opers);
  201. int32_t spifi_erase (SPIFIobj *obj, SPIFIopers *opers);
  202. /* these are used by the manufacturer-specific init functions */
  203. void setSize (SPIFIobj *obj, int32_t value);
  204. int32_t setDev (SPIFIobj *obj, uint32_t opts, uint32_t mem_cmd, uint32_t prog_cmd);
  205. uint32_t read04(SPIFIobj *obj, uc op, uc len);
  206. int32_t write_stat (SPIFIobj *obj, uc len, uint16_t value);
  207. void setProtEnts(SPIFIobj *obj, const protEnt *p, uint32_t protTabLen);
  208. /* needs to be defined for each platform */
  209. void pullMISO(int high);
  210. #ifdef TESTING
  211. /* used by testing code */
  212. unsigned short getProtBytes (SPIFIobj *obj, unsigned short *sectors);
  213. /* predeclare a debug routine */
  214. void wait_sample (volatile unsigned *addr, unsigned mask, unsigned value);
  215. #endif
  216. #endif /* SPIFI_ROM_API_H */