lpc_ssp.c 25 KB

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  1. /**********************************************************************
  2. * $Id$ lpc_ssp.c 2011-06-02
  3. *//**
  4. * @file lpc_ssp.c
  5. * @brief Contains all functions support for SSP firmware library
  6. * on LPC
  7. * @version 1.0
  8. * @date 02. June. 2011
  9. * @author NXP MCU SW Application Team
  10. *
  11. * Copyright(C) 2011, NXP Semiconductor
  12. * All rights reserved.
  13. *
  14. ***********************************************************************
  15. * Software that is described herein is for illustrative purposes only
  16. * which provides customers with programming information regarding the
  17. * products. This software is supplied "AS IS" without any warranties.
  18. * NXP Semiconductors assumes no responsibility or liability for the
  19. * use of the software, conveys no license or title under any patent,
  20. * copyright, or mask work right to the product. NXP Semiconductors
  21. * reserves the right to make changes in the software without
  22. * notification. NXP Semiconductors also make no representation or
  23. * warranty that such application will be suitable for the specified
  24. * use without further testing or modification.
  25. * Permission to use, copy, modify, and distribute this software and its
  26. * documentation is hereby granted, under NXP Semiconductors'
  27. * relevant copyright in the software, without fee, provided that it
  28. * is used in conjunction with NXP Semiconductors microcontrollers. This
  29. * copyright, permission, and disclaimer notice must appear in all copies of
  30. * this code.
  31. **********************************************************************/
  32. /* Peripheral group ----------------------------------------------------------- */
  33. /** @addtogroup SSP
  34. * @{
  35. */
  36. #ifdef __BUILD_WITH_EXAMPLE__
  37. #include "lpc_libcfg.h"
  38. #else
  39. #include "lpc_libcfg_default.h"
  40. #endif /* __BUILD_WITH_EXAMPLE__ */
  41. #ifdef _SSP
  42. /* Includes ------------------------------------------------------------------- */
  43. #include "lpc_ssp.h"
  44. #include "lpc_clkpwr.h"
  45. /* Public Functions ----------------------------------------------------------- */
  46. /** @addtogroup SSP_Public_Functions
  47. * @{
  48. */
  49. static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock);
  50. /*********************************************************************//**
  51. * @brief Setup clock rate for SSP device
  52. * @param[in] SSPx SSP peripheral definition, should be:
  53. * - LPC_SSP0: SSP0 peripheral
  54. * - LPC_SSP1: SSP1 peripheral
  55. * @param[in] target_clock : clock of SSP (Hz)
  56. * @return None
  57. ***********************************************************************/
  58. static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock)
  59. {
  60. uint32_t prescale, cr0_div, cmp_clk, ssp_clk;
  61. ssp_clk = CLKPWR_GetCLK (CLKPWR_CLKTYPE_PER);
  62. /* Find closest divider to get at or under the target frequency.
  63. Use smallest prescale possible and rely on the divider to get
  64. the closest target frequency */
  65. cr0_div = 0;
  66. cmp_clk = 0xFFFFFFFF;
  67. prescale = 2;
  68. while (cmp_clk > target_clock)
  69. {
  70. cmp_clk = ssp_clk / ((cr0_div + 1) * prescale);
  71. if (cmp_clk > target_clock)
  72. {
  73. cr0_div++;
  74. if (cr0_div > 0xFF)
  75. {
  76. cr0_div = 0;
  77. prescale += 2;
  78. }
  79. }
  80. }
  81. /* Write computed prescaler and divider back to register */
  82. SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK;
  83. SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK;
  84. SSPx->CPSR = prescale & SSP_CPSR_BITMASK;
  85. }
  86. /**
  87. * @}
  88. */
  89. /* Public Functions ----------------------------------------------------------- */
  90. /** @addtogroup SSP_Public_Functions
  91. * @{
  92. */
  93. /********************************************************************//**
  94. * @brief Initializes the SSPx peripheral according to the specified
  95. * parameters in the SSP_ConfigStruct.
  96. * @param[in] SSPx SSP peripheral selected, should be:
  97. * - LPC_SSP0: SSP0 peripheral
  98. * - LPC_SSP1: SSP1 peripheral
  99. * @param[in] SSP_ConfigStruct Pointer to a SSP_CFG_Type structure
  100. * that contains the configuration information for the
  101. * specified SSP peripheral.
  102. * @return None
  103. *********************************************************************/
  104. void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
  105. {
  106. uint32_t tmp;
  107. if(SSPx == LPC_SSP0) {
  108. /* Set up clock and power for SSP0 module */
  109. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, ENABLE);
  110. } else if(SSPx == LPC_SSP1) {
  111. /* Set up clock and power for SSP1 module */
  112. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, ENABLE);
  113. } else if(SSPx == LPC_SSP2) {
  114. /* Set up clock and power for SSP1 module */
  115. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP2, ENABLE);
  116. } else {
  117. return;
  118. }
  119. /* Configure SSP, interrupt is disable, LoopBack mode is disable,
  120. * SSP is disable, Slave output is disable as default
  121. */
  122. tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \
  123. | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit))
  124. & SSP_CR0_BITMASK;
  125. // write back to SSP control register
  126. SSPx->CR0 = tmp;
  127. tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK;
  128. // Write back to CR1
  129. SSPx->CR1 = tmp;
  130. // Set clock rate for SSP peripheral
  131. setSSPclock(SSPx, SSP_ConfigStruct->ClockRate);
  132. }
  133. /*********************************************************************//**
  134. * @brief De-initializes the SSPx peripheral registers to their
  135. * default reset values.
  136. * @param[in] SSPx SSP peripheral selected, should be:
  137. * - LPC_SSP0: SSP0 peripheral
  138. * - LPC_SSP1: SSP1 peripheral
  139. * @return None
  140. **********************************************************************/
  141. void SSP_DeInit(LPC_SSP_TypeDef* SSPx)
  142. {
  143. if (SSPx == LPC_SSP0){
  144. /* Set up clock and power for SSP0 module */
  145. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, DISABLE);
  146. } else if (SSPx == LPC_SSP1) {
  147. /* Set up clock and power for SSP1 module */
  148. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, DISABLE);
  149. } else if (SSPx == LPC_SSP2) {
  150. /* Set up clock and power for SSP1 module */
  151. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP2, DISABLE);
  152. }
  153. }
  154. /*****************************************************************************//**
  155. * @brief Get data size bit selected
  156. * @param[in] SSPx pointer to LPC_SSP_TypeDef structure, should be:
  157. * - LPC_SSP0: SSP0 peripheral
  158. * - LPC_SSP1: SSP1 peripheral
  159. * @return Data size, could be:
  160. * - SSP_DATABIT_4: 4 bit transfer
  161. * - SSP_DATABIT_5: 5 bit transfer
  162. * ...
  163. * - SSP_DATABIT_16: 16 bit transfer
  164. *******************************************************************************/
  165. uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx)
  166. {
  167. return (SSPx->CR0 & (0xF));
  168. }
  169. /*****************************************************************************//**
  170. * @brief Fills each SSP_InitStruct member with its default value:
  171. * - CPHA = SSP_CPHA_FIRST
  172. * - CPOL = SSP_CPOL_HI
  173. * - ClockRate = 1000000
  174. * - Databit = SSP_DATABIT_8
  175. * - Mode = SSP_MASTER_MODE
  176. * - FrameFormat = SSP_FRAME_SSP
  177. * @param[in] SSP_InitStruct Pointer to a SSP_CFG_Type structure
  178. * which will be initialized.
  179. * @return None
  180. *******************************************************************************/
  181. void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct)
  182. {
  183. SSP_InitStruct->CPHA = SSP_CPHA_FIRST;
  184. SSP_InitStruct->CPOL = SSP_CPOL_HI;
  185. SSP_InitStruct->ClockRate = 1000000;
  186. SSP_InitStruct->Databit = SSP_DATABIT_8;
  187. SSP_InitStruct->Mode = SSP_MASTER_MODE;
  188. SSP_InitStruct->FrameFormat = SSP_FRAME_SPI;
  189. }
  190. /*********************************************************************//**
  191. * @brief Enable or disable SSP peripheral's operation
  192. * @param[in] SSPx SSP peripheral, should be:
  193. * - LPC_SSP0: SSP0 peripheral
  194. * - LPC_SSP1: SSP1 peripheral
  195. * @param[in] NewState New State of SSPx peripheral's operation
  196. * @return none
  197. **********************************************************************/
  198. void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
  199. {
  200. if (NewState == ENABLE)
  201. {
  202. SSPx->CR1 |= SSP_CR1_SSP_EN;
  203. }
  204. else
  205. {
  206. SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;
  207. }
  208. }
  209. /*********************************************************************//**
  210. * @brief Enable or disable Loop Back mode function in SSP peripheral
  211. * @param[in] SSPx SSP peripheral selected, should be:
  212. * - LPC_SSP0: SSP0 peripheral
  213. * - LPC_SSP1: SSP1 peripheral
  214. * @param[in] NewState New State of Loop Back mode, should be:
  215. * - ENABLE: Enable this function
  216. * - DISABLE: Disable this function
  217. * @return None
  218. **********************************************************************/
  219. void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
  220. {
  221. if (NewState == ENABLE)
  222. {
  223. SSPx->CR1 |= SSP_CR1_LBM_EN;
  224. }
  225. else
  226. {
  227. SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK;
  228. }
  229. }
  230. /*********************************************************************//**
  231. * @brief Enable or disable Slave Output function in SSP peripheral
  232. * @param[in] SSPx SSP peripheral selected, should be:
  233. * - LPC_SSP0: SSP0 peripheral
  234. * - LPC_SSP1: SSP1 peripheral
  235. * @param[in] NewState New State of Slave Output function, should be:
  236. * - ENABLE: Slave Output in normal operation
  237. * - DISABLE: Slave Output is disabled. This blocks
  238. * SSP controller from driving the transmit data
  239. * line (MISO)
  240. * Note: This function is available when SSP peripheral in Slave mode
  241. * @return None
  242. **********************************************************************/
  243. void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
  244. {
  245. if (NewState == ENABLE)
  246. {
  247. SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK;
  248. }
  249. else
  250. {
  251. SSPx->CR1 |= SSP_CR1_SO_DISABLE;
  252. }
  253. }
  254. /*********************************************************************//**
  255. * @brief Transmit a single data through SSPx peripheral
  256. * @param[in] SSPx SSP peripheral selected, should be:
  257. * - LPC_SSP0: SSP0 peripheral
  258. * - LPC_SSP1: SSP1 peripheral
  259. * @param[in] Data Data to transmit (must be 16 or 8-bit long,
  260. * this depend on SSP data bit number configured)
  261. * @return none
  262. **********************************************************************/
  263. void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data)
  264. {
  265. SSPx->DR = SSP_DR_BITMASK(Data);
  266. }
  267. /*********************************************************************//**
  268. * @brief Receive a single data from SSPx peripheral
  269. * @param[in] SSPx SSP peripheral selected, should be
  270. * - LPC_SSP0: SSP0 peripheral
  271. * - LPC_SSP1: SSP1 peripheral
  272. * @return Data received (16-bit long)
  273. **********************************************************************/
  274. uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx)
  275. {
  276. return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR)));
  277. }
  278. /*********************************************************************//**
  279. * @brief SSP Read write data function
  280. * @param[in] SSPx Pointer to SSP peripheral, should be
  281. * - LPC_SSP0: SSP0 peripheral
  282. * - LPC_SSP1: SSP1 peripheral
  283. * @param[in] dataCfg Pointer to a SSP_DATA_SETUP_Type structure that
  284. * contains specified information about transmit
  285. * data configuration.
  286. * @param[in] xfType Transfer type, should be:
  287. * - SSP_TRANSFER_POLLING: Polling mode
  288. * - SSP_TRANSFER_INTERRUPT: Interrupt mode
  289. * @return Actual Data length has been transferred in polling mode.
  290. * In interrupt mode, always return (0)
  291. * Return (-1) if error.
  292. * Note: This function can be used in both master and slave mode.
  293. ***********************************************************************/
  294. int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
  295. SSP_TRANSFER_Type xfType)
  296. {
  297. uint8_t *rdata8;
  298. uint8_t *wdata8;
  299. uint16_t *rdata16;
  300. uint16_t *wdata16;
  301. uint32_t stat;
  302. uint32_t tmp;
  303. int32_t dataword;
  304. dataCfg->rx_cnt = 0;
  305. dataCfg->tx_cnt = 0;
  306. dataCfg->status = 0;
  307. /* Clear all remaining data in RX FIFO */
  308. while (SSPx->SR & SSP_SR_RNE){
  309. tmp = (uint32_t) SSP_ReceiveData(SSPx);
  310. }
  311. // Clear status
  312. SSPx->ICR = SSP_ICR_BITMASK;
  313. if(SSP_GetDataSize(SSPx)>SSP_DATABIT_8)
  314. dataword = 1;
  315. else dataword = 0;
  316. // Polling mode ----------------------------------------------------------------------
  317. if (xfType == SSP_TRANSFER_POLLING){
  318. if (dataword == 0){
  319. rdata8 = (uint8_t *)dataCfg->rx_data;
  320. wdata8 = (uint8_t *)dataCfg->tx_data;
  321. } else {
  322. rdata16 = (uint16_t *)dataCfg->rx_data;
  323. wdata16 = (uint16_t *)dataCfg->tx_data;
  324. }
  325. while ((dataCfg->tx_cnt < dataCfg->length) || (dataCfg->rx_cnt < dataCfg->length)){
  326. if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){
  327. // Write data to buffer
  328. if(dataCfg->tx_data == NULL){
  329. if (dataword == 0){
  330. SSP_SendData(SSPx, 0xFF);
  331. dataCfg->tx_cnt++;
  332. } else {
  333. SSP_SendData(SSPx, 0xFFFF);
  334. dataCfg->tx_cnt += 2;
  335. }
  336. } else {
  337. if (dataword == 0){
  338. SSP_SendData(SSPx, *wdata8);
  339. wdata8++;
  340. dataCfg->tx_cnt++;
  341. } else {
  342. SSP_SendData(SSPx, *wdata16);
  343. wdata16++;
  344. dataCfg->tx_cnt += 2;
  345. }
  346. }
  347. }
  348. // Check overrun error
  349. if ((stat = SSPx->RIS) & SSP_RIS_ROR){
  350. // save status and return
  351. dataCfg->status = stat | SSP_STAT_ERROR;
  352. return (-1);
  353. }
  354. // Check for any data available in RX FIFO
  355. while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){
  356. // Read data from SSP data
  357. tmp = SSP_ReceiveData(SSPx);
  358. // Store data to destination
  359. if (dataCfg->rx_data != NULL)
  360. {
  361. if (dataword == 0){
  362. *(rdata8) = (uint8_t) tmp;
  363. rdata8++;
  364. } else {
  365. *(rdata16) = (uint16_t) tmp;
  366. rdata16++;
  367. }
  368. }
  369. // Increase counter
  370. if (dataword == 0){
  371. dataCfg->rx_cnt++;
  372. } else {
  373. dataCfg->rx_cnt += 2;
  374. }
  375. }
  376. }
  377. // save status
  378. dataCfg->status = SSP_STAT_DONE;
  379. if (dataCfg->tx_data != NULL){
  380. return dataCfg->tx_cnt;
  381. } else if (dataCfg->rx_data != NULL){
  382. return dataCfg->rx_cnt;
  383. } else {
  384. return (0);
  385. }
  386. }
  387. // Interrupt mode ----------------------------------------------------------------------
  388. else if (xfType == SSP_TRANSFER_INTERRUPT){
  389. while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){
  390. // Write data to buffer
  391. if(dataCfg->tx_data == NULL){
  392. if (dataword == 0){
  393. SSP_SendData(SSPx, 0xFF);
  394. dataCfg->tx_cnt++;
  395. } else {
  396. SSP_SendData(SSPx, 0xFFFF);
  397. dataCfg->tx_cnt += 2;
  398. }
  399. } else {
  400. if (dataword == 0){
  401. SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
  402. dataCfg->tx_cnt++;
  403. } else {
  404. SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
  405. dataCfg->tx_cnt += 2;
  406. }
  407. }
  408. // Check error
  409. if ((stat = SSPx->RIS) & SSP_RIS_ROR){
  410. // save status and return
  411. dataCfg->status = stat | SSP_STAT_ERROR;
  412. return (-1);
  413. }
  414. // Check for any data available in RX FIFO
  415. while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){
  416. // Read data from SSP data
  417. tmp = SSP_ReceiveData(SSPx);
  418. // Store data to destination
  419. if (dataCfg->rx_data != NULL)
  420. {
  421. if (dataword == 0){
  422. *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp;
  423. } else {
  424. *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp;
  425. }
  426. }
  427. // Increase counter
  428. if (dataword == 0){
  429. dataCfg->rx_cnt++;
  430. } else {
  431. dataCfg->rx_cnt += 2;
  432. }
  433. }
  434. }
  435. // If there more data to sent or receive
  436. if ((dataCfg->rx_cnt < dataCfg->length) || (dataCfg->tx_cnt < dataCfg->length)){
  437. // Enable all interrupt
  438. SSPx->IMSC = SSP_IMSC_BITMASK;
  439. } else {
  440. // Save status
  441. dataCfg->status = SSP_STAT_DONE;
  442. }
  443. return (0);
  444. }
  445. return (-1);
  446. }
  447. /*********************************************************************//**
  448. * @brief Checks whether the specified SSP status flag is set or not
  449. * @param[in] SSPx SSP peripheral selected, should be:
  450. * - LPC_SSP0: SSP0 peripheral
  451. * - LPC_SSP1: SSP1 peripheral
  452. * @param[in] FlagType Type of flag to check status, should be one
  453. * of following:
  454. * - SSP_STAT_TXFIFO_EMPTY: TX FIFO is empty
  455. * - SSP_STAT_TXFIFO_NOTFULL: TX FIFO is not full
  456. * - SSP_STAT_RXFIFO_NOTEMPTY: RX FIFO is not empty
  457. * - SSP_STAT_RXFIFO_FULL: RX FIFO is full
  458. * - SSP_STAT_BUSY: SSP peripheral is busy
  459. * @return New State of specified SSP status flag
  460. **********************************************************************/
  461. FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType)
  462. {
  463. return ((SSPx->SR & FlagType) ? SET : RESET);
  464. }
  465. /*********************************************************************//**
  466. * @brief Enable or disable specified interrupt type in SSP peripheral
  467. * @param[in] SSPx SSP peripheral selected, should be:
  468. * - LPC_SSP0: SSP0 peripheral
  469. * - LPC_SSP1: SSP1 peripheral
  470. * @param[in] IntType Interrupt type in SSP peripheral, should be:
  471. * - SSP_INTCFG_ROR: Receive Overrun interrupt
  472. * - SSP_INTCFG_RT: Receive Time out interrupt
  473. * - SSP_INTCFG_RX: RX FIFO is at least half full interrupt
  474. * - SSP_INTCFG_TX: TX FIFO is at least half empty interrupt
  475. * @param[in] NewState New State of specified interrupt type, should be:
  476. * - ENABLE: Enable this interrupt type
  477. * - DISABLE: Disable this interrupt type
  478. * @return None
  479. * Note: We can enable/disable multi-interrupt type by OR multi value
  480. **********************************************************************/
  481. void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
  482. {
  483. if (NewState == ENABLE)
  484. {
  485. SSPx->IMSC |= IntType;
  486. }
  487. else
  488. {
  489. SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK;
  490. }
  491. }
  492. /*********************************************************************//**
  493. * @brief Check whether the specified Raw interrupt status flag is
  494. * set or not
  495. * @param[in] SSPx SSP peripheral selected, should be:
  496. * - LPC_SSP0: SSP0 peripheral
  497. * - LPC_SSP1: SSP1 peripheral
  498. * @param[in] RawIntType Raw Interrupt Type, should be:
  499. * - SSP_INTSTAT_RAW_ROR: Receive Overrun interrupt
  500. * - SSP_INTSTAT_RAW_RT: Receive Time out interrupt
  501. * - SSP_INTSTAT_RAW_RX: RX FIFO is at least half full interrupt
  502. * - SSP_INTSTAT_RAW_TX: TX FIFO is at least half empty interrupt
  503. * @return New State of specified Raw interrupt status flag in SSP peripheral
  504. * Note: Enabling/Disabling specified interrupt in SSP peripheral does not
  505. * effect to Raw Interrupt Status flag.
  506. **********************************************************************/
  507. IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
  508. {
  509. return ((SSPx->RIS & RawIntType) ? SET : RESET);
  510. }
  511. /*********************************************************************//**
  512. * @brief Get Raw Interrupt Status register
  513. * @param[in] SSPx SSP peripheral selected, should be:
  514. * - LPC_SSP0: SSP0 peripheral
  515. * - LPC_SSP1: SSP1 peripheral
  516. * @return Raw Interrupt Status (RIS) register value
  517. **********************************************************************/
  518. uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx)
  519. {
  520. return (SSPx->RIS);
  521. }
  522. /*********************************************************************//**
  523. * @brief Check whether the specified interrupt status flag is
  524. * set or not
  525. * @param[in] SSPx SSP peripheral selected, should be:
  526. * - LPC_SSP0: SSP0 peripheral
  527. * - LPC_SSP1: SSP1 peripheral
  528. * @param[in] IntType Raw Interrupt Type, should be:
  529. * - SSP_INTSTAT_ROR: Receive Overrun interrupt
  530. * - SSP_INTSTAT_RT: Receive Time out interrupt
  531. * - SSP_INTSTAT_RX: RX FIFO is at least half full interrupt
  532. * - SSP_INTSTAT_TX: TX FIFO is at least half empty interrupt
  533. * @return New State of specified interrupt status flag in SSP peripheral
  534. * Note: Enabling/Disabling specified interrupt in SSP peripheral effects
  535. * to Interrupt Status flag.
  536. **********************************************************************/
  537. IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
  538. {
  539. return ((SSPx->MIS & IntType) ? SET :RESET);
  540. }
  541. /*********************************************************************//**
  542. * @brief Clear specified interrupt pending in SSP peripheral
  543. * @param[in] SSPx SSP peripheral selected, should be:
  544. * - LPC_SSP0: SSP0 peripheral
  545. * - LPC_SSP1: SSP1 peripheral
  546. * @param[in] IntType Interrupt pending to clear, should be:
  547. * - SSP_INTCLR_ROR: clears the "frame was received when
  548. * RxFIFO was full" interrupt.
  549. * - SSP_INTCLR_RT: clears the "Rx FIFO was not empty and
  550. * has not been read for a timeout period" interrupt.
  551. * @return None
  552. **********************************************************************/
  553. void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType)
  554. {
  555. SSPx->ICR = IntType;
  556. }
  557. /*********************************************************************//**
  558. * @brief Enable/Disable DMA function for SSP peripheral
  559. * @param[in] SSPx SSP peripheral selected, should be:
  560. * - LPC_SSP0: SSP0 peripheral
  561. * - LPC_SSP1: SSP1 peripheral
  562. * @param[in] DMAMode Type of DMA, should be:
  563. * - SSP_DMA_TX: DMA for the transmit FIFO
  564. * - SSP_DMA_RX: DMA for the Receive FIFO
  565. * @param[in] NewState New State of DMA function on SSP peripheral,
  566. * should be:
  567. * - ENALBE: Enable this function
  568. * - DISABLE: Disable this function
  569. * @return None
  570. **********************************************************************/
  571. void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
  572. {
  573. if (NewState == ENABLE)
  574. {
  575. SSPx->DMACR |= DMAMode;
  576. }
  577. else
  578. {
  579. SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK;
  580. }
  581. }
  582. /**
  583. * @}
  584. */
  585. #endif /*_SSP*/
  586. /**
  587. * @}
  588. */
  589. /* --------------------------------- End Of File ------------------------------ */