error.h 11 KB

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  1. /*
  2. * @brief Error code returned by Boot ROM drivers/library functions
  3. *
  4. * This file contains unified error codes to be used across driver,
  5. * middleware, applications, hal and demo software.
  6. *
  7. *
  8. * @note
  9. * Copyright(C) NXP Semiconductors, 2012
  10. * All rights reserved.
  11. *
  12. * @par
  13. * Software that is described herein is for illustrative purposes only
  14. * which provides customers with programming information regarding the
  15. * LPC products. This software is supplied "AS IS" without any warranties of
  16. * any kind, and NXP Semiconductors and its licensor disclaim any and
  17. * all warranties, express or implied, including all implied warranties of
  18. * merchantability, fitness for a particular purpose and non-infringement of
  19. * intellectual property rights. NXP Semiconductors assumes no responsibility
  20. * or liability for the use of the software, conveys no license or rights under any
  21. * patent, copyright, mask work right, or any other intellectual property rights in
  22. * or to any products. NXP Semiconductors reserves the right to make changes
  23. * in the software without notification. NXP Semiconductors also makes no
  24. * representation or warranty that such application will be suitable for the
  25. * specified use without further testing or modification.
  26. *
  27. * @par
  28. * Permission to use, copy, modify, and distribute this software and its
  29. * documentation is hereby granted, under NXP Semiconductors' and its
  30. * licensor's relevant copyrights in the software, without fee, provided that it
  31. * is used in conjunction with NXP Semiconductors microcontrollers. This
  32. * copyright, permission, and disclaimer notice must appear in all copies of
  33. * this code.
  34. */
  35. #ifndef __LPC_ERROR_H__
  36. #define __LPC_ERROR_H__
  37. /** Error code returned by Boot ROM drivers/library functions
  38. *
  39. * Error codes are a 32-bit value with :
  40. * - The 16 MSB contains the peripheral code number
  41. * - The 16 LSB contains an error code number associated to that peripheral
  42. *
  43. */
  44. typedef enum
  45. {
  46. /**\b 0x00000000*/ LPC_OK=0, /**< enum value returned on Success */
  47. /**\b 0xFFFFFFFF*/ ERR_FAILED = -1, /**< enum value returned on general failure */
  48. /**\b 0xFFFFFFFE*/ ERR_TIME_OUT = -2, /**< enum value returned on general timeout */
  49. /**\b 0xFFFFFFFD*/ ERR_BUSY = -3, /**< enum value returned when resource is busy */
  50. /* ISP related errors */
  51. ERR_ISP_BASE = 0x00000000,
  52. /*0x00000001*/ ERR_ISP_INVALID_COMMAND = ERR_ISP_BASE + 1,
  53. /*0x00000002*/ ERR_ISP_SRC_ADDR_ERROR, /* Source address not on word boundary */
  54. /*0x00000003*/ ERR_ISP_DST_ADDR_ERROR, /* Destination address not on word or 256 byte boundary */
  55. /*0x00000004*/ ERR_ISP_SRC_ADDR_NOT_MAPPED,
  56. /*0x00000005*/ ERR_ISP_DST_ADDR_NOT_MAPPED,
  57. /*0x00000006*/ ERR_ISP_COUNT_ERROR, /* Byte count is not multiple of 4 or is not a permitted value */
  58. /*0x00000007*/ ERR_ISP_INVALID_SECTOR,
  59. /*0x00000008*/ ERR_ISP_SECTOR_NOT_BLANK,
  60. /*0x00000009*/ ERR_ISP_SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION,
  61. /*0x0000000A*/ ERR_ISP_COMPARE_ERROR,
  62. /*0x0000000B*/ ERR_ISP_BUSY, /* Flash programming hardware interface is busy */
  63. /*0x0000000C*/ ERR_ISP_PARAM_ERROR, /* Insufficient number of parameters */
  64. /*0x0000000D*/ ERR_ISP_ADDR_ERROR, /* Address not on word boundary */
  65. /*0x0000000E*/ ERR_ISP_ADDR_NOT_MAPPED,
  66. /*0x0000000F*/ ERR_ISP_CMD_LOCKED, /* Command is locked */
  67. /*0x00000010*/ ERR_ISP_INVALID_CODE, /* Unlock code is invalid */
  68. /*0x00000011*/ ERR_ISP_INVALID_BAUD_RATE,
  69. /*0x00000012*/ ERR_ISP_INVALID_STOP_BIT,
  70. /*0x00000013*/ ERR_ISP_CODE_READ_PROTECTION_ENABLED,
  71. /*0x00000014*/ ERR_ISP_INVALID_FLASH_UNIT,
  72. /*0x00000015*/ ERR_ISP_USER_CODE_CHECKSUM,
  73. /*0x00000016*/ ERR_ISP_SETTING_ACTIVE_PARTITION,
  74. /*0x00000017*/ ERR_ISP_IRC_NO_POWER,
  75. /*0x00000018*/ ERR_ISP_FLASH_NO_POWER,
  76. /*0x00000019*/ ERR_ISP_EEPROM_NO_POWER,
  77. /*0x0000001A*/ ERR_ISP_EEPROM_NO_CLOCK,
  78. /*0x0000001B*/ ERR_ISP_FLASH_NO_CLOCK,
  79. /*0x0000001C*/ ERR_ISP_REINVOKE_ISP_CONFIG,
  80. /* ROM API related errors */
  81. ERR_API_BASE = 0x00010000,
  82. /**\b 0x00010001*/ ERR_API_INVALID_PARAMS = ERR_API_BASE + 1, /**< Invalid parameters*/
  83. /**\b 0x00010002*/ ERR_API_INVALID_PARAM1, /**< PARAM1 is invalid */
  84. /**\b 0x00010003*/ ERR_API_INVALID_PARAM2, /**< PARAM2 is invalid */
  85. /**\b 0x00010004*/ ERR_API_INVALID_PARAM3, /**< PARAM3 is invalid */
  86. /**\b 0x00010005*/ ERR_API_MOD_INIT, /**< API is called before module init */
  87. /* SPIFI API related errors */
  88. ERR_SPIFI_BASE = 0x00020000,
  89. /*0x00020001*/ ERR_SPIFI_DEVICE_ERROR =ERR_SPIFI_BASE+1,
  90. /*0x00020002*/ ERR_SPIFI_INTERNAL_ERROR,
  91. /*0x00020003*/ ERR_SPIFI_TIMEOUT,
  92. /*0x00020004*/ ERR_SPIFI_OPERAND_ERROR,
  93. /*0x00020005*/ ERR_SPIFI_STATUS_PROBLEM,
  94. /*0x00020006*/ ERR_SPIFI_UNKNOWN_EXT,
  95. /*0x00020007*/ ERR_SPIFI_UNKNOWN_ID,
  96. /*0x00020008*/ ERR_SPIFI_UNKNOWN_TYPE,
  97. /*0x00020009*/ ERR_SPIFI_UNKNOWN_MFG,
  98. /*0x0002000A*/ ERR_SPIFI_NO_DEVICE,
  99. /*0x0002000B*/ ERR_SPIFI_ERASE_NEEDED,
  100. SEC_AES_NO_ERROR=0,
  101. /* Security API related errors */
  102. ERR_SEC_AES_BASE = 0x00030000,
  103. /*0x00030001*/ ERR_SEC_AES_WRONG_CMD=ERR_SEC_AES_BASE+1,
  104. /*0x00030002*/ ERR_SEC_AES_NOT_SUPPORTED,
  105. /*0x00030003*/ ERR_SEC_AES_KEY_ALREADY_PROGRAMMED,
  106. /*0x00030004*/ ERR_SEC_AES_DMA_CHANNEL_CFG,
  107. /*0x00030005*/ ERR_SEC_AES_DMA_MUX_CFG,
  108. /*0x00030006*/ SEC_AES_DMA_BUSY,
  109. /* USB device stack related errors */
  110. ERR_USBD_BASE = 0x00040000,
  111. /**\b 0x00040001*/ ERR_USBD_INVALID_REQ = ERR_USBD_BASE + 1, /**< invalid request */
  112. /**\b 0x00040002*/ ERR_USBD_UNHANDLED, /**< Callback did not process the event */
  113. /**\b 0x00040003*/ ERR_USBD_STALL, /**< Stall the endpoint on which the call back is called */
  114. /**\b 0x00040004*/ ERR_USBD_SEND_ZLP, /**< Send ZLP packet on the endpoint on which the call back is called */
  115. /**\b 0x00040005*/ ERR_USBD_SEND_DATA, /**< Send data packet on the endpoint on which the call back is called */
  116. /**\b 0x00040006*/ ERR_USBD_BAD_DESC, /**< Bad descriptor*/
  117. /**\b 0x00040007*/ ERR_USBD_BAD_CFG_DESC,/**< Bad config descriptor*/
  118. /**\b 0x00040008*/ ERR_USBD_BAD_INTF_DESC,/**< Bad interface descriptor*/
  119. /**\b 0x00040009*/ ERR_USBD_BAD_EP_DESC,/**< Bad endpoint descriptor*/
  120. /**\b 0x0004000a*/ ERR_USBD_BAD_MEM_BUF, /**< Bad alignment of buffer passed. */
  121. /**\b 0x0004000b*/ ERR_USBD_TOO_MANY_CLASS_HDLR, /**< Too many class handlers. */
  122. /* CGU related errors */
  123. ERR_CGU_BASE = 0x00050000,
  124. /*0x00050001*/ ERR_CGU_NOT_IMPL=ERR_CGU_BASE+1,
  125. /*0x00050002*/ ERR_CGU_INVALID_PARAM,
  126. /*0x00050003*/ ERR_CGU_INVALID_SLICE,
  127. /*0x00050004*/ ERR_CGU_OUTPUT_GEN,
  128. /*0x00050005*/ ERR_CGU_DIV_SRC,
  129. /*0x00050006*/ ERR_CGU_DIV_VAL,
  130. /*0x00050007*/ ERR_CGU_SRC,
  131. /* I2C related errors */
  132. ERR_I2C_BASE = 0x00060000,
  133. /*0x00060000*/ ERR_I2C_BUSY = ERR_I2C_BASE,
  134. /*0x00060001*/ ERR_I2C_NAK,
  135. /*0x00060002*/ ERR_I2C_BUFFER_OVERFLOW,
  136. /*0x00060003*/ ERR_I2C_BYTE_COUNT_ERR,
  137. /*0x00060004*/ ERR_I2C_LOSS_OF_ARBRITRATION,
  138. /*0x00060005*/ ERR_I2C_SLAVE_NOT_ADDRESSED,
  139. /*0x00060006*/ ERR_I2C_LOSS_OF_ARBRITRATION_NAK_BIT,
  140. /*0x00060007*/ ERR_I2C_GENERAL_FAILURE,
  141. /*0x00060008*/ ERR_I2C_REGS_SET_TO_DEFAULT,
  142. /*0x00060009*/ ERR_I2C_TIMEOUT,
  143. /*0x0006000A*/ ERR_I2C_BUFFER_UNDERFLOW,
  144. /*0x0006000B*/ ERR_I2C_PARAM,
  145. /* OTP related errors */
  146. ERR_OTP_BASE = 0x00070000,
  147. /*0x00070001*/ ERR_OTP_WR_ENABLE_INVALID = ERR_OTP_BASE+1,
  148. /*0x00070002*/ ERR_OTP_SOME_BITS_ALREADY_PROGRAMMED,
  149. /*0x00070003*/ ERR_OTP_ALL_DATA_OR_MASK_ZERO,
  150. /*0x00070004*/ ERR_OTP_WRITE_ACCESS_LOCKED,
  151. /*0x00070005*/ ERR_OTP_READ_DATA_MISMATCH,
  152. /*0x00070006*/ ERR_OTP_USB_ID_ENABLED,
  153. /*0x00070007*/ ERR_OTP_ETH_MAC_ENABLED,
  154. /*0x00070008*/ ERR_OTP_AES_KEYS_ENABLED,
  155. /*0x00070009*/ ERR_OTP_ILLEGAL_BANK,
  156. /* UART related errors */
  157. ERR_UART_BASE = 0x00080000,
  158. /*0x00080001*/ ERR_UART_RXD_BUSY = ERR_UART_BASE+1, //UART rxd is busy
  159. /*0x00080002*/ ERR_UART_TXD_BUSY, //UART txd is busy
  160. /*0x00080003*/ ERR_UART_OVERRUN_FRAME_PARITY_NOISE, //overrun err, frame err, parity err, RxNoise err
  161. /*0x00080004*/ ERR_UART_UNDERRUN, //underrun err
  162. /*0x00080005*/ ERR_UART_PARAM, //parameter is error
  163. /*0x00080006*/ ERR_UART_BAUDRATE, //baudrate setting is error
  164. /* CAN related errors */
  165. ERR_CAN_BASE = 0x00090000,
  166. /*0x00090001*/ ERR_CAN_BAD_MEM_BUF = ERR_CAN_BASE+1,
  167. /*0x00090002*/ ERR_CAN_INIT_FAIL,
  168. /*0x00090003*/ ERR_CANOPEN_INIT_FAIL,
  169. /* SPIFI Lite API related errors */
  170. ERR_SPIFI_LITE_BASE = 0x000A0000,
  171. /*0x000A0001*/ ERR_SPIFI_LITE_INVALID_ARGUMENTS = ERR_SPIFI_LITE_BASE+1,
  172. /*0x000A0002*/ ERR_SPIFI_LITE_BUSY,
  173. /*0x000A0003*/ ERR_SPIFI_LITE_MEMORY_MODE_ON,
  174. /*0x000A0004*/ ERR_SPIFI_LITE_MEMORY_MODE_OFF,
  175. /*0x000A0005*/ ERR_SPIFI_LITE_IN_DMA,
  176. /*0x000A0006*/ ERR_SPIFI_LITE_NOT_IN_DMA,
  177. /*0x000A0100*/ PENDING_SPIFI_LITE,
  178. /* CLK related errors */
  179. ERR_CLK_BASE = 0x000B0000,
  180. /*0x000B0001*/ ERR_CLK_NOT_IMPL=ERR_CLK_BASE+1,
  181. /*0x000B0002*/ ERR_CLK_INVALID_PARAM,
  182. /*0x000B0003*/ ERR_CLK_INVALID_SLICE,
  183. /*0x000B0004*/ ERR_CLK_OUTPUT_GEN,
  184. /*0x000B0005*/ ERR_CLK_DIV_SRC,
  185. /*0x000B0006*/ ERR_CLK_DIV_VAL,
  186. /*0x000B0007*/ ERR_CLK_SRC,
  187. /*0x000B0008*/ ERR_CLK_PLL_FIN_TOO_SMALL,
  188. /*0x000B0009*/ ERR_CLK_PLL_FIN_TOO_LARGE,
  189. /*0x000B000A*/ ERR_CLK_PLL_FOUT_TOO_SMALL,
  190. /*0x000B000B*/ ERR_CLK_PLL_FOUT_TOO_LARGE,
  191. /*0x000B000C*/ ERR_CLK_PLL_NO_SOLUTION,
  192. /*0x000B000D*/ ERR_CLK_PLL_MIN_PCT,
  193. /*0x000B000E*/ ERR_CLK_PLL_MAX_PCT,
  194. /*0x000B000F*/ ERR_CLK_OSC_FREQ,
  195. /*0x000B0010*/ ERR_CLK_CFG,
  196. /*0x000B0011*/ ERR_CLK_TIMEOUT,
  197. /*0x000B0012*/ ERR_CLK_BASE_OFF,
  198. /*0x000B0013*/ ERR_CLK_OFF_DEADLOCK,
  199. /*Power API*/
  200. ERR_PWR_BASE = 0x000C0000,
  201. /*0x000C0001*/ PWR_ERROR_ILLEGAL_MODE=ERR_PWR_BASE+1,
  202. /*0x000C0002*/ PWR_ERROR_CLOCK_FREQ_TOO_HIGH,
  203. /*0x000C0003*/ PWR_ERROR_INVALID_STATE,
  204. /*0x000C0004*/ PWR_ERROR_INVALID_CFG,
  205. /*0x000C0005*/ PWR_ERROR_PVT_DETECT,
  206. /* DMA related errors */
  207. ERR_DMA_BASE = 0x000D0000,
  208. /*0x000D0001*/ ERR_DMA_ERROR_INT=ERR_DMA_BASE+1,
  209. /*0x000D0002*/ ERR_DMA_CHANNEL_NUMBER,
  210. /*0x000D0003*/ ERR_DMA_CHANNEL_DISABLED,
  211. /*0x000D0004*/ ERR_DMA_BUSY,
  212. /*0x000D0005*/ ERR_DMA_NOT_ALIGNMENT,
  213. /*0x000D0006*/ ERR_DMA_PING_PONG_EN,
  214. /*0x000D0007*/ ERR_DMA_CHANNEL_VALID_PENDING,
  215. /*0x000D0008*/ ERR_DMA_PARAM,
  216. /*0x000D0009*/ ERR_DMA_QUEUE_EMPTY,
  217. /*0x000D000A*/ ERR_DMA_GENERAL,
  218. /* SPI related errors */
  219. ERR_SPI_BASE = 0x000E0000,
  220. /*0x000E0000*/ ERR_SPI_BUSY=ERR_SPI_BASE,
  221. /*0x000E0001*/ ERR_SPI_RXOVERRUN,
  222. /*0x000E0002*/ ERR_SPI_TXUNDERRUN,
  223. /*0x000E0003*/ ERR_SPI_SELNASSERT,
  224. /*0x000E0004*/ ERR_SPI_SELNDEASSERT,
  225. /*0x000E0005*/ ERR_SPI_CLKSTALL,
  226. /*0x000E0006*/ ERR_SPI_PARAM,
  227. /*0x000E0007*/ ERR_SPI_INVALID_LENGTH,
  228. /* ADC related errors */
  229. ERR_ADC_BASE = 0x000F0000,
  230. /*0x000F0001*/ ERR_ADC_OVERRUN=ERR_ADC_BASE+1,
  231. /*0x000F0002*/ ERR_ADC_INVALID_CHANNEL,
  232. /*0x000F0003*/ ERR_ADC_INVALID_SEQUENCE,
  233. /*0x000F0004*/ ERR_ADC_INVALID_SETUP,
  234. /*0x000F0005*/ ERR_ADC_PARAM,
  235. /*0x000F0006*/ ERR_ADC_INVALID_LENGTH,
  236. /*0x000F0007*/ ERR_ADC_NO_POWER,
  237. /* Debugger Mailbox related errors */
  238. ERR_DM_BASE = 0x00100000,
  239. /*0x00100001*/ ERR_DM_NOT_ENTERED=ERR_DM_BASE+1,
  240. /*0x00100002*/ ERR_DM_UNKNOWN_CMD,
  241. /*0x00100003*/ ERR_DM_COMM_FAIL
  242. } ErrorCode_t;
  243. #ifndef offsetof
  244. #define offsetof(s, m) (int) &(((s *) 0)->m)
  245. #endif
  246. #define COMPILE_TIME_ASSERT(pred) switch (0) { \
  247. case 0: \
  248. case pred:; }
  249. #endif /* __LPC_ERROR_H__ */