inmux_8xx.h 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156
  1. /*
  2. * @brief LPC8xx INPUT MUX chip driver
  3. *
  4. * @note
  5. * Copyright(C) NXP Semiconductors, 2013
  6. * All rights reserved.
  7. *
  8. * @par
  9. * Software that is described herein is for illustrative purposes only
  10. * which provides customers with programming information regarding the
  11. * LPC products. This software is supplied "AS IS" without any warranties of
  12. * any kind, and NXP Semiconductors and its licensor disclaim any and
  13. * all warranties, express or implied, including all implied warranties of
  14. * merchantability, fitness for a particular purpose and non-infringement of
  15. * intellectual property rights. NXP Semiconductors assumes no responsibility
  16. * or liability for the use of the software, conveys no license or rights under any
  17. * patent, copyright, mask work right, or any other intellectual property rights in
  18. * or to any products. NXP Semiconductors reserves the right to make changes
  19. * in the software without notification. NXP Semiconductors also makes no
  20. * representation or warranty that such application will be suitable for the
  21. * specified use without further testing or modification.
  22. *
  23. * @par
  24. * Permission to use, copy, modify, and distribute this software and its
  25. * documentation is hereby granted, under NXP Semiconductors' and its
  26. * licensor's relevant copyrights in the software, without fee, provided that it
  27. * is used in conjunction with NXP Semiconductors microcontrollers. This
  28. * copyright, permission, and disclaimer notice must appear in all copies of
  29. * this code.
  30. */
  31. #ifndef __INMUX_8XX_H_
  32. #define __INMUX_8XX_H_
  33. #ifdef __cplusplus
  34. extern "C" {
  35. #endif
  36. /** @defgroup INMUX_8XX CHIP: LPC8xx INPUT Mux Controller driver
  37. * @ingroup CHIP_8XX_Drivers
  38. * @{
  39. */
  40. typedef struct {
  41. __IO uint32_t DMA_INMUX_INMUX[2]; /*!< DMA Trigger Input 20 & 21 PINMUX 0-1 */
  42. __O uint32_t RESERVED[6]; /*!< Reserved; Should not be used */
  43. __IO uint32_t SCT0_INMUX[4]; /*!< Input mux register for SCT0; INPUT0-3 */
  44. } LPC_INMUX_T;
  45. /**
  46. * @brief DMA INPUT MUX Index see Chip_INMUX_SetDMAOTrig()
  47. */
  48. typedef enum {
  49. DMA_INMUX_0, /*!< MUX for DMA input trigger 20 */
  50. DMA_INMUX_1, /*!< MUX for DMA input trigger 21 */
  51. }DMA_INMUX_T;
  52. /**
  53. * @brief SCT Input Mux Index; See Chip_INMUX_SetSCTInMux()
  54. */
  55. typedef enum {
  56. SCT_INMUX_0, /*!< Input mux for SCT0; INPUT 0 */
  57. SCT_INMUX_1, /*!< Input mux for SCT0; INPUT 1 */
  58. SCT_INMUX_2, /*!< Input mux for SCT0; INPUT 2 */
  59. SCT_INMUX_3, /*!< Input mux for SCT0; INPUT 3 */
  60. } SCT_INMUX_T;
  61. /**
  62. * @brief SCT INPUT triggers
  63. */
  64. typedef enum {
  65. SCT_INP_IN0, /*!< SCT0_IN0 selected by Pin Matrix */ /* FIXME: UM hints about changes */
  66. SCT_INP_IN1, /*!< SCT0_IN1 selected by Pin Matrix */
  67. SCT_INP_IN2, /*!< SCT0_IN2 selected by Pin Matrix */
  68. SCT_INP_IN3, /*!< SCT0_IN3 selected by Pin Matrix */
  69. SCT_INP_ADC_THCMP_IRQ, /*!< ADC Threshold compare IRQ */
  70. SCT_INP_ACMP_O, /*!< Analog comparator output */
  71. SCT_INP_ARM_TXEV, /*!< ARM TX Event */
  72. SCT_INP_DEBUG_HALTED, /*!< Debug halted event */
  73. } SCT_INP_T;
  74. /**
  75. * @brief Select a trigger source for a DMA channel
  76. * @param pINMUX : The base of INPUT MUX register block
  77. * @param imux : Index of DMA input mux
  78. * @param ch : DMA channel ID
  79. * @return Nothing
  80. */
  81. STATIC INLINE void Chip_INMUX_SetDMAOTrig(LPC_INMUX_T *pINMUX, DMA_INMUX_T imux, DMA_CHID_T ch)
  82. {
  83. pINMUX->DMA_INMUX_INMUX[imux] = ch;
  84. }
  85. /**
  86. * @brief Select a trigger source SCT module
  87. * @param pINMUX : The base of INPUT MUX register block
  88. * @param isct : Index of SCT input mux
  89. * @param trig : SCT Input function that will cause the trigger
  90. * @return Nothing
  91. */
  92. STATIC INLINE void Chip_INMUX_SetSCTInMux(LPC_INMUX_T *pINMUX, SCT_INMUX_T isct, SCT_INP_T trig)
  93. {
  94. pINMUX->SCT0_INMUX[isct] = trig;
  95. }
  96. /** @defgroup DMATRIGMUX_8XX CHIP: LPC8xx DMA trigger selection driver
  97. * @{
  98. */
  99. /**
  100. * @brief DMA trigger pin muxing structure
  101. */
  102. typedef struct { /*!< DMA trigger pin muxing register structure */
  103. __IO uint32_t DMA_ITRIG_INMUX[MAX_DMA_CHANNEL]; /*!< Trigger input select register for DMA channels */
  104. } LPC_DMATRIGMUX_T;
  105. /* DMA triggers that can mapped to DMA channels */
  106. typedef enum {
  107. DMATRIG_ADC_SEQA_IRQ = 0, /*!< ADC0 sequencer A interrupt as trigger */
  108. DMATRIG_ADC_SEQB_IRQ, /*!< ADC0 sequencer B interrupt as trigger */
  109. DMATRIG_SCT0_DMA0, /*!< SCT 0, DMA 0 as trigger */
  110. DMATRIG_SCT0_DMA1, /*!< SCT 1, DMA 1 as trigger */
  111. DMATRIG_ACMP_O, /*!< Analog comparator output */
  112. DMATRIG_PINT0, /*!< Pin interrupt 0 as trigger */
  113. DMATRIG_PINT1, /*!< Pin interrupt 1 as trigger */
  114. DMATRIG_DMA_INMUX0, /*!< DMA Trigger MUX0 */
  115. DMATRIG_DMA_INMUX1, /*!< DMA Trigger MUX1 */
  116. } DMA_TRIGSRC_T;
  117. /**
  118. * @brief Select a trigger source for a DMA channel
  119. * @param pDMATRIG : The base of DMA trigger setup block on the chip
  120. * @param ch : DMA channel ID
  121. * @param trig : Trigger source for the DMA channel
  122. * @return Nothing
  123. * @note A DMA trigger source only needs to be setup when the DMA is setup
  124. * for hardware trigger mode (when Chip_DMA_SetupChannelConfig() is
  125. * called with DMA_CFG_HWTRIGEN as OR'ed option).
  126. */
  127. STATIC INLINE void Chip_DMATRIGMUX_SetInputTrig(LPC_DMATRIGMUX_T *pDMATRIG, DMA_CHID_T ch, DMA_TRIGSRC_T trig)
  128. {
  129. pDMATRIG->DMA_ITRIG_INMUX[ch] = (uint32_t) trig;
  130. }
  131. /**
  132. * @}
  133. */
  134. /**
  135. * @}
  136. */
  137. #ifdef __cplusplus
  138. }
  139. #endif
  140. #endif /* __INMUX_8XX_H_ */