HAL_gpio.c 17 KB

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  1. /**
  2. ******************************************************************************
  3. * @file HAL_gpio.c
  4. * @author AE Team
  5. * @version V1.1.0
  6. * @date 28/08/2019
  7. * @brief This file provides all the GPIO firmware functions.
  8. ******************************************************************************
  9. * @copy
  10. *
  11. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  12. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  13. * TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
  14. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  15. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  16. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  17. *
  18. * <h2><center>&copy; COPYRIGHT 2019 MindMotion</center></h2>
  19. */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "HAL_gpio.h"
  22. #include "HAL_rcc.h"
  23. /** @addtogroup StdPeriph_Driver
  24. * @{
  25. */
  26. /** @defgroup GPIO
  27. * @brief GPIO driver modules
  28. * @{
  29. */
  30. /** @defgroup GPIO_Private_TypesDefinitions
  31. * @{
  32. */
  33. /**
  34. * @}
  35. */
  36. /** @defgroup GPIO_Private_Defines
  37. * @{
  38. */
  39. /* ------------ RCC registers bit address in the alias region ----------------*/
  40. #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
  41. /* --- EVENTCR Register -----*/
  42. /* Alias word address of EVOE bit */
  43. #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
  44. #define EVOE_BitNumber ((uint8_t)0x07)
  45. #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
  46. #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
  47. #define LSB_MASK ((uint16_t)0xFFFF)
  48. #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
  49. #define DBGAFR_SWJCFG_MASK ((uint32_t)0xFFFFFFFF)
  50. #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
  51. #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
  52. /**
  53. * @}
  54. */
  55. /** @defgroup GPIO_Private_Macros
  56. * @{
  57. */
  58. /**
  59. * @}
  60. */
  61. /** @defgroup GPIO_Private_Variables
  62. * @{
  63. */
  64. /**
  65. * @}
  66. */
  67. /** @defgroup GPIO_Private_FunctionPrototypes
  68. * @{
  69. */
  70. /**
  71. * @}
  72. */
  73. /** @defgroup GPIO_Private_Functions
  74. * @{
  75. */
  76. /**
  77. * @brief Deinitializes the GPIOx peripheral registers to their default
  78. * reset values.
  79. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  80. * @retval : None
  81. */
  82. void GPIO_DeInit(GPIO_TypeDef* GPIOx)
  83. {
  84. /* Check the parameters */
  85. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  86. switch (*(uint32_t*)&GPIOx)
  87. {
  88. case GPIOA_BASE:
  89. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
  90. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
  91. break;
  92. case GPIOB_BASE:
  93. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
  94. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
  95. break;
  96. case GPIOC_BASE:
  97. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
  98. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
  99. break;
  100. case GPIOD_BASE:
  101. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
  102. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
  103. break;
  104. default:
  105. break;
  106. }
  107. }
  108. /**
  109. * @brief Deinitializes the Alternate Functions (remap, event control
  110. * and EXTI configuration) registers to their default reset
  111. * values.
  112. * @param None
  113. * @retval : None
  114. */
  115. void GPIO_AFIODeInit(void)
  116. {
  117. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
  118. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
  119. }
  120. /**
  121. * @brief Initializes the GPIOx peripheral according to the specified
  122. * parameters in the GPIO_InitStruct.
  123. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  124. * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
  125. * contains the configuration information for the specified GPIO
  126. * peripheral.
  127. * @retval : None
  128. */
  129. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
  130. {
  131. uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
  132. uint32_t tmpreg = 0x00, pinmask = 0x00;
  133. /* Check the parameters */
  134. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  135. assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
  136. assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
  137. /*---------------------------- GPIO Mode Configuration -----------------------*/
  138. currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
  139. if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
  140. {
  141. /* Check the parameters */
  142. assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
  143. /* Output mode */
  144. currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
  145. }
  146. /*---------------------------- GPIO CRL Configuration ------------------------*/
  147. /* Configure the eight low port pins */
  148. if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
  149. {
  150. tmpreg = GPIOx->CRL;
  151. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  152. {
  153. pos = ((uint32_t)0x01) << pinpos;
  154. /* Get the port pins position */
  155. currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
  156. if (currentpin == pos)
  157. {
  158. pos = pinpos << 2;
  159. /* Clear the corresponding low control register bits */
  160. pinmask = ((uint32_t)0x0F) << pos;
  161. tmpreg &= ~pinmask;
  162. /* Write the mode configuration in the corresponding bits */
  163. tmpreg |= (currentmode << pos);
  164. /* Reset the corresponding ODR bit */
  165. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  166. {
  167. GPIOx->BRR = (((uint32_t)0x01) << pinpos);
  168. }
  169. else
  170. {
  171. /* Set the corresponding ODR bit */
  172. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  173. {
  174. GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
  175. }
  176. }
  177. }
  178. }
  179. GPIOx->CRL = tmpreg;
  180. }
  181. /*---------------------------- GPIO CRH Configuration ------------------------*/
  182. /* Configure the eight high port pins */
  183. if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
  184. {
  185. tmpreg = GPIOx->CRH;
  186. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  187. {
  188. pos = (((uint32_t)0x01) << (pinpos + 0x08));
  189. /* Get the port pins position */
  190. currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
  191. if (currentpin == pos)
  192. {
  193. pos = pinpos << 2;
  194. /* Clear the corresponding high control register bits */
  195. pinmask = ((uint32_t)0x0F) << pos;
  196. tmpreg &= ~pinmask;
  197. /* Write the mode configuration in the corresponding bits */
  198. tmpreg |= (currentmode << pos);
  199. /* Reset the corresponding ODR bit */
  200. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  201. {
  202. GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
  203. }
  204. /* Set the corresponding ODR bit */
  205. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  206. {
  207. GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
  208. }
  209. }
  210. }
  211. GPIOx->CRH = tmpreg;
  212. }
  213. }
  214. /**
  215. * @brief Fills each GPIO_InitStruct member with its default value.
  216. * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure
  217. * which will be initialized.
  218. * @retval : None
  219. */
  220. void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
  221. {
  222. /* Reset GPIO init structure parameters values */
  223. GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
  224. GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
  225. GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
  226. }
  227. /**
  228. * @brief Reads the specified input port pin.
  229. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  230. * @param GPIO_Pin: specifies the port bit to read.
  231. * This parameter can be GPIO_Pin_x where x can be (0..15).
  232. * @retval : The input port pin value.
  233. */
  234. uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  235. {
  236. uint8_t bitstatus = 0x00;
  237. /* Check the parameters */
  238. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  239. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  240. if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
  241. {
  242. bitstatus = (uint8_t)Bit_SET;
  243. }
  244. else
  245. {
  246. bitstatus = (uint8_t)Bit_RESET;
  247. }
  248. return bitstatus;
  249. }
  250. /**
  251. * @brief Reads the specified GPIO input data port.
  252. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  253. * @retval : GPIO input data port value.
  254. */
  255. uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
  256. {
  257. /* Check the parameters */
  258. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  259. return ((uint16_t)GPIOx->IDR);
  260. }
  261. /**
  262. * @brief Reads the specified output data port bit.
  263. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  264. * @param GPIO_Pin: specifies the port bit to read.
  265. * This parameter can be GPIO_Pin_x where x can be (0..15).
  266. * @retval : The output port pin value.
  267. */
  268. uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  269. {
  270. uint8_t bitstatus = 0x00;
  271. /* Check the parameters */
  272. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  273. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  274. if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
  275. {
  276. bitstatus = (uint8_t)Bit_SET;
  277. }
  278. else
  279. {
  280. bitstatus = (uint8_t)Bit_RESET;
  281. }
  282. return bitstatus;
  283. }
  284. /**
  285. * @brief Reads the specified GPIO output data port.
  286. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  287. * @retval : GPIO output data port value.
  288. */
  289. uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
  290. {
  291. /* Check the parameters */
  292. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  293. return ((uint16_t)GPIOx->ODR);
  294. }
  295. /**
  296. * @brief Sets the selected data port bits.
  297. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  298. * @param GPIO_Pin: specifies the port bits to be written.
  299. * This parameter can be any combination of GPIO_Pin_x where
  300. * x can be (0..15).
  301. * @retval : None
  302. */
  303. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  304. {
  305. /* Check the parameters */
  306. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  307. assert_param(IS_GPIO_PIN(GPIO_Pin));
  308. GPIOx->BSRR = GPIO_Pin;
  309. }
  310. /**
  311. * @brief Clears the selected data port bits.
  312. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  313. * @param GPIO_Pin: specifies the port bits to be written.
  314. * This parameter can be any combination of GPIO_Pin_x where
  315. * x can be (0..15).
  316. * @retval : None
  317. */
  318. void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  319. {
  320. /* Check the parameters */
  321. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  322. assert_param(IS_GPIO_PIN(GPIO_Pin));
  323. GPIOx->BRR = GPIO_Pin;
  324. }
  325. /**
  326. * @brief Sets or clears the selected data port bit.
  327. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  328. * @param GPIO_Pin: specifies the port bit to be written.
  329. * This parameter can be one of GPIO_Pin_x where x can be (0..15).
  330. * @param BitVal: specifies the value to be written to the selected bit.
  331. * This parameter can be one of the BitAction enum values:
  332. * @arg Bit_RESET: to clear the port pin
  333. * @arg Bit_SET: to set the port pin
  334. * @retval : None
  335. */
  336. void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
  337. {
  338. /* Check the parameters */
  339. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  340. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  341. assert_param(IS_GPIO_BIT_ACTION(BitVal));
  342. if (BitVal != Bit_RESET)
  343. {
  344. GPIOx->BSRR = GPIO_Pin;
  345. }
  346. else
  347. {
  348. GPIOx->BRR = GPIO_Pin;
  349. }
  350. }
  351. /**
  352. * @brief Writes data to the specified GPIO data port.
  353. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  354. * @param PortVal: specifies the value to be written to the port output
  355. * data register.
  356. * @retval : None
  357. */
  358. void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
  359. {
  360. /* Check the parameters */
  361. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  362. GPIOx->ODR = PortVal;
  363. }
  364. /**
  365. * @brief Locks GPIO Pins configuration registers.
  366. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  367. * @param GPIO_Pin: specifies the port bit to be written.
  368. * This parameter can be any combination of GPIO_Pin_x where
  369. * x can be (0..15).
  370. * @retval : None
  371. */
  372. void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  373. {
  374. uint32_t tmp = 0x00010000;
  375. /* Check the parameters */
  376. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  377. assert_param(IS_GPIO_PIN(GPIO_Pin));
  378. tmp |= GPIO_Pin;
  379. /* Set LCKK bit */
  380. GPIOx->LCKR = tmp;
  381. /* Reset LCKK bit */
  382. GPIOx->LCKR = GPIO_Pin;
  383. /* Set LCKK bit */
  384. GPIOx->LCKR = tmp;
  385. /* Read LCKK bit*/
  386. tmp = GPIOx->LCKR;
  387. /* Read LCKK bit*/
  388. tmp = GPIOx->LCKR;
  389. }
  390. /**
  391. * @brief Selects the GPIO pin used as Event output.
  392. * @param GPIO_PortSource: selects the GPIO port to be used as source
  393. * for Event output.
  394. * This parameter can be GPIO_PortSourceGPIOx where x can be
  395. * (A..E).
  396. * @param GPIO_PinSource: specifies the pin for the Event output.
  397. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  398. * @retval : None
  399. */
  400. void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  401. {
  402. uint32_t tmpreg = 0x00;
  403. /* Check the parameters */
  404. assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
  405. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  406. tmpreg = AFIO->EVCR;
  407. /* Clear the PORT[6:4] and PIN[3:0] bits */
  408. tmpreg &= EVCR_PORTPINCONFIG_MASK;
  409. tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
  410. tmpreg |= GPIO_PinSource;
  411. AFIO->EVCR = tmpreg;
  412. }
  413. /**
  414. * @brief Enables or disables the Event Output.
  415. * @param NewState: new state of the Event output.
  416. * This parameter can be: ENABLE or DISABLE.
  417. * @retval : None
  418. */
  419. void GPIO_EventOutputCmd(FunctionalState NewState)
  420. {
  421. /* Check the parameters */
  422. assert_param(IS_FUNCTIONAL_STATE(NewState));
  423. *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
  424. }
  425. /**
  426. * @brief Changes the mapping of the specified pin.
  427. * @param GPIO_Remap: selects the pin to remap.
  428. * This parameter can be one of the following values:
  429. * @arg GPIO_Remap_SPI1
  430. * @arg GPIO_Remap_I2C1
  431. * @arg GPIO_Remap_UART1
  432. * @arg GPIO_Remap_UART2
  433. * @arg GPIO_PartialRemap_UART3
  434. * @arg GPIO_FullRemap_UART3
  435. * @arg GPIO_PartialRemap_TIM1
  436. * @arg GPIO_FullRemap_TIM1
  437. * @arg GPIO_PartialRemap1_TIM2
  438. * @arg GPIO_PartialRemap2_TIM2
  439. * @arg GPIO_FullRemap_TIM2
  440. * @arg GPIO_PartialRemap_TIM3
  441. * @arg GPIO_FullRemap_TIM3
  442. * @arg GPIO_Remap_TIM4
  443. * @arg GPIO_Remap1_CAN1
  444. * @arg GPIO_Remap2_CAN1
  445. * @arg GPIO_Remap_PD01
  446. * @arg GPIO_Remap_TIM5CH4_LSI
  447. * @arg GPIO_Remap_ADC1_ETRGINJ
  448. * @arg GPIO_Remap_ADC1_ETRGREG
  449. * @arg GPIO_Remap_ADC2_ETRGINJ
  450. * @arg GPIO_Remap_ADC2_ETRGREG
  451. * @arg GPIO_Remap_SWJ_NoJTRST
  452. * @arg GPIO_Remap_SWJ_JTAGDisable
  453. * @arg GPIO_Remap_SWJ_Disable
  454. * @param NewState: new state of the port pin remapping.
  455. * This parameter can be: ENABLE or DISABLE.
  456. * @retval : None
  457. */
  458. void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
  459. {
  460. uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
  461. /* Check the parameters */
  462. assert_param(IS_GPIO_REMAP(GPIO_Remap));
  463. assert_param(IS_FUNCTIONAL_STATE(NewState));
  464. tmpreg = AFIO->MAPR;
  465. tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
  466. tmp = GPIO_Remap & LSB_MASK;
  467. if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
  468. {
  469. tmpreg &= DBGAFR_SWJCFG_MASK;
  470. AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
  471. }
  472. else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
  473. {
  474. tmp1 = ((uint32_t)0x03) << tmpmask;
  475. tmpreg &= ~tmp1;
  476. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  477. }
  478. else
  479. {
  480. tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15) * 0x10));
  481. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  482. }
  483. if (NewState != DISABLE)
  484. {
  485. tmpreg |= (tmp << ((GPIO_Remap >> 0x15) * 0x10));
  486. }
  487. AFIO->MAPR = tmpreg;
  488. }
  489. /**
  490. * @brief Selects the GPIO pin used as EXTI Line.
  491. * @param GPIO_PortSource: selects the GPIO port to be used as
  492. * source for EXTI lines.
  493. * This parameter can be GPIO_PortSourceGPIOx where x can be
  494. * (A..G).
  495. * @param GPIO_PinSource: specifies the EXTI line to be configured.
  496. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  497. * @retval : None
  498. */
  499. void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  500. {
  501. uint32_t tmp = 0x00;
  502. /* Check the parameters */
  503. assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
  504. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  505. tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
  506. AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
  507. AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
  508. }
  509. /**
  510. * @}
  511. */
  512. /**
  513. * @}
  514. */
  515. /**
  516. * @}
  517. */
  518. /*-------------------------(C) COPYRIGHT 2019 MindMotion ----------------------*/