hal_sdio.c 20 KB

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  1. ////////////////////////////////////////////////////////////////////////////////
  2. /// @file hal_sdio.c
  3. /// @author AE TEAM
  4. /// @brief THIS FILE PROVIDES ALL THE SDIO FIRMWARE FUNCTIONS.
  5. ////////////////////////////////////////////////////////////////////////////////
  6. /// @attention
  7. ///
  8. /// THE EXISTING FIRMWARE IS ONLY FOR REFERENCE, WHICH IS DESIGNED TO PROVIDE
  9. /// CUSTOMERS WITH CODING INFORMATION ABOUT THEIR PRODUCTS SO THEY CAN SAVE
  10. /// TIME. THEREFORE, MINDMOTION SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT OR
  11. /// CONSEQUENTIAL DAMAGES ABOUT ANY CLAIMS ARISING OUT OF THE CONTENT OF SUCH
  12. /// HARDWARE AND/OR THE USE OF THE CODING INFORMATION CONTAINED HEREIN IN
  13. /// CONNECTION WITH PRODUCTS MADE BY CUSTOMERS.
  14. ///
  15. /// <H2><CENTER>&COPY; COPYRIGHT MINDMOTION </CENTER></H2>
  16. ////////////////////////////////////////////////////////////////////////////////
  17. // Define to prevent recursive inclusion
  18. #define _HAL_SDIO_C_
  19. #include "reg_sdio.h"
  20. #include "hal_sdio.h"
  21. #include "hal_rcc.h"
  22. ////////////////////////////////////////////////////////////////////////////////
  23. /// @addtogroup MM32_Hardware_Abstract_Layer
  24. /// @{
  25. ////////////////////////////////////////////////////////////////////////////////
  26. /// @addtogroup SDIO_HAL
  27. /// @{
  28. ////////////////////////////////////////////////////////////////////////////////
  29. /// @addtogroup SDIO_Exported_Functions
  30. /// @{
  31. ////////////////////////////////////////////////////////////////////////////////
  32. /// @brief Deinitializes the SDIO peripheral registers to their default reset
  33. /// values.
  34. /// @param None.
  35. /// @retval None.
  36. ////////////////////////////////////////////////////////////////////////////////
  37. void SDIO_DeInit(void)
  38. {
  39. RCC_AHBPeriphResetCmd(RCC_AHBRSTR_SDIO, ENABLE);
  40. RCC_AHBPeriphResetCmd(RCC_AHBRSTR_SDIO, DISABLE);
  41. }
  42. ////////////////////////////////////////////////////////////////////////////////
  43. /// @brief Fills each SDIO_InitStruct member with its default value.
  44. /// @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which
  45. /// will be initialized.
  46. /// @retval None.
  47. ////////////////////////////////////////////////////////////////////////////////
  48. void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct)
  49. {
  50. // SDIO_InitStruct members default value
  51. SDIO_InitStruct->SDIO_MDEN = 0;
  52. SDIO_InitStruct->SDIO_DATWT = 0;
  53. SDIO_InitStruct->SDIO_SelPTSM = 0;
  54. SDIO_InitStruct->SDIO_CLKSP = 0;
  55. SDIO_InitStruct->SDIO_OUTM = 0;
  56. SDIO_InitStruct->SDIO_SelSM = 0;
  57. SDIO_InitStruct->SDIO_OPMSel = 0;
  58. }
  59. ///
  60. /// @brief Fills each SDIO_DataInitStruct member with its default value.
  61. /// @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which
  62. /// will be initialized.
  63. /// @retval None
  64. ///
  65. void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
  66. {
  67. /* SDIO_DataInitStruct members default value */
  68. SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF;
  69. SDIO_DataInitStruct->SDIO_DataLength = 0x00;
  70. SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b;
  71. SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard;
  72. // SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block;
  73. // SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable;
  74. }
  75. ///
  76. /// @brief Initializes the SDIO data path according to the specified
  77. /// parameters in the SDIO_DataInitStruct.
  78. /// @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that
  79. /// contains the configuration information for the SDIO command.
  80. /// @retval None
  81. ///
  82. //void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
  83. //{
  84. // u32 tmpreg = 0;
  85. // /*---------------------------- SDIO DTIMER Configuration ---------------------*/
  86. // /* Set the SDIO Data TimeOut value */
  87. // SDIO->MMC_TIMEOUTCNT = SDIO_DataInitStruct->SDIO_DataTimeOut;
  88. // /*---------------------------- SDIO DLEN Configuration -----------------------*/
  89. // /* Set the SDIO DataLength value */
  90. // SDIO->MMC_BYTECNTL = SDIO_DataInitStruct->SDIO_DataLength;
  91. // /*---------------------------- SDIO DCTRL Configuration ----------------------*/
  92. // /* Get the SDIO DCTRL value */
  93. // tmpreg = SDIO->DCTRL;
  94. // /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */
  95. // tmpreg &= DCTRL_CLEAR_MASK;
  96. // /* Set DEN bit according to SDIO_DPSM value */
  97. // /* Set DTMODE bit according to SDIO_TransferMode value */
  98. // /* Set DTDIR bit according to SDIO_TransferDir value */
  99. // /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */
  100. // tmpreg |= (u32)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir;//
  101. // //| SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM;
  102. // /* Write to SDIO DCTRL */
  103. // SDIO->DCTRL = tmpreg;
  104. //}
  105. ////////////////////////////////////////////////////////////////////////////////
  106. /// @brief The frequency division factor is configured to generate the SDIO clock.
  107. /// @param value : 1MHz = Fhclk/((mmc_cardsel[5 : 0] + 1) × 2)
  108. /// @retval None.
  109. ////////////////////////////////////////////////////////////////////////////////
  110. void SDIO_ClockSet(u32 value)
  111. {
  112. // SDIO->MMC_CARDSEL &= ~SDIO_MMC_CARDSEL_MASK;
  113. SDIO->MMC_CARDSEL = (SDIO_MMC_CARDSEL_CTREN | SDIO_MMC_CARDSEL_ENPCLK | (value & 0x3F));
  114. // SDIO->MMC_CARDSEL = 0xC0+0x2F;//0xdf;
  115. }
  116. ////////////////////////////////////////////////////////////////////////////////
  117. /// @brief Initializes the SDIO peripheral according to the specified
  118. /// parameters in the SDIO_InitStruct.
  119. /// @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure
  120. /// that contains the configuration information for the SDIO peripheral.
  121. /// @retval None.
  122. ////////////////////////////////////////////////////////////////////////////////
  123. void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct)
  124. {
  125. SDIO->MMC_CTRL &= 0x700;
  126. SDIO->MMC_CTRL |= (SDIO_InitStruct->SDIO_OPMSel | SDIO_InitStruct->SDIO_SelSM |
  127. SDIO_InitStruct->SDIO_OUTM | SDIO_InitStruct->SDIO_CLKSP |
  128. SDIO_InitStruct->SDIO_SelPTSM | SDIO_InitStruct->SDIO_DATWT |
  129. SDIO_InitStruct->SDIO_MDEN);
  130. }
  131. ////////////////////////////////////////////////////////////////////////////////
  132. /// @brief Enables or disables the SDIO interrupts.
  133. /// @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled.
  134. /// state : new state of the specified SDIO interrupts.
  135. /// @retval None.
  136. ////////////////////////////////////////////////////////////////////////////////
  137. void SDIO_ITConfig(u32 SDIO_IT, FunctionalState state)
  138. {
  139. (state) ? (SDIO->MMC_INT_MASK |= SDIO_IT) : (SDIO->MMC_INT_MASK &= ~SDIO_IT);
  140. }
  141. ////////////////////////////////////////////////////////////////////////////////
  142. /// @brief Enables or disables the SDIO CRC.
  143. /// @param SDIO_CRC: specifies the SDIO CRC sources to be enabled or disabled.
  144. /// state : new state of the specified SDIO CRC.
  145. /// @retval None.
  146. ////////////////////////////////////////////////////////////////////////////////
  147. void SDIO_CRCConfig(u32 SDIO_CRC, FunctionalState state)
  148. {
  149. (state) ? (SDIO->MMC_CRCCTL |= SDIO_CRC) : (SDIO->MMC_CRCCTL &= ~SDIO_CRC);
  150. }
  151. ////////////////////////////////////////////////////////////////////////////////
  152. /// @brief Port transfer speed mode.
  153. /// @param clkdiv : High/low speed.
  154. /// @retval None.
  155. ////////////////////////////////////////////////////////////////////////////////
  156. void SDIO_Clock_Set(u8 clkdiv)
  157. {
  158. SDIO->MMC_CTRL &= ~SDIO_MMC_CTRL_SelPTSM;
  159. (clkdiv) ? (SDIO->MMC_CTRL |= SDIO_MMC_CTRL_SelPTSM) : (SDIO->MMC_CTRL &= ~SDIO_MMC_CTRL_SelPTSM);
  160. }
  161. ////////////////////////////////////////////////////////////////////////////////
  162. /// @brief Turn off the SDIO switch.
  163. /// @param None.
  164. /// @retval None.
  165. ////////////////////////////////////////////////////////////////////////////////
  166. SD_Error SD_PowerOFF(void)
  167. {
  168. SDIO->MMC_CARDSEL &= ~(SDIO_MMC_CARDSEL_ENPCLK | SDIO_MMC_CARDSEL_CTREN);
  169. return SD_OK;
  170. }
  171. ///
  172. /// @brief Fills each SDIO_CmdInitStruct member with its default value.
  173. /// @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef
  174. /// structure which will be initialized.
  175. /// @retval None
  176. ///
  177. void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct)
  178. {
  179. /* SDIO_CmdInitStruct members default value */
  180. SDIO_CmdInitStruct->SDIO_Argument = 0x00;
  181. SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00;
  182. SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No;
  183. SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No;
  184. // SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable;
  185. }
  186. ////////////////////////////////////////////////////////////////////////////////
  187. /// @brief SDIO sends command functions.
  188. /// @param cmdindex : Type the command.
  189. /// waitrsp : Expected correspondence.
  190. /// arg : parameter.
  191. /// @retval None.
  192. ////////////////////////////////////////////////////////////////////////////////
  193. void SDIO_Send_Cmd(u8 cmdindex, u8 waitrsp, u32 arg)
  194. {
  195. SDIO->CMD_BUF0 = (arg >> 0) & 0xFF;
  196. SDIO->CMD_BUF1 = (arg >> 8) & 0xFF;
  197. SDIO->CMD_BUF2 = (arg >> 16) & 0xFF;
  198. SDIO->CMD_BUF3 = (arg >> 24) & 0xFF;
  199. SDIO->CMD_BUF4 = 0x40 | cmdindex;
  200. SDIO->CLR_MMC_INT |= 0;
  201. SDIO->MMC_IO = SDIO_MMC_IO_AUTOTR;
  202. while(1) {
  203. if(SDIO->CLR_MMC_INT & SDIO_CLR_MMC_INT_CMDDMC) {
  204. SDIO->CLR_MMC_INT |= SDIO_CLR_MMC_INT_CMDDMC;
  205. break;
  206. }
  207. }
  208. if(waitrsp == SDIO_Response_Short) {
  209. SDIO->MMC_IO = SDIO_MMC_IO_AUTOCLKG | \
  210. SDIO_MMC_IO_AUTOTR | \
  211. SDIO_MMC_IO_RESPCMDSEL;
  212. }
  213. else if(waitrsp == SDIO_Response_Long) {
  214. SDIO->MMC_IO = SDIO_MMC_IO_AUTOCLKG | \
  215. SDIO_MMC_IO_AUTOTR | \
  216. SDIO_MMC_IO_RESPCMDSEL | \
  217. SDIO_MMC_IO_CID_CSDRD;
  218. }
  219. else {
  220. }
  221. }
  222. ////////////////////////////////////////////////////////////////////////////////
  223. /// @brief Check the execution status of CMD0.
  224. /// @param None.
  225. /// @retval card error code.
  226. ////////////////////////////////////////////////////////////////////////////////
  227. SD_Error CmdError(void)
  228. {
  229. SD_Error errorstatus = SD_OK;
  230. u32 timeout = SDIO_CMD0TIMEOUT;
  231. while (timeout--) {
  232. if(((SDIO->MMC_IO & SDIO_MMC_IO_RESPCMDSEL) == 0) && ((SDIO->MMC_IO & SDIO_MMC_IO_AUTOTR) == 0))
  233. break;
  234. }
  235. if (timeout == 0)
  236. return SD_CMD_RSP_TIMEOUT;
  237. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
  238. return errorstatus;
  239. }
  240. ////////////////////////////////////////////////////////////////////////////////
  241. /// @brief Check the error status of the R1 response.
  242. /// @param cmd : Current command.
  243. /// @retval card error code.
  244. ////////////////////////////////////////////////////////////////////////////////
  245. SD_Error CmdResp1Error(u8 cmd)
  246. {
  247. u32 status;
  248. u32 response;
  249. while(1) {
  250. status = SDIO->CLR_MMC_INT ;
  251. if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
  252. break;
  253. }
  254. if(status & SDIO_CLR_MMC_INT_CRNTMC) {
  255. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
  256. return SD_CMD_RSP_TIMEOUT;
  257. }
  258. if(status & (SDIO_CLR_MMC_INT_CRCEMC)) {
  259. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRCEMC;
  260. return SD_CMD_CRC_FAIL;
  261. }
  262. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
  263. if((SDIO->CMD_BUF4 & 0x3F) != cmd) {
  264. return SD_ILLEGAL_CMD;
  265. }
  266. response = SDIO->CMD_BUF3 << 24 | SDIO->CMD_BUF2 << 16 | SDIO->CMD_BUF1 << 8 | SDIO->CMD_BUF0;
  267. return (SD_Error)(response & SD_OCR_ERRORBITS);
  268. }
  269. ////////////////////////////////////////////////////////////////////////////////
  270. /// @brief Check the execution status of CMD2.
  271. /// @param None.
  272. /// @retval card error code.
  273. ////////////////////////////////////////////////////////////////////////////////
  274. SD_Error CmdResp2Error(void)
  275. {
  276. SD_Error errorstatus = SD_OK;
  277. u32 status;
  278. u32 timeout = SDIO_CMD0TIMEOUT;
  279. while(timeout--) {
  280. status = SDIO->CLR_MMC_INT ;
  281. if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
  282. break;
  283. }
  284. if((timeout == 0) || (status & SDIO_CLR_MMC_INT_CRNTMC)) {
  285. errorstatus = SD_CMD_RSP_TIMEOUT;
  286. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
  287. return errorstatus;
  288. }
  289. if(status & SDIO_CLR_MMC_INT_CRCEMC) {
  290. errorstatus = SD_CMD_CRC_FAIL;
  291. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRCEMC;
  292. }
  293. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
  294. return errorstatus;
  295. }
  296. ////////////////////////////////////////////////////////////////////////////////
  297. /// @brief Check the execution status of CMD3.
  298. /// @param None.
  299. /// @retval card error code.
  300. ////////////////////////////////////////////////////////////////////////////////
  301. SD_Error CmdResp3Error(void)
  302. {
  303. u32 status;
  304. while(1) {
  305. status = SDIO->CLR_MMC_INT ;
  306. if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
  307. break;
  308. }
  309. if(status & SDIO_CLR_MMC_INT_CRNTMC) {
  310. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
  311. return SD_CMD_RSP_TIMEOUT;
  312. }
  313. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
  314. return SD_OK;
  315. }
  316. ////////////////////////////////////////////////////////////////////////////////
  317. /// @brief Check the execution status of CMD6.
  318. /// @param None.
  319. /// @retval card error code.
  320. ////////////////////////////////////////////////////////////////////////////////
  321. SD_Error CmdResp6Error(u8 cmd, u16* prca)
  322. {
  323. SD_Error errorstatus = SD_OK;
  324. u32 status;
  325. u32 rspr1;
  326. while(1) {
  327. status = SDIO->CLR_MMC_INT ;
  328. if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
  329. break;
  330. }
  331. if(status & SDIO_CLR_MMC_INT_CRNTMC) {
  332. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
  333. return SD_CMD_RSP_TIMEOUT;
  334. }
  335. if(status & SDIO_CLR_MMC_INT_CRCEMC) {
  336. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRCEMC;
  337. return SD_CMD_CRC_FAIL;
  338. }
  339. if((SDIO->CMD_BUF4 & 0x3F) != cmd) {
  340. return SD_ILLEGAL_CMD;
  341. }
  342. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_MASK;
  343. rspr1 = SDIO->CMD_BUF3 << 24 | SDIO->CMD_BUF2 << 16 | SDIO->CMD_BUF1 << 8 | SDIO->CMD_BUF0;
  344. if(SD_ALLZERO == (rspr1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED))) {
  345. *prca = (u16)(rspr1 >> 16);
  346. return errorstatus;
  347. }
  348. if(rspr1 & SD_R6_GENERAL_UNKNOWN_ERROR) {
  349. return SD_GENERAL_UNKNOWN_ERROR;
  350. }
  351. if(rspr1 & SD_R6_ILLEGAL_CMD) {
  352. return SD_ILLEGAL_CMD;
  353. }
  354. if(rspr1 & SD_R6_COM_CRC_FAILED) {
  355. return SD_COM_CRC_FAILED;
  356. }
  357. return errorstatus;
  358. }
  359. ////////////////////////////////////////////////////////////////////////////////
  360. /// @brief Check the execution status of CMD7.
  361. /// @param None.
  362. /// @retval card error code.
  363. ////////////////////////////////////////////////////////////////////////////////
  364. SD_Error CmdResp7Error(void)
  365. {
  366. SD_Error errorstatus = SD_OK;
  367. u32 status;
  368. u32 timeout = SDIO_CMD0TIMEOUT;
  369. while(timeout--) {
  370. status = SDIO->CLR_MMC_INT ;
  371. if(status & (SDIO_CLR_MMC_INT_CRCEMC | SDIO_CLR_MMC_INT_CRNTMC | SDIO_CLR_MMC_INT_CMDDMC))
  372. break;
  373. }
  374. if((timeout == 0) || (status & SDIO_CLR_MMC_INT_CRNTMC)) { //timeout
  375. errorstatus = SD_CMD_RSP_TIMEOUT;
  376. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CRNTMC;
  377. return errorstatus;
  378. }
  379. if(status & SDIO_CLR_MMC_INT_CMDDMC) {
  380. errorstatus = SD_OK;
  381. SDIO->CLR_MMC_INT = SDIO_CLR_MMC_INT_CMDDMC;
  382. }
  383. return errorstatus;
  384. }
  385. ////////////////////////////////////////////////////////////////////////////////
  386. /// @brief Write data direction block size configuration.
  387. /// @param datatimeout : maximum latency.
  388. /// datalen : data len
  389. /// blksize : block count.
  390. /// dir : direction
  391. /// @retval None.
  392. ////////////////////////////////////////////////////////////////////////////////
  393. void SDIO_Send_Data_Cfg(u32 datatimeout, u32 datalen, u8 blksize, u8 dir)
  394. {
  395. u32 tmpreg, tmpreg1, tmpreg2 = 0;
  396. tmpreg = SDIO->MMC_IO_MBCTL;
  397. tmpreg1 = SDIO->MMC_IO;
  398. tmpreg &= ~(SDIO_MMC_IO_MBCTL_BTSSel | SDIO_MMC_IO_MBCTL_SPMBDTR | SDIO_MMC_IO_MBCTL_SMBDTD);
  399. if (datatimeout < 100) {
  400. SDIO->MMC_TIMEOUTCNT = datatimeout;
  401. }
  402. else if (datatimeout < 10000) {
  403. SDIO->MMC_TIMEOUTCNT = datatimeout / 100;
  404. tmpreg |= SDIO_MMC_IO_MBCTL_BTSSel;
  405. }
  406. else if (datatimeout < 1000000) {
  407. SDIO->MMC_TIMEOUTCNT = datatimeout / 10000;
  408. tmpreg |= SDIO_MMC_IO_MBCTL_BTSSel_2;
  409. }
  410. else {
  411. SDIO->MMC_TIMEOUTCNT = datatimeout / 1000000;
  412. tmpreg |= SDIO_MMC_IO_MBCTL_BTSSel;
  413. }
  414. SDIO->MMC_BYTECNTL = datalen & 0x1FFFFFF; ;
  415. SDIO->MMC_BLOCKCNT = blksize;
  416. if (dir == 0) {
  417. tmpreg |= SDIO_MMC_IO_MBCTL_SMBDTD;
  418. tmpreg1 |= SDIO_MMC_IO_TRANSFDIR;
  419. tmpreg2 |= SDIO_BUF_CTLL_SBAD;
  420. }
  421. else {
  422. tmpreg &= ~(SDIO_MMC_IO_MBCTL_SMBDTD);
  423. tmpreg1 &= ~(SDIO_MMC_IO_TRANSFDIR);
  424. tmpreg2 &= ~(SDIO_BUF_CTLL_SBAD);
  425. }
  426. SDIO->MMC_IO_MBCTL = tmpreg;
  427. SDIO->MMC_IO = tmpreg1;
  428. SDIO->BUF_CTL = tmpreg2;
  429. }
  430. ////////////////////////////////////////////////////////////////////////////////
  431. /// @brief Clears the SDIO's Flag pending bits.
  432. /// @param SDIO_IT: specifies the flag pending bit to clear.
  433. /// @retval None.
  434. ////////////////////////////////////////////////////////////////////////////////
  435. void SDIO_ClearFlag(u32 SDIO_FLAG)
  436. {
  437. SDIO->CLR_MMC_INT |= SDIO_FLAG;
  438. }
  439. ////////////////////////////////////////////////////////////////////////////////
  440. /// @brief Clears the SDIO's interrupt pending bits.
  441. /// @param SDIO_IT: specifies the interrupt pending bit to clear.
  442. /// @retval None.
  443. ////////////////////////////////////////////////////////////////////////////////
  444. void SDIO_ClearITPendingBit(u32 SDIO_IT)
  445. {
  446. SDIO->CLR_MMC_INT |= SDIO_IT;
  447. }
  448. ////////////////////////////////////////////////////////////////////////////////
  449. /// @brief Checks whether the specified SDIO flag is set or not.
  450. /// @param SDIO_FLAG: specifies the flag to check.
  451. /// @retval The new state of SDIO_FLAG (SET or RESET).
  452. ////////////////////////////////////////////////////////////////////////////////
  453. FlagStatus SDIO_GetFlagStatus(u32 SDIO_FLAG)
  454. {
  455. return ((SDIO->CLR_MMC_INT & SDIO_FLAG) ? SET : RESET);
  456. }
  457. ////////////////////////////////////////////////////////////////////////////////
  458. /// @brief Reads the value of the data transfer timeout count
  459. /// @param None.
  460. /// @retval timeout count.
  461. ////////////////////////////////////////////////////////////////////////////////
  462. u32 SDIO_GetTimeOutCounter(void)
  463. {
  464. return (SDIO->MMC_TIMEOUTCNT & 0xFF);
  465. }
  466. ////////////////////////////////////////////////////////////////////////////////
  467. /// @brief Read one data word from FIFO.
  468. /// @param None.
  469. /// @retval Data received.
  470. ////////////////////////////////////////////////////////////////////////////////
  471. u32 SDIO_ReadData(void)
  472. {
  473. return SDIO->FIFO;
  474. }
  475. ////////////////////////////////////////////////////////////////////////////////
  476. /// @brief Write one data word to FIFO.
  477. /// @param tempbuff : Write data.
  478. /// @retval None.
  479. ////////////////////////////////////////////////////////////////////////////////
  480. void SDIO_WriteData(u32 tempbuff)
  481. {
  482. SDIO->FIFO = tempbuff;
  483. }
  484. ////////////////////////////////////////////////////////////////////////////////
  485. /// @brief Returns number of remaining data bytes to be transferred.
  486. /// @param None
  487. /// @retval Number of remaining data bytes to be transferred
  488. ////////////////////////////////////////////////////////////////////////////////
  489. u32 SDIO_GetDataCounter(void)
  490. {
  491. return SDIO->MMC_BYTECNTL;
  492. }
  493. ////////////////////////////////////////////////////////////////////////////////
  494. /// @brief Enable or Dsiable DMA .
  495. /// @param tempbuff : Write data.
  496. /// @retval None.
  497. ////////////////////////////////////////////////////////////////////////////////
  498. void SDIO_DMACmd(FunctionalState state)
  499. {
  500. (state) ? ((SDIO->BUF_CTL |= SDIO_BUF_CTLL_DMAHEN), SDIO->BUF_CTL &= (~(SDIO_BUF_CTLL_DRM))) : (SDIO->BUF_CTL &= ~SDIO_BUF_CTLL_DMAHEN);
  501. }
  502. /// @}
  503. /// @}
  504. /// @}