drv_usart.c 8.3 KB

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  1. /*
  2. * Copyright (c) 2006-2020, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-23 tyustli first version
  9. * 2020-04-02 hqfang modified for Nuclei
  10. */
  11. #include <drv_usart.h>
  12. #ifdef RT_USING_SERIAL
  13. #if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) \
  14. && !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4)
  15. #error "Please define at least one BSP_USING_UARTx"
  16. /* this driver can be disabled at menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable UART */
  17. #endif
  18. enum
  19. {
  20. #ifdef BSP_USING_UART0
  21. GDUART0_INDEX,
  22. #endif
  23. #ifdef BSP_USING_UART1
  24. GDUART1_INDEX,
  25. #endif
  26. #ifdef BSP_USING_UART2
  27. GDUART2_INDEX,
  28. #endif
  29. #ifdef BSP_USING_UART3
  30. GDUART3_INDEX,
  31. #endif
  32. #ifdef BSP_USING_UART4
  33. GDUART4_INDEX,
  34. #endif
  35. };
  36. static struct gd32_uart_config uart_config[] =
  37. {
  38. #ifdef BSP_USING_UART0
  39. {
  40. "uart0",
  41. USART0,
  42. USART0_IRQn,
  43. },
  44. #endif
  45. #ifdef BSP_USING_UART1
  46. {
  47. "uart1",
  48. USART1,
  49. USART1_IRQn,
  50. },
  51. #endif
  52. #ifdef BSP_USING_UART2
  53. {
  54. "uart2",
  55. USART2,
  56. USART2_IRQn,
  57. },
  58. #endif
  59. #ifdef BSP_USING_UART3
  60. {
  61. "uart3",
  62. UART3,
  63. UART3_IRQn,
  64. },
  65. #endif
  66. #ifdef BSP_USING_UART4
  67. {
  68. "uart4",
  69. UART4,
  70. UART4_IRQn,
  71. },
  72. #endif
  73. };
  74. static struct gd32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  75. static rt_err_t gd32_configure(struct rt_serial_device *serial,
  76. struct serial_configure *cfg)
  77. {
  78. struct gd32_uart *usart_obj;
  79. struct gd32_uart_config *usart;
  80. RT_ASSERT(serial != RT_NULL);
  81. RT_ASSERT(cfg != RT_NULL);
  82. usart_obj = (struct gd32_uart *) serial->parent.user_data;
  83. usart = usart_obj->config;
  84. RT_ASSERT(usart != RT_NULL);
  85. usart_deinit(usart->uart_base);
  86. usart_baudrate_set(usart->uart_base, cfg->baud_rate);
  87. switch (cfg->data_bits)
  88. {
  89. case DATA_BITS_8:
  90. usart_word_length_set(usart->uart_base, USART_WL_8BIT);
  91. break;
  92. case DATA_BITS_9:
  93. usart_word_length_set(usart->uart_base, USART_WL_9BIT);
  94. break;
  95. default:
  96. usart_word_length_set(usart->uart_base, USART_WL_8BIT);
  97. break;
  98. }
  99. switch (cfg->stop_bits)
  100. {
  101. case STOP_BITS_1:
  102. usart_stop_bit_set(usart->uart_base, USART_STB_1BIT);
  103. break;
  104. case STOP_BITS_2:
  105. usart_stop_bit_set(usart->uart_base, USART_STB_2BIT);
  106. break;
  107. default:
  108. usart_stop_bit_set(usart->uart_base, USART_STB_1BIT);
  109. break;
  110. }
  111. switch (cfg->parity)
  112. {
  113. case PARITY_NONE:
  114. usart_parity_config(usart->uart_base, USART_PM_NONE);
  115. break;
  116. case PARITY_ODD:
  117. usart_parity_config(usart->uart_base, USART_PM_ODD);
  118. break;
  119. case PARITY_EVEN:
  120. usart_parity_config(usart->uart_base, USART_PM_EVEN);
  121. break;
  122. default:
  123. usart_parity_config(usart->uart_base, USART_PM_NONE);
  124. break;
  125. }
  126. usart_hardware_flow_rts_config(usart->uart_base, USART_RTS_DISABLE);
  127. usart_hardware_flow_cts_config(usart->uart_base, USART_CTS_DISABLE);
  128. usart_receive_config(usart->uart_base, USART_RECEIVE_ENABLE);
  129. usart_transmit_config(usart->uart_base, USART_TRANSMIT_ENABLE);
  130. usart_enable(usart->uart_base);
  131. return RT_EOK;
  132. }
  133. static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd,
  134. void *arg)
  135. {
  136. struct gd32_uart *usart_obj;
  137. struct gd32_uart_config *usart;
  138. RT_ASSERT(serial != RT_NULL);
  139. usart_obj = (struct gd32_uart *) serial->parent.user_data;
  140. usart = usart_obj->config;
  141. RT_ASSERT(usart != RT_NULL);
  142. switch (cmd)
  143. {
  144. case RT_DEVICE_CTRL_CLR_INT:
  145. ECLIC_DisableIRQ(usart->irqn);
  146. usart_interrupt_disable(usart->uart_base, USART_INT_RBNE);
  147. break;
  148. case RT_DEVICE_CTRL_SET_INT:
  149. ECLIC_EnableIRQ(usart->irqn);
  150. /* enable USART0 receive interrupt */
  151. usart_interrupt_enable(usart->uart_base, USART_INT_RBNE);
  152. break;
  153. }
  154. return RT_EOK;
  155. }
  156. static int gd32_putc(struct rt_serial_device *serial, char ch)
  157. {
  158. struct gd32_uart *usart_obj;
  159. struct gd32_uart_config *usart;
  160. RT_ASSERT(serial != RT_NULL);
  161. usart_obj = (struct gd32_uart *) serial->parent.user_data;
  162. usart = usart_obj->config;
  163. RT_ASSERT(usart != RT_NULL);
  164. usart_data_transmit(usart->uart_base, (uint8_t) ch);
  165. while (usart_flag_get(usart->uart_base, USART_FLAG_TBE) == RESET);
  166. return 1;
  167. }
  168. static int gd32_getc(struct rt_serial_device *serial)
  169. {
  170. int ch;
  171. struct gd32_uart *usart_obj;
  172. struct gd32_uart_config *usart;
  173. RT_ASSERT(serial != RT_NULL);
  174. usart_obj = (struct gd32_uart *) serial->parent.user_data;
  175. usart = usart_obj->config;
  176. RT_ASSERT(usart != RT_NULL);
  177. ch = -1;
  178. if (RESET != usart_flag_get(usart->uart_base, USART_FLAG_RBNE))
  179. {
  180. ch = usart_data_receive(usart->uart_base) & 0xff;
  181. }
  182. return ch;
  183. }
  184. static const struct rt_uart_ops gd32_uart_ops = { gd32_configure, gd32_control,
  185. gd32_putc, gd32_getc,
  186. RT_NULL
  187. };
  188. static void usart_isr(struct rt_serial_device *serial)
  189. {
  190. struct gd32_uart *usart_obj;
  191. struct gd32_uart_config *usart;
  192. RT_ASSERT(serial != RT_NULL);
  193. usart_obj = (struct gd32_uart *) serial->parent.user_data;
  194. usart = usart_obj->config;
  195. RT_ASSERT(usart != RT_NULL);
  196. if ((usart_interrupt_flag_get(usart->uart_base, USART_INT_FLAG_RBNE)
  197. != RESET)
  198. && (RESET != usart_flag_get(usart->uart_base, USART_FLAG_RBNE)))
  199. {
  200. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  201. usart_interrupt_flag_clear(usart->uart_base, USART_INT_FLAG_RBNE);
  202. usart_flag_clear(usart->uart_base, USART_FLAG_RBNE);
  203. }
  204. else
  205. {
  206. if (usart_flag_get(usart->uart_base, USART_FLAG_CTSF) != RESET)
  207. {
  208. usart_flag_clear(usart->uart_base, USART_FLAG_CTSF);
  209. }
  210. if (usart_flag_get(usart->uart_base, USART_FLAG_LBDF) != RESET)
  211. {
  212. usart_flag_clear(usart->uart_base, USART_FLAG_LBDF);
  213. }
  214. if (usart_flag_get(usart->uart_base, USART_FLAG_TC) != RESET)
  215. {
  216. usart_flag_clear(usart->uart_base, USART_FLAG_TC);
  217. }
  218. }
  219. }
  220. #ifdef BSP_USING_UART0
  221. void USART0_IRQHandler(void)
  222. {
  223. rt_interrupt_enter();
  224. usart_isr(&uart_obj[GDUART0_INDEX].serial);
  225. rt_interrupt_leave();
  226. }
  227. #endif
  228. #ifdef BSP_USING_UART1
  229. void USART1_IRQHandler(void)
  230. {
  231. rt_interrupt_enter();
  232. usart_isr(&uart_obj[GDUART1_INDEX].serial);
  233. rt_interrupt_leave();
  234. }
  235. #endif
  236. #ifdef BSP_USING_UART2
  237. void USART2_IRQHandler(void)
  238. {
  239. rt_interrupt_enter();
  240. usart_isr(&uart_obj[GDUART2_INDEX].serial);
  241. rt_interrupt_leave();
  242. }
  243. #endif
  244. #ifdef BSP_USING_UART3
  245. void UART3_IRQHandler(void)
  246. {
  247. rt_interrupt_enter();
  248. usart_isr(&uart_obj[GDUART3_INDEX].serial);
  249. rt_interrupt_leave();
  250. }
  251. #endif
  252. #ifdef BSP_USING_UART4
  253. void UART4_IRQHandler(void)
  254. {
  255. rt_interrupt_enter();
  256. usart_isr(&uart_obj[GDUART4_INDEX].serial);
  257. rt_interrupt_leave();
  258. }
  259. #endif
  260. int rt_hw_usart_init(void)
  261. {
  262. rt_size_t obj_num;
  263. int index;
  264. #ifdef BSP_USING_UART0
  265. rcu_periph_clock_enable(RCU_USART0);
  266. #endif
  267. #ifdef BSP_USING_UART1
  268. rcu_periph_clock_enable(RCU_USART1);
  269. #endif
  270. #ifdef BSP_USING_UART2
  271. rcu_periph_clock_enable(RCU_USART2);
  272. #endif
  273. #ifdef BSP_USING_UART3
  274. rcu_periph_clock_enable(RCU_UART3);
  275. #endif
  276. #ifdef BSP_USING_UART4
  277. rcu_periph_clock_enable(RCU_UART4);
  278. #endif
  279. obj_num = sizeof(uart_obj) / sizeof(struct gd32_uart);
  280. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  281. rt_err_t result = 0;
  282. for (index = 0; index < obj_num; index++)
  283. {
  284. /* init UART object */
  285. uart_obj[index].config = &uart_config[index];
  286. uart_obj[index].serial.ops = &gd32_uart_ops;
  287. uart_obj[index].serial.config = config;
  288. /* register UART device */
  289. result = rt_hw_serial_register(&uart_obj[index].serial,
  290. uart_obj[index].config->name,
  291. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
  292. | RT_DEVICE_FLAG_INT_TX, &uart_obj[index]);
  293. RT_ASSERT(result == RT_EOK);
  294. }
  295. return result;
  296. }
  297. #endif /* RT_USING_SERIAL */
  298. /******************** end of file *******************/