nu_gpio.h 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481
  1. /**************************************************************************//**
  2. * @file nu_gpio.h
  3. * @version V0.10
  4. * $Revision: 2 $
  5. * $Date: 18/12/20 6:49p $
  6. * @brief M031 Series General Purpose I/O (GPIO) Driver Header File
  7. *
  8. * @note
  9. * SPDX-License-Identifier: Apache-2.0
  10. * Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
  11. *****************************************************************************/
  12. #ifndef __NU_GPIO_H__
  13. #define __NU_GPIO_H__
  14. #include "M031Series.h"
  15. #ifdef __cplusplus
  16. extern "C"
  17. {
  18. #endif
  19. /** @addtogroup Standard_Driver Standard Driver
  20. @{
  21. */
  22. /** @addtogroup GPIO_Driver GPIO Driver
  23. @{
  24. */
  25. /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants
  26. @{
  27. */
  28. #define GPIO_PIN_MAX 16 /*!< Specify Maximum Pins of Each GPIO Port \hideinitializer */
  29. /* Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping.
  30. Example 1:
  31. PA0 = 1;
  32. It is used to set GPIO PA.0 to high;
  33. Example 2:
  34. if (PA0)
  35. PA0 = 0;
  36. If GPIO PA.0 pin status is high, then set GPIO PA.0 data output to low.
  37. */
  38. #define GPIO_PIN_DATA(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2)))) /*!< Specify GPIO Pin Data Input/Output \hideinitializer */
  39. #define PA0 GPIO_PIN_DATA(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output \hideinitializer */
  40. #define PA1 GPIO_PIN_DATA(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output \hideinitializer */
  41. #define PA2 GPIO_PIN_DATA(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output \hideinitializer */
  42. #define PA3 GPIO_PIN_DATA(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output \hideinitializer */
  43. #define PA4 GPIO_PIN_DATA(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output \hideinitializer */
  44. #define PA5 GPIO_PIN_DATA(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output \hideinitializer */
  45. #define PA6 GPIO_PIN_DATA(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output \hideinitializer */
  46. #define PA7 GPIO_PIN_DATA(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output \hideinitializer */
  47. #define PA8 GPIO_PIN_DATA(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output \hideinitializer */
  48. #define PA9 GPIO_PIN_DATA(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output \hideinitializer */
  49. #define PA10 GPIO_PIN_DATA(0, 10) /*!< Specify PA.10 Pin Data Input/Output \hideinitializer */
  50. #define PA11 GPIO_PIN_DATA(0, 11) /*!< Specify PA.11 Pin Data Input/Output \hideinitializer */
  51. #define PA12 GPIO_PIN_DATA(0, 12) /*!< Specify PA.12 Pin Data Input/Output \hideinitializer */
  52. #define PA13 GPIO_PIN_DATA(0, 13) /*!< Specify PA.13 Pin Data Input/Output \hideinitializer */
  53. #define PA14 GPIO_PIN_DATA(0, 14) /*!< Specify PA.14 Pin Data Input/Output \hideinitializer */
  54. #define PA15 GPIO_PIN_DATA(0, 15) /*!< Specify PA.15 Pin Data Input/Output \hideinitializer */
  55. #define PB0 GPIO_PIN_DATA(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output \hideinitializer */
  56. #define PB1 GPIO_PIN_DATA(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output \hideinitializer */
  57. #define PB2 GPIO_PIN_DATA(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output \hideinitializer */
  58. #define PB3 GPIO_PIN_DATA(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output \hideinitializer */
  59. #define PB4 GPIO_PIN_DATA(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output \hideinitializer */
  60. #define PB5 GPIO_PIN_DATA(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output \hideinitializer */
  61. #define PB6 GPIO_PIN_DATA(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output \hideinitializer */
  62. #define PB7 GPIO_PIN_DATA(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output \hideinitializer */
  63. #define PB8 GPIO_PIN_DATA(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output \hideinitializer */
  64. #define PB9 GPIO_PIN_DATA(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output \hideinitializer */
  65. #define PB10 GPIO_PIN_DATA(1, 10) /*!< Specify PB.10 Pin Data Input/Output \hideinitializer */
  66. #define PB11 GPIO_PIN_DATA(1, 11) /*!< Specify PB.11 Pin Data Input/Output \hideinitializer */
  67. #define PB12 GPIO_PIN_DATA(1, 12) /*!< Specify PB.12 Pin Data Input/Output \hideinitializer */
  68. #define PB13 GPIO_PIN_DATA(1, 13) /*!< Specify PB.13 Pin Data Input/Output \hideinitializer */
  69. #define PB14 GPIO_PIN_DATA(1, 14) /*!< Specify PB.14 Pin Data Input/Output \hideinitializer */
  70. #define PB15 GPIO_PIN_DATA(1, 15) /*!< Specify PB.15 Pin Data Input/Output \hideinitializer */
  71. #define PC0 GPIO_PIN_DATA(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output \hideinitializer */
  72. #define PC1 GPIO_PIN_DATA(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output \hideinitializer */
  73. #define PC2 GPIO_PIN_DATA(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output \hideinitializer */
  74. #define PC3 GPIO_PIN_DATA(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output \hideinitializer */
  75. #define PC4 GPIO_PIN_DATA(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output \hideinitializer */
  76. #define PC5 GPIO_PIN_DATA(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output \hideinitializer */
  77. #define PC6 GPIO_PIN_DATA(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output \hideinitializer */
  78. #define PC7 GPIO_PIN_DATA(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output \hideinitializer */
  79. #define PC8 GPIO_PIN_DATA(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output \hideinitializer */
  80. #define PC9 GPIO_PIN_DATA(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output \hideinitializer */
  81. #define PC10 GPIO_PIN_DATA(2, 10) /*!< Specify PC.10 Pin Data Input/Output \hideinitializer */
  82. #define PC11 GPIO_PIN_DATA(2, 11) /*!< Specify PC.11 Pin Data Input/Output \hideinitializer */
  83. #define PC12 GPIO_PIN_DATA(2, 12) /*!< Specify PC.12 Pin Data Input/Output \hideinitializer */
  84. #define PC13 GPIO_PIN_DATA(2, 13) /*!< Specify PC.13 Pin Data Input/Output \hideinitializer */
  85. #define PC14 GPIO_PIN_DATA(2, 14) /*!< Specify PC.14 Pin Data Input/Output \hideinitializer */
  86. #define PD0 GPIO_PIN_DATA(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output \hideinitializer */
  87. #define PD1 GPIO_PIN_DATA(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output \hideinitializer */
  88. #define PD2 GPIO_PIN_DATA(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output \hideinitializer */
  89. #define PD3 GPIO_PIN_DATA(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output \hideinitializer */
  90. #define PD4 GPIO_PIN_DATA(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output \hideinitializer */
  91. #define PD5 GPIO_PIN_DATA(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output \hideinitializer */
  92. #define PD6 GPIO_PIN_DATA(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output \hideinitializer */
  93. #define PD7 GPIO_PIN_DATA(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output \hideinitializer */
  94. #define PD8 GPIO_PIN_DATA(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output \hideinitializer */
  95. #define PD9 GPIO_PIN_DATA(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output \hideinitializer */
  96. #define PD10 GPIO_PIN_DATA(3, 10) /*!< Specify PD.10 Pin Data Input/Output \hideinitializer */
  97. #define PD11 GPIO_PIN_DATA(3, 11) /*!< Specify PD.11 Pin Data Input/Output \hideinitializer */
  98. #define PD12 GPIO_PIN_DATA(3, 12) /*!< Specify PD.12 Pin Data Input/Output \hideinitializer */
  99. #define PD13 GPIO_PIN_DATA(3, 13) /*!< Specify PD.13 Pin Data Input/Output \hideinitializer */
  100. #define PD14 GPIO_PIN_DATA(3, 14) /*!< Specify PD.14 Pin Data Input/Output \hideinitializer */
  101. #define PD15 GPIO_PIN_DATA(3, 15) /*!< Specify PD.15 Pin Data Input/Output \hideinitializer */
  102. #define PE0 GPIO_PIN_DATA(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output \hideinitializer */
  103. #define PE1 GPIO_PIN_DATA(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output \hideinitializer */
  104. #define PE2 GPIO_PIN_DATA(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output \hideinitializer */
  105. #define PE3 GPIO_PIN_DATA(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output \hideinitializer */
  106. #define PE4 GPIO_PIN_DATA(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output \hideinitializer */
  107. #define PE5 GPIO_PIN_DATA(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output \hideinitializer */
  108. #define PE6 GPIO_PIN_DATA(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output \hideinitializer */
  109. #define PE7 GPIO_PIN_DATA(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output \hideinitializer */
  110. #define PE8 GPIO_PIN_DATA(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output \hideinitializer */
  111. #define PE9 GPIO_PIN_DATA(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output \hideinitializer */
  112. #define PE10 GPIO_PIN_DATA(4, 10) /*!< Specify PE.10 Pin Data Input/Output \hideinitializer */
  113. #define PE11 GPIO_PIN_DATA(4, 11) /*!< Specify PE.11 Pin Data Input/Output \hideinitializer */
  114. #define PE12 GPIO_PIN_DATA(4, 12) /*!< Specify PE.12 Pin Data Input/Output \hideinitializer */
  115. #define PE13 GPIO_PIN_DATA(4, 13) /*!< Specify PE.13 Pin Data Input/Output \hideinitializer */
  116. #define PE14 GPIO_PIN_DATA(4, 14) /*!< Specify PE.14 Pin Data Input/Output \hideinitializer */
  117. #define PE15 GPIO_PIN_DATA(4, 15) /*!< Specify PE.15 Pin Data Input/Output \hideinitializer */
  118. #define PF0 GPIO_PIN_DATA(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output \hideinitializer */
  119. #define PF1 GPIO_PIN_DATA(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output \hideinitializer */
  120. #define PF2 GPIO_PIN_DATA(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output \hideinitializer */
  121. #define PF3 GPIO_PIN_DATA(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output \hideinitializer */
  122. #define PF4 GPIO_PIN_DATA(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output \hideinitializer */
  123. #define PF5 GPIO_PIN_DATA(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output \hideinitializer */
  124. #define PF6 GPIO_PIN_DATA(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output \hideinitializer */
  125. #define PF7 GPIO_PIN_DATA(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output \hideinitializer */
  126. #define PF8 GPIO_PIN_DATA(5, 8 ) /*!< Specify PF.8 Pin Data Input/Output \hideinitializer */
  127. #define PF9 GPIO_PIN_DATA(5, 9 ) /*!< Specify PF.9 Pin Data Input/Output \hideinitializer */
  128. #define PF10 GPIO_PIN_DATA(5, 10) /*!< Specify PF.10 Pin Data Input/Output \hideinitializer */
  129. #define PF11 GPIO_PIN_DATA(5, 11) /*!< Specify PF.11 Pin Data Input/Output \hideinitializer */
  130. #define PF14 GPIO_PIN_DATA(5, 14) /*!< Specify PF.14 Pin Data Input/Output \hideinitializer */
  131. #define PF15 GPIO_PIN_DATA(5, 15) /*!< Specify PF.15 Pin Data Input/Output \hideinitializer */
  132. #define PG2 GPIO_PIN_DATA(6, 2 ) /*!< Specify PG.2 Pin Data Input/Output \hideinitializer */
  133. #define PG3 GPIO_PIN_DATA(6, 3 ) /*!< Specify PG.3 Pin Data Input/Output \hideinitializer */
  134. #define PG4 GPIO_PIN_DATA(6, 4 ) /*!< Specify PG.4 Pin Data Input/Output \hideinitializer */
  135. #define PG9 GPIO_PIN_DATA(6, 9 ) /*!< Specify PG.9 Pin Data Input/Output \hideinitializer */
  136. #define PG10 GPIO_PIN_DATA(6, 10) /*!< Specify PG.10 Pin Data Input/Output \hideinitializer */
  137. #define PG11 GPIO_PIN_DATA(6, 11) /*!< Specify PG.11 Pin Data Input/Output \hideinitializer */
  138. #define PG12 GPIO_PIN_DATA(6, 12) /*!< Specify PG.12 Pin Data Input/Output \hideinitializer */
  139. #define PG13 GPIO_PIN_DATA(6, 13) /*!< Specify PG.13 Pin Data Input/Output \hideinitializer */
  140. #define PG14 GPIO_PIN_DATA(6, 14) /*!< Specify PG.14 Pin Data Input/Output \hideinitializer */
  141. #define PG15 GPIO_PIN_DATA(6, 15) /*!< Specify PG.15 Pin Data Input/Output \hideinitializer */
  142. #define PH4 GPIO_PIN_DATA(7, 4 ) /*!< Specify PH.4 Pin Data Input/Output \hideinitializer */
  143. #define PH5 GPIO_PIN_DATA(7, 5 ) /*!< Specify PH.5 Pin Data Input/Output \hideinitializer */
  144. #define PH6 GPIO_PIN_DATA(7, 6 ) /*!< Specify PH.6 Pin Data Input/Output \hideinitializer */
  145. #define PH7 GPIO_PIN_DATA(7, 7 ) /*!< Specify PH.7 Pin Data Input/Output \hideinitializer */
  146. #define PH8 GPIO_PIN_DATA(7, 8 ) /*!< Specify PH.8 Pin Data Input/Output \hideinitializer */
  147. #define PH9 GPIO_PIN_DATA(7, 9 ) /*!< Specify PH.9 Pin Data Input/Output \hideinitializer */
  148. #define PH10 GPIO_PIN_DATA(7, 10) /*!< Specify PH.10 Pin Data Input/Output \hideinitializer */
  149. #define PH11 GPIO_PIN_DATA(7, 11) /*!< Specify PH.11 Pin Data Input/Output \hideinitializer */
  150. /*---------------------------------------------------------------------------------------------------------*/
  151. /* GPIO_MODE Constant Definitions */
  152. /*---------------------------------------------------------------------------------------------------------*/
  153. #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode \hideinitializer */
  154. #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode \hideinitializer */
  155. #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode \hideinitializer */
  156. #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode \hideinitializer */
  157. #define GPIO_MODE(pin, mode) ((mode) << ((pin)<<1)) /*!< Generate the PMD mode setting for each pin \hideinitializer */
  158. /*---------------------------------------------------------------------------------------------------------*/
  159. /* GPIO Interrupt Type Constant Definitions (Parameter of GPIO_EnableInt()) */
  160. /*---------------------------------------------------------------------------------------------------------*/
  161. #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge \hideinitializer */
  162. #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge \hideinitializer */
  163. #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge \hideinitializer */
  164. #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High \hideinitializer */
  165. #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Low \hideinitializer */
  166. /*---------------------------------------------------------------------------------------------------------*/
  167. /* GPIO_INTTYPE Constant Definitions */
  168. /*---------------------------------------------------------------------------------------------------------*/
  169. #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode \hideinitializer */
  170. #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Level Mode \hideinitializer */
  171. /*---------------------------------------------------------------------------------------------------------*/
  172. /* GPIO_DBCTL Constant Definitions */
  173. /*---------------------------------------------------------------------------------------------------------*/
  174. #define GPIO_DBCTL_ICLK_OFF (0x0UL<<GPIO_DBCTL_ICLKON_Pos) /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 \hideinitializer */
  175. #define GPIO_DBCTL_ICLK_ON (0x1UL<<GPIO_DBCTL_ICLKON_Pos) /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset \hideinitializer */
  176. #define GPIO_DBCTL_DBCLKSRC_HCLK (0x0UL<<GPIO_DBCTL_DBCLKSRC_Pos) /*!< GPIO_DBCTL setting for de-bounce counter clock source is the HCLK \hideinitializer */
  177. #define GPIO_DBCTL_DBCLKSRC_LIRC (0x1UL<<GPIO_DBCTL_DBCLKSRC_Pos) /*!< GPIO_DBCTL setting for de-bounce counter clock source is the LIRC \hideinitializer */
  178. #define GPIO_DBCTL_DBCLKSEL_1 (0x0UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 1 clocks \hideinitializer */
  179. #define GPIO_DBCTL_DBCLKSEL_2 (0x1UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 2 clocks \hideinitializer */
  180. #define GPIO_DBCTL_DBCLKSEL_4 (0x2UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 4 clocks \hideinitializer */
  181. #define GPIO_DBCTL_DBCLKSEL_8 (0x3UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 8 clocks \hideinitializer */
  182. #define GPIO_DBCTL_DBCLKSEL_16 (0x4UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 16 clocks \hideinitializer */
  183. #define GPIO_DBCTL_DBCLKSEL_32 (0x5UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 32 clocks \hideinitializer */
  184. #define GPIO_DBCTL_DBCLKSEL_64 (0x6UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 64 clocks \hideinitializer */
  185. #define GPIO_DBCTL_DBCLKSEL_128 (0x7UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 128 clocks \hideinitializer */
  186. #define GPIO_DBCTL_DBCLKSEL_256 (0x8UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 256 clocks \hideinitializer */
  187. #define GPIO_DBCTL_DBCLKSEL_512 (0x9UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 512 clocks \hideinitializer */
  188. #define GPIO_DBCTL_DBCLKSEL_1024 (0xAUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 1024 clocks \hideinitializer */
  189. #define GPIO_DBCTL_DBCLKSEL_2048 (0xBUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 2048 clocks \hideinitializer */
  190. #define GPIO_DBCTL_DBCLKSEL_4096 (0xCUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 4096 clocks \hideinitializer */
  191. #define GPIO_DBCTL_DBCLKSEL_8192 (0xDUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 8192 clocks \hideinitializer */
  192. #define GPIO_DBCTL_DBCLKSEL_16384 (0xEUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 16384 clocks \hideinitializer */
  193. #define GPIO_DBCTL_DBCLKSEL_32768 (0xFUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 32768 clocks \hideinitializer */
  194. /*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */
  195. /** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
  196. @{
  197. */
  198. /**
  199. * @brief Clear GPIO Pin Interrupt Flag
  200. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  201. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  202. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  203. * It could be BIT0 ~ BIT14 for PC.
  204. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  205. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  206. * It could be BIT4 ~ BIT11 for PH.
  207. * @return None
  208. * @details Clear the interrupt status of specified GPIO pin.
  209. * \hideinitializer
  210. */
  211. #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->INTSRC = (u32PinMask))
  212. /**
  213. * @brief Disable Pin De-bounce Function
  214. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  215. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  216. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  217. * It could be BIT0 ~ BIT14 for PC.
  218. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  219. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  220. * It could be BIT4 ~ BIT11 for PH.
  221. * @return None
  222. * @details Disable the interrupt de-bounce function of specified GPIO pin.
  223. * \hideinitializer
  224. */
  225. #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask))
  226. /**
  227. * @brief Enable Pin De-bounce Function
  228. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  229. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  230. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  231. * It could be BIT0 ~ BIT14 for PC.
  232. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  233. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  234. * It could be BIT4 ~ BIT11 for PH.
  235. * @return None
  236. * @details Enable the interrupt de-bounce function of specified GPIO pin.
  237. * \hideinitializer
  238. */
  239. #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask))
  240. /**
  241. * @brief Disable I/O Digital Input Path
  242. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  243. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  244. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  245. * It could be BIT0 ~ BIT14 for PC.
  246. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  247. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  248. * It could be BIT4 ~ BIT11 for PH.
  249. * @return None
  250. * @details Disable I/O digital input path of specified GPIO pin.
  251. * \hideinitializer
  252. */
  253. #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16))
  254. /**
  255. * @brief Enable I/O Digital Input Path
  256. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  257. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  258. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  259. * It could be BIT0 ~ BIT14 for PC.
  260. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  261. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  262. * It could be BIT4 ~ BIT11 for PH.
  263. * @return None
  264. * @details Enable I/O digital input path of specified GPIO pin.
  265. * \hideinitializer
  266. */
  267. #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16))
  268. /**
  269. * @brief Disable I/O DOUT mask
  270. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  271. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  272. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  273. * It could be BIT0 ~ BIT14 for PC.
  274. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  275. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  276. * It could be BIT4 ~ BIT11 for PH.
  277. * @return None
  278. * @details Disable I/O DOUT mask of specified GPIO pin.
  279. * \hideinitializer
  280. */
  281. #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask))
  282. /**
  283. * @brief Enable I/O DOUT mask
  284. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  285. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  286. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  287. * It could be BIT0 ~ BIT14 for PC.
  288. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  289. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  290. * It could be BIT4 ~ BIT11 for PH.
  291. * @return None
  292. * @details Enable I/O DOUT mask of specified GPIO pin.
  293. * \hideinitializer
  294. */
  295. #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask))
  296. /**
  297. * @brief Get GPIO Pin Interrupt Flag
  298. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  299. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  300. * It could be BIT0 ~ BIT15 for PA, PB, PD, and PE.
  301. * It could be BIT0 ~ BIT14 for PC.
  302. * It could be BIT0 ~ BIT11, BIT14, and BIT15 for PF.
  303. * It could be BIT2 ~ BIT4, and BIT9 ~ BIT15 for PG.
  304. * It could be BIT4 ~ BIT11 for PH.
  305. * @retval 0 No interrupt at specified GPIO pin
  306. * @retval 1 The specified GPIO pin generate an interrupt
  307. * @details Get the interrupt status of specified GPIO pin.
  308. * \hideinitializer
  309. */
  310. #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask))
  311. /**
  312. * @brief Set De-bounce Sampling Cycle Time
  313. * @param[in] u32ClkSrc The de-bounce counter clock source. It could be
  314. * - \ref GPIO_DBCTL_DBCLKSRC_HCLK
  315. * - \ref GPIO_DBCTL_DBCLKSRC_LIRC
  316. * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be
  317. * - \ref GPIO_DBCTL_DBCLKSEL_1
  318. * - \ref GPIO_DBCTL_DBCLKSEL_2
  319. * - \ref GPIO_DBCTL_DBCLKSEL_4
  320. * - \ref GPIO_DBCTL_DBCLKSEL_8
  321. * - \ref GPIO_DBCTL_DBCLKSEL_16
  322. * - \ref GPIO_DBCTL_DBCLKSEL_32
  323. * - \ref GPIO_DBCTL_DBCLKSEL_64
  324. * - \ref GPIO_DBCTL_DBCLKSEL_128
  325. * - \ref GPIO_DBCTL_DBCLKSEL_256
  326. * - \ref GPIO_DBCTL_DBCLKSEL_512
  327. * - \ref GPIO_DBCTL_DBCLKSEL_1024
  328. * - \ref GPIO_DBCTL_DBCLKSEL_2048
  329. * - \ref GPIO_DBCTL_DBCLKSEL_4096
  330. * - \ref GPIO_DBCTL_DBCLKSEL_8192
  331. * - \ref GPIO_DBCTL_DBCLKSEL_16384
  332. * - \ref GPIO_DBCTL_DBCLKSEL_32768
  333. * @return None
  334. * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n
  335. * Example: GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n
  336. * It's meaning the de-bounce counter clock source is LIRC (38.4 KHz) and sampling cycle selection is 4. \n
  337. * Then the target de-bounce sampling cycle time is (4)*(1/38400) s = 4*26.042 us = 104.168 us,
  338. * and system will sampling interrupt input once per 104.168 us.
  339. * \hideinitializer
  340. */
  341. #define GPIO_SET_DEBOUNCE_TIME(u32ClkSrc, u32ClkSel) (GPIO->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel)))
  342. /**
  343. * @brief Set GPIO Interrupt Clock on bit
  344. * @param[in] port Not used in M031.
  345. * @return None
  346. * @details Set the I/O pins edge detection circuit always active after reset for specified port.
  347. * \hideinitializer
  348. */
  349. #define GPIO_SET_DEBOUNCE_ICLKON(port) (GPIO->DBCTL |= GPIO_DBCTL_ICLKON_Msk)
  350. /**
  351. * @brief Clear GPIO Interrupt Clock on bit
  352. * @param[in] port Not used in M031.
  353. * @return None
  354. * @details Set edge detection circuit active only if I/O pin edge interrupt enabled for specified port
  355. * \hideinitializer
  356. */
  357. #define GPIO_CLR_DEBOUNCE_ICLKON(port) (GPIO->DBCTL &= ~(GPIO_DBCTL_ICLKON_Msk))
  358. /**
  359. * @brief Get GPIO Port IN Data
  360. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  361. * @return The specified port data
  362. * @details Get the PIN register of specified GPIO port.
  363. * \hideinitializer
  364. */
  365. #define GPIO_GET_IN_DATA(port) ((port)->PIN)
  366. /**
  367. * @brief Set GPIO Port OUT Data
  368. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG, or PH.
  369. * @param[in] u32Data GPIO port data.
  370. * @return None
  371. * @details Set the Data into specified GPIO port.
  372. * \hideinitializer
  373. */
  374. #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data))
  375. /**
  376. * @brief Toggle Specified GPIO pin
  377. * @param[in] u32Pin Pxy
  378. * @return None
  379. * @details Toggle the specified GPIO pint.
  380. * \hideinitializer
  381. */
  382. #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1)
  383. /**
  384. * @brief Enable External GPIO interrupt
  385. * @param[in] port GPIO port. It could be PA, PB, PC, PD, or PF.
  386. * @param[in] u32Pin The pin of specified GPIO port.
  387. * It could be 0 ~ 15 for PA, PB, PD, and PE.
  388. * It could be 0 ~ 14 for PC.
  389. * It could be 0 ~ 11, 14, and 15 for PF.
  390. * It could be 2 ~ 4, and 9 ~ 15 for PG.
  391. * It could be 4 ~ 11 for PH.
  392. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be
  393. * - \ref GPIO_INT_RISING
  394. * - \ref GPIO_INT_FALLING
  395. * - \ref GPIO_INT_BOTH_EDGE
  396. * - \ref GPIO_INT_HIGH
  397. * - \ref GPIO_INT_LOW
  398. * @return None
  399. * @details This function is used to enable specified GPIO pin interrupt.
  400. * \hideinitializer
  401. */
  402. #define GPIO_EnableEINT GPIO_EnableInt
  403. /**
  404. * @brief Disable External GPIO interrupt
  405. * @param[in] port GPIO port. It could be PA, PB, PC, PD, or PF.
  406. * @param[in] u32Pin The pin of specified GPIO port.
  407. * It could be 0 ~ 15 for PA, PB, PD, and PE.
  408. * It could be 0 ~ 14 for PC.
  409. * It could be 0 ~ 11, 14, and 15 for PF.
  410. * It could be 2 ~ 4, and 9 ~ 15 for PG.
  411. * It could be 4 ~ 11 for PH.
  412. * @return None
  413. * @details This function is used to enable specified GPIO pin interrupt.
  414. * \hideinitializer
  415. */
  416. #define GPIO_DisableEINT GPIO_DisableInt
  417. void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
  418. void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
  419. void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
  420. /*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */
  421. /*@}*/ /* end of group GPIO_Driver */
  422. /*@}*/ /* end of group Standard_Driver */
  423. #ifdef __cplusplus
  424. }
  425. #endif
  426. #endif /* __NU_GPIO_H__ */
  427. /*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/