nu_uart.h 23 KB

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  1. /****************************************************************************
  2. * @file nu_uart.h
  3. * @version V1.00
  4. * @brief M031 series UART driver source file
  5. *
  6. * SPDX-License-Identifier: Apache-2.0
  7. * @copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
  8. *****************************************************************************/
  9. #ifndef __NU_UART_H__
  10. #define __NU_UART_H__
  11. #ifdef __cplusplus
  12. extern "C"
  13. {
  14. #endif
  15. /** @addtogroup Standard_Driver Standard Driver
  16. @{
  17. */
  18. /** @addtogroup UART_Driver UART Driver
  19. @{
  20. */
  21. /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
  22. @{
  23. */
  24. /*---------------------------------------------------------------------------------------------------------*/
  25. /* UART FIFO size constants definitions */
  26. /*---------------------------------------------------------------------------------------------------------*/
  27. #define UART0_FIFO_SIZE 16ul /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  28. #define UART1_FIFO_SIZE 16ul /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  29. #define UART2_FIFO_SIZE 1ul /*!< UART2 supports separated receive/transmit 1/1 bytes entry FIFO \hideinitializer */
  30. #define UART3_FIFO_SIZE 1ul /*!< UART3 supports separated receive/transmit 1/1 bytes entry FIFO \hideinitializer */
  31. #define UART4_FIFO_SIZE 16ul /*!< UART4 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  32. #define UART5_FIFO_SIZE 16ul /*!< UART5 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
  33. #define UART6_FIFO_SIZE 1ul /*!< UART6 supports separated receive/transmit 1/1 bytes entry FIFO \hideinitializer */
  34. #define UART7_FIFO_SIZE 1ul /*!< UART7 supports separated receive/transmit 1/1 bytes entry FIFO \hideinitializer */
  35. /*---------------------------------------------------------------------------------------------------------*/
  36. /* UART_FIFO constants definitions */
  37. /*---------------------------------------------------------------------------------------------------------*/
  38. #define UART_FIFO_RFITL_1BYTE (0x0ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte \hideinitializer */
  39. #define UART_FIFO_RFITL_4BYTES (0x1ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes \hideinitializer */
  40. #define UART_FIFO_RFITL_8BYTES (0x2ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes \hideinitializer */
  41. #define UART_FIFO_RFITL_14BYTES (0x3ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes \hideinitializer */
  42. #define UART_FIFO_RTSTRGLV_1BYTE (0x0ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte \hideinitializer */
  43. #define UART_FIFO_RTSTRGLV_4BYTES (0x1ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes \hideinitializer */
  44. #define UART_FIFO_RTSTRGLV_8BYTES (0x2ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes \hideinitializer */
  45. #define UART_FIFO_RTSTRGLV_14BYTES (0x3ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes \hideinitializer */
  46. /*---------------------------------------------------------------------------------------------------------*/
  47. /* UART_LINE constants definitions */
  48. /*---------------------------------------------------------------------------------------------------------*/
  49. #define UART_WORD_LEN_5 (0ul) /*!< UART_LINE setting to set UART word length to 5 bits \hideinitializer */
  50. #define UART_WORD_LEN_6 (1ul) /*!< UART_LINE setting to set UART word length to 6 bits \hideinitializer */
  51. #define UART_WORD_LEN_7 (2ul) /*!< UART_LINE setting to set UART word length to 7 bits \hideinitializer */
  52. #define UART_WORD_LEN_8 (3ul) /*!< UART_LINE setting to set UART word length to 8 bits \hideinitializer */
  53. #define UART_PARITY_NONE (0x0ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity \hideinitializer */
  54. #define UART_PARITY_ODD (0x1ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity \hideinitializer */
  55. #define UART_PARITY_EVEN (0x3ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity \hideinitializer */
  56. #define UART_PARITY_MARK (0x5ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' \hideinitializer */
  57. #define UART_PARITY_SPACE (0x7ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' \hideinitializer */
  58. #define UART_STOP_BIT_1 (0x0ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit \hideinitializer */
  59. #define UART_STOP_BIT_1_5 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length \hideinitializer */
  60. #define UART_STOP_BIT_2 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length \hideinitializer */
  61. /*---------------------------------------------------------------------------------------------------------*/
  62. /* UART RTS ACTIVE LEVEL constants definitions */
  63. /*---------------------------------------------------------------------------------------------------------*/
  64. #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active \hideinitializer */
  65. #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active \hideinitializer */
  66. /*---------------------------------------------------------------------------------------------------------*/
  67. /* UART_IRDA constants definitions */
  68. /*---------------------------------------------------------------------------------------------------------*/
  69. #define UART_IRDA_TXEN (0x1ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode \hideinitializer */
  70. #define UART_IRDA_RXEN (0x0ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode \hideinitializer */
  71. /*---------------------------------------------------------------------------------------------------------*/
  72. /* UART_FUNCSEL constants definitions */
  73. /*---------------------------------------------------------------------------------------------------------*/
  74. #define UART_FUNCSEL_UART (0x0ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) \hideinitializer */
  75. #define UART_FUNCSEL_LIN (0x1ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function \hideinitializer */
  76. #define UART_FUNCSEL_IrDA (0x2ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function \hideinitializer */
  77. #define UART_FUNCSEL_RS485 (0x3ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function \hideinitializer */
  78. #define UART_FUNCSEL_SINGLE_WIRE (0x4ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set Single Wire Function \hideinitializer */
  79. /*---------------------------------------------------------------------------------------------------------*/
  80. /* UART BAUDRATE MODE constants definitions */
  81. /*---------------------------------------------------------------------------------------------------------*/
  82. #define UART_BAUD_MODE0 (0ul) /*!< Set UART Baudrate Mode is Mode0 \hideinitializer */
  83. #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 \hideinitializer */
  84. /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
  85. /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
  86. @{
  87. */
  88. /**
  89. * @brief Calculate UART baudrate mode0 divider
  90. *
  91. * @param[in] u32SrcFreq UART clock frequency
  92. * @param[in] u32BaudRate Baudrate of UART module
  93. *
  94. * @return UART baudrate mode0 divider
  95. *
  96. * @details This macro calculate UART baudrate mode0 divider.
  97. * \hideinitializer
  98. */
  99. #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8ul)) / (u32BaudRate) >> 4ul)-2ul)
  100. /**
  101. * @brief Calculate UART baudrate mode2 divider
  102. *
  103. * @param[in] u32SrcFreq UART clock frequency
  104. * @param[in] u32BaudRate Baudrate of UART module
  105. *
  106. * @return UART baudrate mode2 divider
  107. *
  108. * @details This macro calculate UART baudrate mode2 divider.
  109. * \hideinitializer
  110. */
  111. #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2ul)) / (u32BaudRate))-2ul)
  112. /**
  113. * @brief Write UART data
  114. *
  115. * @param[in] uart The pointer of the specified UART module
  116. * @param[in] u8Data Data byte to transmit.
  117. *
  118. * @return None
  119. *
  120. * @details This macro write Data to Tx data register.
  121. * \hideinitializer
  122. */
  123. #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
  124. /**
  125. * @brief Read UART data
  126. *
  127. * @param[in] uart The pointer of the specified UART module
  128. *
  129. * @return The oldest data byte in RX FIFO.
  130. *
  131. * @details This macro read Rx data register.
  132. * \hideinitializer
  133. */
  134. #define UART_READ(uart) ((uart)->DAT)
  135. /**
  136. * @brief Get Tx empty
  137. *
  138. * @param[in] uart The pointer of the specified UART module
  139. *
  140. * @retval 0 Tx FIFO is not empty
  141. * @retval >=1 Tx FIFO is empty
  142. *
  143. * @details This macro get Transmitter FIFO empty register value.
  144. * \hideinitializer
  145. */
  146. #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
  147. /**
  148. * @brief Get Rx empty
  149. *
  150. * @param[in] uart The pointer of the specified UART module
  151. *
  152. * @retval 0 Rx FIFO is not empty
  153. * @retval >=1 Rx FIFO is empty
  154. *
  155. * @details This macro get Receiver FIFO empty register value.
  156. * \hideinitializer
  157. */
  158. #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
  159. /**
  160. * @brief Check specified UART port transmission is over.
  161. *
  162. * @param[in] uart The pointer of the specified UART module
  163. *
  164. * @retval 0 Tx transmission is not over
  165. * @retval 1 Tx transmission is over
  166. *
  167. * @details This macro return Transmitter Empty Flag register bit value.
  168. * It indicates if specified UART port transmission is over nor not.
  169. * \hideinitializer
  170. */
  171. #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
  172. /**
  173. * @brief Wait specified UART port transmission is over
  174. *
  175. * @param[in] uart The pointer of the specified UART module
  176. *
  177. * @return None
  178. *
  179. * @details This macro wait specified UART port transmission is over.
  180. * \hideinitializer
  181. */
  182. #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
  183. /**
  184. * @brief Check RX is ready or not
  185. *
  186. * @param[in] uart The pointer of the specified UART module
  187. *
  188. * @retval 0 The number of bytes in the RX FIFO is less than the RFITL
  189. * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
  190. *
  191. * @details This macro check receive data available interrupt flag is set or not.
  192. * \hideinitializer
  193. */
  194. #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
  195. /**
  196. * @brief Check TX FIFO is full or not
  197. *
  198. * @param[in] uart The pointer of the specified UART module
  199. *
  200. * @retval 1 TX FIFO is full
  201. * @retval 0 TX FIFO is not full
  202. *
  203. * @details This macro check TX FIFO is full or not.
  204. * \hideinitializer
  205. */
  206. #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
  207. /**
  208. * @brief Check RX FIFO is full or not
  209. *
  210. * @param[in] uart The pointer of the specified UART module
  211. *
  212. * @retval 1 RX FIFO is full
  213. * @retval 0 RX FIFO is not full
  214. *
  215. * @details This macro check RX FIFO is full or not.
  216. * \hideinitializer
  217. */
  218. #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
  219. /**
  220. * @brief Get Tx full register value
  221. *
  222. * @param[in] uart The pointer of the specified UART module
  223. *
  224. * @retval 0 Tx FIFO is not full.
  225. * @retval >=1 Tx FIFO is full.
  226. *
  227. * @details This macro get Tx full register value.
  228. * \hideinitializer
  229. */
  230. #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
  231. /**
  232. * @brief Get Rx full register value
  233. *
  234. * @param[in] uart The pointer of the specified UART module
  235. *
  236. * @retval 0 Rx FIFO is not full.
  237. * @retval >=1 Rx FIFO is full.
  238. *
  239. * @details This macro get Rx full register value.
  240. * \hideinitializer
  241. */
  242. #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
  243. /**
  244. * @brief Rx Idle Status register value
  245. *
  246. * @param[in] uart The pointer of the specified UART module
  247. *
  248. * @retval 0 Rx is busy.
  249. * @retval 1 Rx is Idle(Default)
  250. *
  251. * @details This macro get Rx Idle Status register value.
  252. * \hideinitializer
  253. */
  254. #define UART_RX_IDLE(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXIDLE_Msk )>> UART_FIFOSTS_RXIDLE_Pos)
  255. /**
  256. * @brief Enable specified UART interrupt
  257. *
  258. * @param[in] uart The pointer of the specified UART module
  259. * @param[in] u32eIntSel Interrupt type select
  260. * - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty interrupt
  261. * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
  262. * - \ref UART_INTEN_SWBEIEN_Msk : Single-wire bit error detection interrupt
  263. * - \ref UART_INTEN_RXPDMAEN_Msk : RX PDMA interrupt
  264. * - \ref UART_INTEN_TXPDMAEN_Msk : TX PDMA interrupt
  265. * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt
  266. * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
  267. * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
  268. * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt
  269. * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt
  270. * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
  271. * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
  272. *
  273. * @return None
  274. *
  275. * @details This macro enable specified UART interrupt.
  276. * \hideinitializer
  277. */
  278. #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
  279. /**
  280. * @brief Disable specified UART interrupt
  281. *
  282. * @param[in] uart The pointer of the specified UART module
  283. * @param[in] u32eIntSel Interrupt type select
  284. * - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty interrupt
  285. * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
  286. * - \ref UART_INTEN_SWBEIEN_Msk : Single-wire bit error detection interrupt
  287. * - \ref UART_INTEN_RXPDMAEN_Msk : RX PDMA interrupt
  288. * - \ref UART_INTEN_TXPDMAEN_Msk : TX PDMA interrupt
  289. * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt
  290. * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
  291. * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
  292. * - \ref UART_INTEN_MODEMIEN_Msk : Modem status interrupt
  293. * - \ref UART_INTEN_RLSIEN_Msk : Receive Line status interrupt
  294. * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
  295. * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
  296. *
  297. * @return None
  298. *
  299. * @details This macro enable specified UART interrupt.
  300. * \hideinitializer
  301. */
  302. #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
  303. /**
  304. * @brief Get specified interrupt flag/status
  305. *
  306. * @param[in] uart The pointer of the specified UART module
  307. * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
  308. * - \ref UART_INTSTS_ABRINT_Msk : Auto-baud Rate Interrupt Indicator
  309. * - \ref UART_INTSTS_TXENDINT_Msk : Transmitter Empty Interrupt Indicator
  310. * - \ref UART_INTSTS_HWBUFEINT_Msk : In PDMA Mode, Buffer Error Interrupt Indicator
  311. * - \ref UART_INTSTS_HWTOINT_Msk : In PDMA Mode, Time-out Interrupt Indicator
  312. * - \ref UART_INTSTS_HWMODINT_Msk : In PDMA Mode, MODEM Status Interrupt Indicator
  313. * - \ref UART_INTSTS_HWRLSINT_Msk : In PDMA Mode, Receive Line Status Interrupt Indicator
  314. * - \ref UART_INTSTS_SWBEINT_Msk : In Single-wire Mode, Bit Error Detect Interrupt Indicator
  315. * - \ref UART_INTSTS_TXENDIF_Msk : Transmitter Empty Interrupt Flag
  316. * - \ref UART_INTSTS_HWBUFEIF_Msk : In PDMA Mode, Buffer Error Interrupt Flag
  317. * - \ref UART_INTSTS_HWTOIF_Msk : In PDMA Mode, Time-out Interrupt Flag
  318. * - \ref UART_INTSTS_HWMODIF_Msk : In PDMA Mode, MODEM Interrupt Flag
  319. * - \ref UART_INTSTS_HWRLSIF_Msk : In PDMA Mode, Receive Line Status Flag
  320. * - \ref UART_INTSTS_SWBEIF_Msk : In Single-wire Mode, Bit Error Detection Interrupt Flag
  321. * - \ref UART_INTSTS_WKINT_Msk : Wake-up Interrupt Indicator
  322. * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator
  323. * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator
  324. * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
  325. * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
  326. * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
  327. * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
  328. * - \ref UART_INTSTS_WKIF_Msk : Wake-up Interrupt Flag
  329. * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
  330. * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
  331. * - \ref UART_INTSTS_MODEMIF_Msk : Modem Interrupt Flag
  332. * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
  333. * - \ref UART_INTSTS_THREIF_Msk : Tx Empty Interrupt Flag
  334. * - \ref UART_INTSTS_RDAIF_Msk : Rx Ready Interrupt Flag
  335. *
  336. * @retval 0 The specified interrupt is not happened.
  337. * @retval 1 The specified interrupt is happened.
  338. *
  339. * @details This macro get specified interrupt flag or interrupt indicator status.
  340. * \hideinitializer
  341. */
  342. #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
  343. /**
  344. * @brief Clear RS-485 Address Byte Detection Flag
  345. *
  346. * @param[in] uart The pointer of the specified UART module
  347. *
  348. * @return None
  349. *
  350. * @details This macro clear RS-485 address byte detection flag.
  351. * \hideinitializer
  352. */
  353. #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
  354. /**
  355. * @brief Get RS-485 Address Byte Detection Flag
  356. *
  357. * @param[in] uart The pointer of the specified UART module
  358. *
  359. * @retval 0 Receiver detects a data that is not an address bit.
  360. * @retval 1 Receiver detects a data that is an address bit.
  361. *
  362. * @details This macro get RS-485 address byte detection flag.
  363. * \hideinitializer
  364. */
  365. #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
  366. /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
  367. __STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart);
  368. __STATIC_INLINE void UART_SET_RTS(UART_T *uart);
  369. /**
  370. * @brief Set RTS pin to low
  371. *
  372. * @param[in] uart The pointer of the specified UART module
  373. *
  374. * @return None
  375. *
  376. * @details This macro set RTS pin to low.
  377. */
  378. __STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart)
  379. {
  380. uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
  381. uart->MODEM &= ~UART_MODEM_RTS_Msk;
  382. }
  383. /**
  384. * @brief Set RTS pin to high
  385. *
  386. * @param[in] uart The pointer of the specified UART module
  387. *
  388. * @return None
  389. *
  390. * @details This macro set RTS pin to high.
  391. */
  392. __STATIC_INLINE void UART_SET_RTS(UART_T *uart)
  393. {
  394. uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
  395. }
  396. void UART_ClearIntFlag(UART_T *uart, uint32_t u32InterruptFlag);
  397. void UART_Close(UART_T *uart);
  398. void UART_DisableFlowCtrl(UART_T *uart);
  399. void UART_DisableInt(UART_T *uart, uint32_t u32InterruptFlag);
  400. void UART_EnableFlowCtrl(UART_T *uart);
  401. void UART_EnableInt(UART_T *uart, uint32_t u32InterruptFlag);
  402. void UART_Open(UART_T *uart, uint32_t u32baudrate);
  403. uint32_t UART_Read(UART_T *uart, uint8_t pu8RxBuf[], uint32_t u32ReadBytes);
  404. void UART_SetLine_Config(UART_T *uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
  405. void UART_SetTimeoutCnt(UART_T *uart, uint32_t u32TOC);
  406. void UART_SelectIrDAMode(UART_T *uart, uint32_t u32Buadrate, uint32_t u32Direction);
  407. void UART_SelectRS485Mode(UART_T *uart, uint32_t u32Mode, uint32_t u32Addr);
  408. uint32_t UART_Write(UART_T *uart, uint8_t pu8TxBuf[], uint32_t u32WriteBytes);
  409. void UART_SelectSingleWireMode(UART_T *uart);
  410. /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
  411. /*@}*/ /* end of group UART_Driver */
  412. /*@}*/ /* end of group Standard_Driver */
  413. #ifdef __cplusplus
  414. }
  415. #endif
  416. #endif /*__NU_UART_H__*/
  417. /*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/