drv_uart.c 21 KB

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  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-9-2 Philo First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #if defined(BSP_USING_UART)
  14. #include <rtdevice.h>
  15. #include <rthw.h>
  16. #include "NuMicro.h"
  17. #include <drv_uart.h>
  18. #if defined(RT_SERIAL_USING_DMA)
  19. #include <drv_pdma.h>
  20. #endif
  21. /* Private define ---------------------------------------------------------------*/
  22. enum
  23. {
  24. UART_START = -1,
  25. #if defined(BSP_USING_UART0)
  26. UART0_IDX,
  27. #endif
  28. #if defined(BSP_USING_UART1)
  29. UART1_IDX,
  30. #endif
  31. #if defined(BSP_USING_UART2)
  32. UART2_IDX,
  33. #endif
  34. #if defined(BSP_USING_UART3)
  35. UART3_IDX,
  36. #endif
  37. #if defined(BSP_USING_UART4)
  38. UART4_IDX,
  39. #endif
  40. #if defined(BSP_USING_UART5)
  41. UART5_IDX,
  42. #endif
  43. #if defined(BSP_USING_UART6)
  44. UART6_IDX,
  45. #endif
  46. #if defined(BSP_USING_UART7)
  47. UART7_IDX,
  48. #endif
  49. UART_CNT
  50. };
  51. /* Private typedef --------------------------------------------------------------*/
  52. struct nu_uart
  53. {
  54. rt_serial_t dev;
  55. char *name;
  56. UART_T *uart_base;
  57. uint32_t uart_rst;
  58. IRQn_Type uart_irq_n;
  59. #if defined(RT_SERIAL_USING_DMA)
  60. uint32_t dma_flag;
  61. int16_t pdma_perp_tx;
  62. int8_t pdma_chanid_tx;
  63. int16_t pdma_perp_rx;
  64. int8_t pdma_chanid_rx;
  65. int32_t rx_write_offset;
  66. int32_t rxdma_trigger_len;
  67. #endif
  68. };
  69. typedef struct nu_uart *nu_uart_t;
  70. /* Private functions ------------------------------------------------------------*/
  71. static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
  72. static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *arg);
  73. static int nu_uart_send(struct rt_serial_device *serial, char c);
  74. static int nu_uart_receive(struct rt_serial_device *serial);
  75. static void nu_uart_isr(nu_uart_t serial);
  76. #if defined(RT_SERIAL_USING_DMA)
  77. static rt_size_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
  78. static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events);
  79. static void nu_pdma_uart_tx_cb(void *pvOwner, uint32_t u32Events);
  80. #endif
  81. /* Public functions ------------------------------------------------------------*/
  82. /* Private variables ------------------------------------------------------------*/
  83. static const struct rt_uart_ops nu_uart_ops =
  84. {
  85. .configure = nu_uart_configure,
  86. .control = nu_uart_control,
  87. .putc = nu_uart_send,
  88. .getc = nu_uart_receive,
  89. #if defined(RT_SERIAL_USING_DMA)
  90. .dma_transmit = nu_uart_dma_transmit
  91. #else
  92. .dma_transmit = RT_NULL
  93. #endif
  94. };
  95. static const struct serial_configure nu_uart_default_config =
  96. RT_SERIAL_CONFIG_DEFAULT;
  97. static struct nu_uart nu_uart_arr [] =
  98. {
  99. #if defined(BSP_USING_UART0)
  100. {
  101. .name = "uart0",
  102. .uart_base = UART0,
  103. .uart_rst = UART0_RST,
  104. .uart_irq_n = UART02_IRQn,
  105. #if defined(RT_SERIAL_USING_DMA)
  106. #if defined(BSP_USING_UART0_TX_DMA)
  107. .pdma_perp_tx = PDMA_UART0_TX,
  108. #else
  109. .pdma_perp_tx = NU_PDMA_UNUSED,
  110. #endif
  111. #if defined(BSP_USING_UART0_RX_DMA)
  112. .pdma_perp_rx = PDMA_UART0_RX,
  113. .rx_write_offset = 0,
  114. #else
  115. .pdma_perp_rx = NU_PDMA_UNUSED,
  116. #endif
  117. #endif
  118. },
  119. #endif
  120. #if defined(BSP_USING_UART1)
  121. {
  122. .name = "uart1",
  123. .uart_base = UART1,
  124. .uart_rst = UART1_RST,
  125. .uart_irq_n = UART13_IRQn,
  126. #if defined(RT_SERIAL_USING_DMA)
  127. #if defined(BSP_USING_UART1_TX_DMA)
  128. .pdma_perp_tx = PDMA_UART1_TX,
  129. #else
  130. .pdma_perp_tx = NU_PDMA_UNUSED,
  131. #endif
  132. #if defined(BSP_USING_UART1_RX_DMA)
  133. .pdma_perp_rx = PDMA_UART1_RX,
  134. .rx_write_offset = 0,
  135. #else
  136. .pdma_perp_rx = NU_PDMA_UNUSED,
  137. #endif
  138. #endif
  139. },
  140. #endif
  141. #if defined(BSP_USING_UART2)
  142. {
  143. .name = "uart2",
  144. .uart_base = UART2,
  145. .uart_rst = UART2_RST,
  146. .uart_irq_n = UART02_IRQn,
  147. #if defined(RT_SERIAL_USING_DMA)
  148. #if defined(BSP_USING_UART2_TX_DMA)
  149. .pdma_perp_tx = PDMA_UART2_TX,
  150. #else
  151. .pdma_perp_tx = NU_PDMA_UNUSED,
  152. #endif
  153. #if defined(BSP_USING_UART2_RX_DMA)
  154. .pdma_perp_rx = PDMA_UART2_RX,
  155. .rx_write_offset = 0,
  156. #else
  157. .pdma_perp_rx = NU_PDMA_UNUSED,
  158. #endif
  159. #endif
  160. },
  161. #endif
  162. #if defined(BSP_USING_UART3)
  163. {
  164. .name = "uart3",
  165. .uart_base = UART3,
  166. .uart_rst = UART3_RST,
  167. .uart_irq_n = UART13_IRQn,
  168. #if defined(RT_SERIAL_USING_DMA)
  169. #if defined(BSP_USING_UART3_TX_DMA)
  170. .pdma_perp_tx = PDMA_UART3_TX,
  171. #else
  172. .pdma_perp_tx = NU_PDMA_UNUSED,
  173. #endif
  174. #if defined(BSP_USING_UART3_RX_DMA)
  175. .pdma_perp_rx = PDMA_UART3_RX,
  176. .rx_write_offset = 0,
  177. #else
  178. .pdma_perp_rx = NU_PDMA_UNUSED,
  179. #endif
  180. #endif
  181. },
  182. #endif
  183. #if defined(BSP_USING_UART4)
  184. {
  185. .name = "uart4",
  186. .uart_base = UART4,
  187. .uart_rst = UART4_RST,
  188. .uart_irq_n = UART46_IRQn,
  189. #if defined(RT_SERIAL_USING_DMA)
  190. #if defined(BSP_USING_UART4_TX_DMA)
  191. .pdma_perp_tx = PDMA_UART4_TX,
  192. #else
  193. .pdma_perp_tx = NU_PDMA_UNUSED,
  194. #endif
  195. #if defined(BSP_USING_UART4_RX_DMA)
  196. .pdma_perp_rx = PDMA_UART4_RX,
  197. .rx_write_offset = 0,
  198. #else
  199. .pdma_perp_rx = NU_PDMA_UNUSED,
  200. #endif
  201. #endif
  202. },
  203. #endif
  204. #if defined(BSP_USING_UART5)
  205. {
  206. .name = "uart5",
  207. .uart_base = UART5,
  208. .uart_rst = UART5_RST,
  209. .uart_irq_n = UART57_IRQn,
  210. #if defined(RT_SERIAL_USING_DMA)
  211. #if defined(BSP_USING_UART5_TX_DMA)
  212. .pdma_perp_tx = PDMA_UART5_TX,
  213. #else
  214. .pdma_perp_tx = NU_PDMA_UNUSED,
  215. #endif
  216. #if defined(BSP_USING_UART5_RX_DMA)
  217. .pdma_perp_rx = PDMA_UART5_RX,
  218. .rx_write_offset = 0,
  219. #else
  220. .pdma_perp_rx = NU_PDMA_UNUSED,
  221. #endif
  222. #endif
  223. },
  224. #endif
  225. #if defined(BSP_USING_UART6)
  226. {
  227. .name = "uart6",
  228. .uart_base = UART6,
  229. .uart_rst = UART6_RST,
  230. .uart_irq_n = UART46_IRQn,
  231. #if defined(RT_SERIAL_USING_DMA)
  232. #if defined(BSP_USING_UART6_TX_DMA)
  233. .pdma_perp_tx = PDMA_UART6_TX,
  234. #else
  235. .pdma_perp_tx = NU_PDMA_UNUSED,
  236. #endif
  237. #if defined(BSP_USING_UART6_RX_DMA)
  238. .pdma_perp_rx = PDMA_UART6_RX,
  239. .rx_write_offset = 0,
  240. #else
  241. .pdma_perp_rx = NU_PDMA_UNUSED,
  242. #endif
  243. #endif
  244. },
  245. #endif
  246. #if defined(BSP_USING_UART7)
  247. {
  248. .name = "uart7",
  249. .uart_base = UART7,
  250. .uart_rst = UART7_RST,
  251. .uart_irq_n = UART57_IRQn,
  252. #if defined(RT_SERIAL_USING_DMA)
  253. #if defined(BSP_USING_UART7_TX_DMA)
  254. .pdma_perp_tx = PDMA_UART7_TX,
  255. #else
  256. .pdma_perp_tx = NU_PDMA_UNUSED,
  257. #endif
  258. #if defined(BSP_USING_UART7_RX_DMA)
  259. .pdma_perp_rx = PDMA_UART7_RX,
  260. .rx_write_offset = 0,
  261. #else
  262. .pdma_perp_rx = NU_PDMA_UNUSED,
  263. #endif
  264. #endif
  265. },
  266. #endif
  267. {0}
  268. }; /* uart nu_uart */
  269. /* Interrupt Handle Function ----------------------------------------------------*/
  270. #if defined(BSP_USING_UART0) || defined(BSP_USING_UART2)
  271. /* UART02 interrupt entry */
  272. void UART02_IRQHandler(void)
  273. {
  274. /* enter interrupt */
  275. rt_interrupt_enter();
  276. #if defined(BSP_USING_UART0)
  277. nu_uart_isr(&nu_uart_arr[UART0_IDX]);
  278. #endif
  279. #if defined(BSP_USING_UART2)
  280. nu_uart_isr(&nu_uart_arr[UART2_IDX]);
  281. #endif
  282. /* leave interrupt */
  283. rt_interrupt_leave();
  284. }
  285. #endif
  286. #if defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
  287. /* UART13 interrupt entry */
  288. void UART13_IRQHandler(void)
  289. {
  290. /* enter interrupt */
  291. rt_interrupt_enter();
  292. #if defined(BSP_USING_UART1)
  293. nu_uart_isr(&nu_uart_arr[UART1_IDX]);
  294. #endif
  295. #if defined(BSP_USING_UART3)
  296. nu_uart_isr(&nu_uart_arr[UART3_IDX]);
  297. #endif
  298. /* leave interrupt */
  299. rt_interrupt_leave();
  300. }
  301. #endif
  302. #if defined(BSP_USING_UART4) || defined(BSP_USING_UART6)
  303. /* UART46 interrupt entry */
  304. void UART46_IRQHandler(void)
  305. {
  306. /* enter interrupt */
  307. rt_interrupt_enter();
  308. #if defined(BSP_USING_UART4)
  309. nu_uart_isr(&nu_uart_arr[UART4_IDX]);
  310. #endif
  311. #if defined(BSP_USING_UART6)
  312. nu_uart_isr(&nu_uart_arr[UART6_IDX]);
  313. #endif
  314. /* leave interrupt */
  315. rt_interrupt_leave();
  316. }
  317. #endif
  318. #if defined(BSP_USING_UART5) || defined(BSP_USING_UART7)
  319. /* UART57 interrupt entry */
  320. void UART57_IRQHandler(void)
  321. {
  322. /* enter interrupt */
  323. rt_interrupt_enter();
  324. #if defined(BSP_USING_UART5)
  325. nu_uart_isr(&nu_uart_arr[UART5_IDX]);
  326. #endif
  327. #if defined(BSP_USING_UART7)
  328. nu_uart_isr(&nu_uart_arr[UART7_IDX]);
  329. #endif
  330. /* leave interrupt */
  331. rt_interrupt_leave();
  332. }
  333. #endif
  334. /**
  335. * All UART interrupt service routine
  336. */
  337. static void nu_uart_isr(nu_uart_t serial)
  338. {
  339. /* Get base address of uart register */
  340. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  341. /* Get interrupt event */
  342. uint32_t u32IntSts = uart_base->INTSTS;
  343. uint32_t u32FIFOSts = uart_base->FIFOSTS;
  344. #if defined(RT_SERIAL_USING_DMA)
  345. if (u32IntSts & UART_INTSTS_HWRLSIF_Msk)
  346. {
  347. /* Drain RX FIFO to remove remain FEF frames in FIFO. */
  348. uart_base->FIFO |= UART_FIFO_RXRST_Msk;
  349. uart_base->FIFOSTS |= (UART_FIFOSTS_BIF_Msk | UART_FIFOSTS_FEF_Msk | UART_FIFOSTS_PEF_Msk);
  350. return;
  351. }
  352. #endif
  353. /* Handle RX event */
  354. if (u32IntSts & (UART_INTSTS_RDAINT_Msk | UART_INTSTS_RXTOINT_Msk))
  355. {
  356. rt_hw_serial_isr(&serial->dev, RT_SERIAL_EVENT_RX_IND);
  357. }
  358. uart_base->INTSTS = u32IntSts;
  359. uart_base->FIFOSTS = u32FIFOSts;
  360. }
  361. /**
  362. * Configure uart port
  363. */
  364. static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  365. {
  366. rt_err_t ret = RT_EOK;
  367. uint32_t uart_word_len = 0;
  368. uint32_t uart_stop_bit = 0;
  369. uint32_t uart_parity = 0;
  370. /* Get base address of uart register */
  371. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  372. /* Check baudrate */
  373. RT_ASSERT(cfg->baud_rate != 0);
  374. /* Check word len */
  375. switch (cfg->data_bits)
  376. {
  377. case DATA_BITS_5:
  378. uart_word_len = UART_WORD_LEN_5;
  379. break;
  380. case DATA_BITS_6:
  381. uart_word_len = UART_WORD_LEN_6;
  382. break;
  383. case DATA_BITS_7:
  384. uart_word_len = UART_WORD_LEN_7;
  385. break;
  386. case DATA_BITS_8:
  387. uart_word_len = UART_WORD_LEN_8;
  388. break;
  389. default:
  390. rt_kprintf("Unsupported data length");
  391. ret = RT_EINVAL;
  392. goto exit_nu_uart_configure;
  393. }
  394. /* Check stop bit */
  395. switch (cfg->stop_bits)
  396. {
  397. case STOP_BITS_1:
  398. uart_stop_bit = UART_STOP_BIT_1;
  399. break;
  400. case STOP_BITS_2:
  401. uart_stop_bit = UART_STOP_BIT_2;
  402. break;
  403. default:
  404. rt_kprintf("Unsupported stop bit");
  405. ret = RT_EINVAL;
  406. goto exit_nu_uart_configure;
  407. }
  408. /* Check parity */
  409. switch (cfg->parity)
  410. {
  411. case PARITY_NONE:
  412. uart_parity = UART_PARITY_NONE;
  413. break;
  414. case PARITY_ODD:
  415. uart_parity = UART_PARITY_ODD;
  416. break;
  417. case PARITY_EVEN:
  418. uart_parity = UART_PARITY_EVEN;
  419. break;
  420. default:
  421. rt_kprintf("Unsupported parity");
  422. ret = RT_EINVAL;
  423. goto exit_nu_uart_configure;
  424. }
  425. /* Reset this module */
  426. SYS_ResetModule(((nu_uart_t)serial)->uart_rst);
  427. /* Open Uart and set UART Baudrate */
  428. UART_Open(uart_base, cfg->baud_rate);
  429. /* Set line configuration. */
  430. UART_SetLine_Config(uart_base, 0, uart_word_len, uart_parity, uart_stop_bit);
  431. /* Enable NVIC interrupt. */
  432. NVIC_EnableIRQ(((nu_uart_t)serial)->uart_irq_n);
  433. exit_nu_uart_configure:
  434. if (ret != RT_EOK)
  435. UART_Close(uart_base);
  436. return -(ret);
  437. }
  438. #if defined(RT_SERIAL_USING_DMA)
  439. static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t *pu8Buf, int32_t i32TriggerLen)
  440. {
  441. rt_err_t result = RT_EOK;
  442. /* Get base address of uart register */
  443. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  444. result = nu_pdma_callback_register(((nu_uart_t)serial)->pdma_chanid_rx,
  445. nu_pdma_uart_rx_cb,
  446. (void *)serial,
  447. NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
  448. if ( result != RT_EOK )
  449. {
  450. goto exit_nu_pdma_uart_rx_config;
  451. }
  452. result = nu_pdma_transfer(((nu_uart_t)serial)->pdma_chanid_rx,
  453. 8,
  454. (uint32_t)uart_base,
  455. (uint32_t)pu8Buf,
  456. i32TriggerLen,
  457. 1000); //Idle-timeout, 1ms
  458. if ( result != RT_EOK )
  459. {
  460. goto exit_nu_pdma_uart_rx_config;
  461. }
  462. /* Enable Receive Line interrupt & Start DMA RX transfer. */
  463. UART_ENABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
  464. UART_ENABLE_INT(uart_base, UART_INTEN_RXPDMAEN_Msk);
  465. exit_nu_pdma_uart_rx_config:
  466. return result;
  467. }
  468. static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events)
  469. {
  470. rt_size_t recv_len = 0;
  471. rt_size_t transferred_rxbyte = 0;
  472. struct rt_serial_device *serial = (struct rt_serial_device *)pvOwner;
  473. nu_uart_t puart = (nu_uart_t)serial;
  474. RT_ASSERT(serial != RT_NULL);
  475. /* Get base address of uart register */
  476. UART_T *uart_base = puart->uart_base;
  477. transferred_rxbyte = nu_pdma_transferred_byte_get(puart->pdma_chanid_rx, puart->rxdma_trigger_len);
  478. if (u32Events & (NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT))
  479. {
  480. if (u32Events & NU_PDMA_EVENT_TRANSFER_DONE)
  481. {
  482. if (serial->config.bufsz != 0)
  483. {
  484. struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  485. nu_pdma_uart_rx_config(serial, &rx_fifo->buffer[0], puart->rxdma_trigger_len); // Config & trigger next
  486. }
  487. else
  488. {
  489. UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
  490. UART_DISABLE_INT(uart_base, UART_INTEN_RXPDMAEN_Msk);
  491. }
  492. transferred_rxbyte = puart->rxdma_trigger_len;
  493. }
  494. else if ((u32Events & NU_PDMA_EVENT_TIMEOUT) && !UART_GET_RX_EMPTY(uart_base))
  495. {
  496. return;
  497. }
  498. recv_len = transferred_rxbyte - puart->rx_write_offset;
  499. puart->rx_write_offset = transferred_rxbyte % puart->rxdma_trigger_len;
  500. }
  501. if ((serial->config.bufsz == 0) && (u32Events & NU_PDMA_EVENT_TRANSFER_DONE))
  502. {
  503. recv_len = puart->rxdma_trigger_len;
  504. }
  505. if (recv_len)
  506. {
  507. rt_hw_serial_isr(&puart->dev, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  508. }
  509. }
  510. static rt_err_t nu_pdma_uart_tx_config(struct rt_serial_device *serial)
  511. {
  512. rt_err_t result = RT_EOK;
  513. RT_ASSERT(serial != RT_NULL);
  514. result = nu_pdma_callback_register(((nu_uart_t)serial)->pdma_chanid_tx,
  515. nu_pdma_uart_tx_cb,
  516. (void *)serial,
  517. NU_PDMA_EVENT_TRANSFER_DONE);
  518. return result;
  519. }
  520. static void nu_pdma_uart_tx_cb(void *pvOwner, uint32_t u32Events)
  521. {
  522. nu_uart_t puart = (nu_uart_t)pvOwner;
  523. RT_ASSERT(puart != RT_NULL);
  524. UART_DISABLE_INT(puart->uart_base, UART_INTEN_TXPDMAEN_Msk);// Stop DMA TX transfer
  525. if (u32Events & NU_PDMA_EVENT_TRANSFER_DONE)
  526. {
  527. rt_hw_serial_isr(&puart->dev, RT_SERIAL_EVENT_TX_DMADONE);
  528. }
  529. }
  530. /**
  531. * Uart DMA transfer
  532. */
  533. static rt_size_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  534. {
  535. rt_err_t result = RT_EOK;
  536. RT_ASSERT(serial != RT_NULL);
  537. RT_ASSERT(buf != RT_NULL);
  538. /* Get base address of uart register */
  539. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  540. if (direction == RT_SERIAL_DMA_TX)
  541. {
  542. result = nu_pdma_transfer(((nu_uart_t)serial)->pdma_chanid_tx,
  543. 8,
  544. (uint32_t)buf,
  545. (uint32_t)uart_base,
  546. size,
  547. 0); // wait-forever
  548. UART_ENABLE_INT(uart_base, UART_INTEN_TXPDMAEN_Msk); // Start DMA TX transfer
  549. }
  550. else if (direction == RT_SERIAL_DMA_RX)
  551. {
  552. UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
  553. UART_DISABLE_INT(uart_base, UART_INTEN_RXPDMAEN_Msk);
  554. // If config.bufsz = 0, serial will trigger once.
  555. ((nu_uart_t)serial)->rxdma_trigger_len = size;
  556. ((nu_uart_t)serial)->rx_write_offset = 0;
  557. result = nu_pdma_uart_rx_config(serial, buf, size);
  558. }
  559. else
  560. {
  561. result = RT_ERROR;
  562. }
  563. return result;
  564. }
  565. static int nu_hw_uart_dma_allocate(nu_uart_t pusrt)
  566. {
  567. RT_ASSERT(pusrt != RT_NULL);
  568. /* Allocate UART_TX nu_dma channel */
  569. if (pusrt->pdma_perp_tx != NU_PDMA_UNUSED)
  570. {
  571. pusrt->pdma_chanid_tx = nu_pdma_channel_allocate(pusrt->pdma_perp_tx);
  572. if (pusrt->pdma_chanid_tx >= 0)
  573. {
  574. pusrt->dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  575. }
  576. }
  577. /* Allocate UART_RX nu_dma channel */
  578. if (pusrt->pdma_perp_rx != NU_PDMA_UNUSED)
  579. {
  580. pusrt->pdma_chanid_rx = nu_pdma_channel_allocate(pusrt->pdma_perp_rx);
  581. if (pusrt->pdma_chanid_rx >= 0)
  582. {
  583. pusrt->dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  584. }
  585. }
  586. return RT_EOK;
  587. }
  588. #endif
  589. /**
  590. * Uart interrupt control
  591. */
  592. static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  593. {
  594. rt_err_t result = RT_EOK;
  595. rt_uint32_t flag;
  596. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  597. RT_ASSERT(serial != RT_NULL);
  598. /* Get base address of uart register */
  599. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  600. switch (cmd)
  601. {
  602. case RT_DEVICE_CTRL_CLR_INT:
  603. if (ctrl_arg == RT_DEVICE_FLAG_INT_RX) /* Disable INT-RX */
  604. {
  605. flag = UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk;
  606. UART_DISABLE_INT(uart_base, flag);
  607. }
  608. else if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Disable DMA-RX */
  609. {
  610. /* Disable Receive Line interrupt & Stop DMA RX transfer. */
  611. #if defined(RT_SERIAL_USING_DMA)
  612. nu_pdma_channel_terminate(((nu_uart_t)serial)->pdma_chanid_rx);
  613. UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
  614. UART_DISABLE_INT(uart_base, UART_INTEN_RXPDMAEN_Msk);
  615. #endif
  616. }
  617. break;
  618. case RT_DEVICE_CTRL_SET_INT:
  619. if (ctrl_arg == RT_DEVICE_FLAG_INT_RX) /* Enable INT-RX */
  620. {
  621. flag = UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk;
  622. UART_ENABLE_INT(uart_base, flag);
  623. }
  624. break;
  625. #if defined(RT_SERIAL_USING_DMA)
  626. case RT_DEVICE_CTRL_CONFIG:
  627. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Configure and trigger DMA-RX */
  628. {
  629. struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  630. ((nu_uart_t)serial)->rxdma_trigger_len = serial->config.bufsz;
  631. ((nu_uart_t)serial)->rx_write_offset = 0;
  632. result = nu_pdma_uart_rx_config(serial, &rx_fifo->buffer[0], ((nu_uart_t)serial)->rxdma_trigger_len); // Config & trigger
  633. }
  634. else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX) /* Configure DMA-TX */
  635. {
  636. result = nu_pdma_uart_tx_config(serial);
  637. }
  638. break;
  639. #endif
  640. case RT_DEVICE_CTRL_CLOSE:
  641. /* Disable NVIC interrupt. */
  642. NVIC_DisableIRQ(((nu_uart_t)serial)->uart_irq_n);
  643. #if defined(RT_SERIAL_USING_DMA)
  644. nu_pdma_channel_terminate(((nu_uart_t)serial)->pdma_chanid_tx);
  645. nu_pdma_channel_terminate(((nu_uart_t)serial)->pdma_chanid_rx);
  646. #endif
  647. /* Reset this module */
  648. SYS_ResetModule(((nu_uart_t)serial)->uart_rst);
  649. /* Close UART port */
  650. UART_Close(uart_base);
  651. break;
  652. default:
  653. result = -RT_EINVAL;
  654. break;
  655. }
  656. return result;
  657. }
  658. /**
  659. * Uart put char
  660. */
  661. static int nu_uart_send(struct rt_serial_device *serial, char c)
  662. {
  663. RT_ASSERT(serial != RT_NULL);
  664. /* Get base address of uart register */
  665. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  666. /* Waiting if TX-FIFO is full. */
  667. while (UART_IS_TX_FULL(uart_base));
  668. /* Put char into TX-FIFO */
  669. UART_WRITE(uart_base, c);
  670. return 1;
  671. }
  672. /**
  673. * Uart get char
  674. */
  675. static int nu_uart_receive(struct rt_serial_device *serial)
  676. {
  677. RT_ASSERT(serial != RT_NULL);
  678. /* Get base address of uart register */
  679. UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
  680. /* Return failure if RX-FIFO is empty. */
  681. if (UART_GET_RX_EMPTY(uart_base))
  682. {
  683. return -1;
  684. }
  685. /* Get char from RX-FIFO */
  686. return UART_READ(uart_base);
  687. }
  688. /**
  689. * Hardware UART Initialization
  690. */
  691. rt_err_t rt_hw_uart_init(void)
  692. {
  693. int i;
  694. rt_uint32_t flag;
  695. rt_err_t ret = RT_EOK;
  696. for (i = (UART_START + 1); i < UART_CNT; i++)
  697. {
  698. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  699. nu_uart_arr[i].dev.ops = &nu_uart_ops;
  700. nu_uart_arr[i].dev.config = nu_uart_default_config;
  701. #if defined(RT_SERIAL_USING_DMA)
  702. nu_uart_arr[i].dma_flag = 0;
  703. nu_hw_uart_dma_allocate(&nu_uart_arr[i]);
  704. flag |= nu_uart_arr[i].dma_flag;
  705. #endif
  706. ret = rt_hw_serial_register(&nu_uart_arr[i].dev, nu_uart_arr[i].name, flag, NULL);
  707. RT_ASSERT(ret == RT_EOK);
  708. }
  709. return ret;
  710. }
  711. #endif //#if defined(BSP_USING_UART)