drv_i2s.c 17 KB

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  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-2-7 Wayne Lin First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #if defined(BSP_USING_I2S)
  14. #include <rtdevice.h>
  15. #include <drv_pdma.h>
  16. #include <drv_i2s.h>
  17. /* Private define ---------------------------------------------------------------*/
  18. #define DBG_ENABLE
  19. #define DBG_LEVEL DBG_LOG
  20. #define DBG_SECTION_NAME "i2s"
  21. #define DBG_COLOR
  22. #include <rtdbg.h>
  23. /* Private functions ------------------------------------------------------------*/
  24. static rt_err_t nu_i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps);
  25. static rt_err_t nu_i2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps);
  26. static rt_err_t nu_i2s_init(struct rt_audio_device *audio);
  27. static rt_err_t nu_i2s_start(struct rt_audio_device *audio, int stream);
  28. static rt_err_t nu_i2s_stop(struct rt_audio_device *audio, int stream);
  29. static void nu_i2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info);
  30. /* Public functions -------------------------------------------------------------*/
  31. rt_err_t nu_i2s_acodec_register(nu_acodec_ops_t);
  32. /* Private variables ------------------------------------------------------------*/
  33. static struct nu_i2s g_nu_i2s_dev =
  34. {
  35. .name = "sound0",
  36. .i2s_base = I2S0,
  37. .i2s_rst = I2S0_RST,
  38. .i2s_dais = {
  39. [NU_I2S_DAI_PLAYBACK] = {
  40. .pdma_perp = PDMA_I2S0_TX,
  41. },
  42. [NU_I2S_DAI_CAPTURE] = {
  43. .pdma_perp = PDMA_I2S0_RX,
  44. }
  45. }
  46. };
  47. static void nu_pdma_i2s_rx_cb(void *pvUserData, uint32_t u32EventFilter)
  48. {
  49. nu_i2s_t psNuI2s = (nu_i2s_t)pvUserData;
  50. nu_i2s_dai_t psNuI2sDai;
  51. RT_ASSERT(psNuI2s != RT_NULL);
  52. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_CAPTURE];
  53. if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
  54. {
  55. // Report a buffer ready.
  56. rt_uint8_t *pbuf_old = &psNuI2sDai->fifo[psNuI2sDai->fifo_block_idx * NU_I2S_DMA_BUF_BLOCK_SIZE] ;
  57. psNuI2sDai->fifo_block_idx = (psNuI2sDai->fifo_block_idx + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER;
  58. /* Report upper layer. */
  59. rt_audio_rx_done(&psNuI2s->audio, pbuf_old, NU_I2S_DMA_BUF_BLOCK_SIZE);
  60. }
  61. }
  62. static void nu_pdma_i2s_tx_cb(void *pvUserData, uint32_t u32EventFilter)
  63. {
  64. nu_i2s_t psNuI2s = (nu_i2s_t)pvUserData;
  65. nu_i2s_dai_t psNuI2sDai;
  66. RT_ASSERT(psNuI2s != RT_NULL);
  67. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_PLAYBACK];
  68. if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
  69. {
  70. rt_audio_tx_complete(&psNuI2s->audio);
  71. psNuI2sDai->fifo_block_idx = (psNuI2sDai->fifo_block_idx + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER;
  72. }
  73. }
  74. static rt_err_t nu_i2s_pdma_sc_config(nu_i2s_t psNuI2s, E_NU_I2S_DAI dai)
  75. {
  76. rt_err_t result = RT_EOK;
  77. I2S_T *i2s_base;
  78. nu_i2s_dai_t psNuI2sDai;
  79. int i;
  80. uint32_t u32Src, u32Dst;
  81. nu_pdma_cb_handler_t pfm_pdma_cb;
  82. RT_ASSERT(psNuI2s != RT_NULL);
  83. /* Get base address of i2s register */
  84. i2s_base = psNuI2s->i2s_base;
  85. psNuI2sDai = &psNuI2s->i2s_dais[dai];
  86. switch ((int)dai)
  87. {
  88. case NU_I2S_DAI_PLAYBACK:
  89. pfm_pdma_cb = nu_pdma_i2s_tx_cb;
  90. u32Src = (uint32_t)&psNuI2sDai->fifo[0];
  91. u32Dst = (uint32_t)&i2s_base->TXFIFO;
  92. break;
  93. case NU_I2S_DAI_CAPTURE:
  94. pfm_pdma_cb = nu_pdma_i2s_rx_cb;
  95. u32Src = (uint32_t)&i2s_base->RXFIFO;
  96. u32Dst = (uint32_t)&psNuI2sDai->fifo[0];
  97. break;
  98. default:
  99. return -RT_EINVAL;
  100. }
  101. result = nu_pdma_callback_register(psNuI2sDai->pdma_chanid,
  102. pfm_pdma_cb,
  103. (void *)psNuI2s,
  104. NU_PDMA_EVENT_TRANSFER_DONE);
  105. RT_ASSERT(result == RT_EOK);
  106. for (i = 0; i < NU_I2S_DMA_BUF_BLOCK_NUMBER; i++)
  107. {
  108. /* Setup dma descriptor entry */
  109. result = nu_pdma_desc_setup(psNuI2sDai->pdma_chanid, // Channel ID
  110. psNuI2sDai->pdma_descs[i], // this descriptor
  111. 32, // 32-bits
  112. (dai == NU_I2S_DAI_PLAYBACK) ? u32Src + (i * NU_I2S_DMA_BUF_BLOCK_SIZE) : u32Src, //Memory or RXFIFO
  113. (dai == NU_I2S_DAI_PLAYBACK) ? u32Dst : u32Dst + (i * NU_I2S_DMA_BUF_BLOCK_SIZE), //TXFIFO or Memory
  114. (int32_t)NU_I2S_DMA_BUF_BLOCK_SIZE / 4, // Transfer count
  115. psNuI2sDai->pdma_descs[(i + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER]); // Next descriptor
  116. RT_ASSERT(result == RT_EOK);
  117. }
  118. /* Assign head descriptor */
  119. result = nu_pdma_sg_transfer(psNuI2sDai->pdma_chanid, psNuI2sDai->pdma_descs[0], 0);
  120. RT_ASSERT(result == RT_EOK);
  121. return result;
  122. }
  123. static rt_bool_t nu_i2s_capacity_check(struct rt_audio_configure *pconfig)
  124. {
  125. switch (pconfig->samplebits)
  126. {
  127. case 8:
  128. case 16:
  129. /* case 24: PDMA constrain */
  130. case 32:
  131. break;
  132. default:
  133. goto exit_nu_i2s_capacity_check;
  134. }
  135. switch (pconfig->channels)
  136. {
  137. case 1:
  138. case 2:
  139. break;
  140. default:
  141. goto exit_nu_i2s_capacity_check;
  142. }
  143. return RT_TRUE;
  144. exit_nu_i2s_capacity_check:
  145. return RT_FALSE;
  146. }
  147. static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pconfig)
  148. {
  149. rt_err_t result = RT_EOK;
  150. nu_acodec_ops_t pNuACodecOps = RT_NULL;
  151. RT_ASSERT(psNuI2s->AcodecOps != RT_NULL);
  152. pNuACodecOps = psNuI2s->AcodecOps;
  153. rt_uint32_t real_samplerate;
  154. /* Open I2S */
  155. if (nu_i2s_capacity_check(pconfig) == RT_TRUE)
  156. {
  157. /* Reset audio codec */
  158. if (pNuACodecOps->nu_acodec_reset)
  159. result = pNuACodecOps->nu_acodec_reset();
  160. if (result != RT_EOK)
  161. goto exit_nu_i2s_dai_setup;
  162. /* Setup audio codec */
  163. if (pNuACodecOps->nu_acodec_init)
  164. result = pNuACodecOps->nu_acodec_init();
  165. if (!pNuACodecOps->nu_acodec_init || result != RT_EOK)
  166. goto exit_nu_i2s_dai_setup;
  167. /* Setup acodec samplerate/samplebit/channel */
  168. if (pNuACodecOps->nu_acodec_dsp_control)
  169. result = pNuACodecOps->nu_acodec_dsp_control(pconfig);
  170. if (!pNuACodecOps->nu_acodec_dsp_control || result != RT_EOK)
  171. goto exit_nu_i2s_dai_setup;
  172. real_samplerate = I2S_Open(psNuI2s->i2s_base,
  173. (psNuI2s->AcodecOps->role == NU_ACODEC_ROLE_MASTER) ? I2S_MODE_SLAVE : I2S_MODE_MASTER,
  174. pconfig->samplerate,
  175. (((pconfig->samplebits / 8) - 1) << I2S_CTL0_DATWIDTH_Pos),
  176. (pconfig->channels == 1) ? I2S_ENABLE_MONO : I2S_DISABLE_MONO,
  177. I2S_FORMAT_I2S);
  178. LOG_I("Open I2S.");
  179. /* Open I2S0 interface and set to slave mode, stereo channel, I2S format */
  180. if (pconfig->samplerate != real_samplerate)
  181. {
  182. LOG_W("Real sample rate: %d Hz != preferred sample rate: %d Hz\n", real_samplerate, pconfig->samplerate);
  183. }
  184. /* Set MCLK and enable MCLK */
  185. /* The target MCLK is related to audio codec setting. */
  186. I2S_EnableMCLK(psNuI2s->i2s_base, 12000000);
  187. /* Set unmute */
  188. if (pNuACodecOps->nu_acodec_mixer_control)
  189. pNuACodecOps->nu_acodec_mixer_control(AUDIO_MIXER_MUTE, RT_FALSE);
  190. }
  191. else
  192. result = -RT_EINVAL;
  193. exit_nu_i2s_dai_setup:
  194. return result;
  195. }
  196. static rt_err_t nu_i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  197. {
  198. rt_err_t result = RT_EOK;
  199. nu_i2s_t psNuI2s;
  200. nu_acodec_ops_t pNuACodecOps = RT_NULL;
  201. RT_ASSERT(audio != RT_NULL);
  202. RT_ASSERT(caps != RT_NULL);
  203. psNuI2s = (nu_i2s_t)audio;
  204. RT_ASSERT(psNuI2s->AcodecOps != RT_NULL);
  205. pNuACodecOps = psNuI2s->AcodecOps;
  206. switch (caps->main_type)
  207. {
  208. case AUDIO_TYPE_QUERY:
  209. switch (caps->sub_type)
  210. {
  211. case AUDIO_TYPE_QUERY:
  212. caps->udata.mask = AUDIO_TYPE_INPUT | AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER;
  213. break;
  214. default:
  215. result = -RT_ERROR;
  216. break;
  217. } // switch (caps->sub_type)
  218. break;
  219. case AUDIO_TYPE_MIXER:
  220. if (pNuACodecOps->nu_acodec_mixer_query)
  221. {
  222. switch (caps->sub_type)
  223. {
  224. case AUDIO_MIXER_QUERY:
  225. return pNuACodecOps->nu_acodec_mixer_query(AUDIO_MIXER_QUERY, &caps->udata.mask);
  226. default:
  227. return pNuACodecOps->nu_acodec_mixer_query(caps->sub_type, (rt_uint32_t *)&caps->udata.value);
  228. } // switch (caps->sub_type)
  229. } // if (pNuACodecOps->nu_acodec_mixer_query)
  230. result = -RT_ERROR;
  231. break;
  232. case AUDIO_TYPE_INPUT:
  233. case AUDIO_TYPE_OUTPUT:
  234. switch (caps->sub_type)
  235. {
  236. case AUDIO_DSP_PARAM:
  237. caps->udata.config.channels = psNuI2s->config.channels;
  238. caps->udata.config.samplebits = psNuI2s->config.samplebits;
  239. caps->udata.config.samplerate = psNuI2s->config.samplerate;
  240. break;
  241. case AUDIO_DSP_SAMPLERATE:
  242. caps->udata.config.samplerate = psNuI2s->config.samplerate;
  243. break;
  244. case AUDIO_DSP_CHANNELS:
  245. caps->udata.config.channels = psNuI2s->config.channels;
  246. break;
  247. case AUDIO_DSP_SAMPLEBITS:
  248. caps->udata.config.samplebits = psNuI2s->config.samplebits;
  249. break;
  250. default:
  251. result = -RT_ERROR;
  252. break;
  253. } // switch (caps->sub_type)
  254. break;
  255. default:
  256. result = -RT_ERROR;
  257. break;
  258. } // switch (caps->main_type)
  259. return result;
  260. }
  261. static rt_err_t nu_i2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  262. {
  263. rt_err_t result = RT_EOK;
  264. nu_i2s_t psNuI2s;
  265. nu_acodec_ops_t pNuACodecOps = RT_NULL;
  266. int stream = -1;
  267. RT_ASSERT(audio != RT_NULL);
  268. RT_ASSERT(caps != RT_NULL);
  269. psNuI2s = (nu_i2s_t)audio;
  270. RT_ASSERT(psNuI2s->AcodecOps != RT_NULL);
  271. pNuACodecOps = psNuI2s->AcodecOps;
  272. switch (caps->main_type)
  273. {
  274. case AUDIO_TYPE_MIXER:
  275. if (psNuI2s->AcodecOps->nu_acodec_mixer_control)
  276. psNuI2s->AcodecOps->nu_acodec_mixer_control(caps->sub_type, caps->udata.value);
  277. break;
  278. case AUDIO_TYPE_INPUT:
  279. stream = AUDIO_STREAM_RECORD;
  280. case AUDIO_TYPE_OUTPUT:
  281. {
  282. rt_bool_t bNeedReset = RT_FALSE;
  283. if (stream < 0)
  284. stream = AUDIO_STREAM_REPLAY;
  285. switch (caps->sub_type)
  286. {
  287. case AUDIO_DSP_PARAM:
  288. if (rt_memcmp(&psNuI2s->config, &caps->udata.config, sizeof(struct rt_audio_configure)) != 0)
  289. {
  290. rt_memcpy(&psNuI2s->config, &caps->udata.config, sizeof(struct rt_audio_configure));
  291. bNeedReset = RT_TRUE;
  292. }
  293. break;
  294. case AUDIO_DSP_SAMPLEBITS:
  295. if (psNuI2s->config.samplerate != caps->udata.config.samplebits)
  296. {
  297. psNuI2s->config.samplerate = caps->udata.config.samplebits;
  298. bNeedReset = RT_TRUE;
  299. }
  300. break;
  301. case AUDIO_DSP_CHANNELS:
  302. if (psNuI2s->config.channels != caps->udata.config.channels)
  303. {
  304. pNuACodecOps->config.channels = caps->udata.config.channels;
  305. bNeedReset = RT_TRUE;
  306. }
  307. break;
  308. case AUDIO_DSP_SAMPLERATE:
  309. if (psNuI2s->config.samplerate != caps->udata.config.samplerate)
  310. {
  311. psNuI2s->config.samplerate = caps->udata.config.samplerate;
  312. bNeedReset = RT_TRUE;
  313. }
  314. break;
  315. default:
  316. result = -RT_ERROR;
  317. break;
  318. } // switch (caps->sub_type)
  319. if (bNeedReset)
  320. {
  321. return nu_i2s_start(audio, stream);
  322. }
  323. }
  324. break;
  325. default:
  326. result = -RT_ERROR;
  327. break;
  328. } // switch (caps->main_type)
  329. return result;
  330. }
  331. static rt_err_t nu_i2s_init(struct rt_audio_device *audio)
  332. {
  333. rt_err_t result = RT_EOK;
  334. nu_i2s_t psNuI2s;
  335. RT_ASSERT(audio != RT_NULL);
  336. psNuI2s = (nu_i2s_t)audio;
  337. /* Reset this module */
  338. SYS_ResetModule(psNuI2s->i2s_rst);
  339. return -(result);
  340. }
  341. static rt_err_t nu_i2s_start(struct rt_audio_device *audio, int stream)
  342. {
  343. nu_i2s_t psNuI2s;
  344. RT_ASSERT(audio != RT_NULL);
  345. psNuI2s = (nu_i2s_t)audio;
  346. /* Restart all: I2S and codec. */
  347. nu_i2s_stop(audio, stream);
  348. if (nu_i2s_dai_setup(psNuI2s, &psNuI2s->config) != RT_EOK)
  349. return -RT_ERROR;
  350. switch (stream)
  351. {
  352. case AUDIO_STREAM_REPLAY:
  353. {
  354. nu_i2s_pdma_sc_config(psNuI2s, NU_I2S_DAI_PLAYBACK);
  355. /* Start TX DMA */
  356. I2S_ENABLE_TXDMA(psNuI2s->i2s_base);
  357. /* Enable I2S Tx function */
  358. I2S_ENABLE_TX(psNuI2s->i2s_base);
  359. LOG_I("Start replay.");
  360. }
  361. break;
  362. case AUDIO_STREAM_RECORD:
  363. {
  364. nu_i2s_pdma_sc_config(psNuI2s, NU_I2S_DAI_CAPTURE);
  365. /* Start RX DMA */
  366. I2S_ENABLE_RXDMA(psNuI2s->i2s_base);
  367. /* Enable I2S Rx function */
  368. I2S_ENABLE_RX(psNuI2s->i2s_base);
  369. LOG_I("Start record.");
  370. }
  371. break;
  372. default:
  373. return -RT_ERROR;
  374. }
  375. return RT_EOK;
  376. }
  377. static rt_err_t nu_i2s_stop(struct rt_audio_device *audio, int stream)
  378. {
  379. nu_i2s_t psNuI2s;
  380. nu_i2s_dai_t psNuI2sDai = RT_NULL;
  381. RT_ASSERT(audio != RT_NULL);
  382. psNuI2s = (nu_i2s_t)audio;
  383. switch (stream)
  384. {
  385. case AUDIO_STREAM_REPLAY:
  386. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_PLAYBACK];
  387. // Disable TX
  388. I2S_DISABLE_TXDMA(psNuI2s->i2s_base);
  389. I2S_DISABLE_TX(psNuI2s->i2s_base);
  390. LOG_I("Stop replay.");
  391. break;
  392. case AUDIO_STREAM_RECORD:
  393. psNuI2sDai = &psNuI2s->i2s_dais[NU_I2S_DAI_CAPTURE];
  394. // Disable RX
  395. I2S_DISABLE_RXDMA(psNuI2s->i2s_base);
  396. I2S_DISABLE_RX(psNuI2s->i2s_base);
  397. LOG_I("Stop record.");
  398. break;
  399. default:
  400. return -RT_EINVAL;
  401. }
  402. /* Stop DMA transfer. */
  403. nu_pdma_channel_terminate(psNuI2sDai->pdma_chanid);
  404. /* Close I2S */
  405. if (!(psNuI2s->i2s_base->CTL0 & (I2S_CTL0_TXEN_Msk | I2S_CTL0_RXEN_Msk)))
  406. {
  407. I2S_DisableMCLK(psNuI2s->i2s_base);
  408. I2S_Close(psNuI2s->i2s_base);
  409. LOG_I("Close I2S.");
  410. }
  411. /* Silence */
  412. rt_memset((void *)psNuI2sDai->fifo, 0, NU_I2S_DMA_FIFO_SIZE);
  413. psNuI2sDai->fifo_block_idx = 0;
  414. return RT_EOK;
  415. }
  416. static void nu_i2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
  417. {
  418. nu_i2s_t psNuI2s;
  419. RT_ASSERT(audio != RT_NULL);
  420. RT_ASSERT(info != RT_NULL);
  421. psNuI2s = (nu_i2s_t)audio;
  422. info->buffer = (rt_uint8_t *)psNuI2s->i2s_dais[NU_I2S_DAI_PLAYBACK].fifo ;
  423. info->total_size = NU_I2S_DMA_FIFO_SIZE;
  424. info->block_size = NU_I2S_DMA_BUF_BLOCK_SIZE;
  425. info->block_count = NU_I2S_DMA_BUF_BLOCK_NUMBER;
  426. return;
  427. }
  428. static struct rt_audio_ops nu_i2s_audio_ops =
  429. {
  430. .getcaps = nu_i2s_getcaps,
  431. .configure = nu_i2s_configure,
  432. .init = nu_i2s_init,
  433. .start = nu_i2s_start,
  434. .stop = nu_i2s_stop,
  435. .transmit = RT_NULL,
  436. .buffer_info = nu_i2s_buffer_info
  437. };
  438. static rt_err_t nu_hw_i2s_pdma_allocate(nu_i2s_dai_t psNuI2sDai)
  439. {
  440. /* Allocate I2S nu_dma channel */
  441. if ((psNuI2sDai->pdma_chanid = nu_pdma_channel_allocate(psNuI2sDai->pdma_perp)) < 0)
  442. {
  443. goto nu_hw_i2s_pdma_allocate;
  444. }
  445. return RT_EOK;
  446. nu_hw_i2s_pdma_allocate:
  447. return -(RT_ERROR);
  448. }
  449. int rt_hw_i2s_init(void)
  450. {
  451. int i = 0;
  452. nu_i2s_dai_t psNuI2sDai;
  453. for (i = 0; i < NU_I2S_DAI_CNT; i++)
  454. {
  455. uint8_t *pu8ptr = rt_malloc(NU_I2S_DMA_FIFO_SIZE);
  456. psNuI2sDai = &g_nu_i2s_dev.i2s_dais[i];
  457. psNuI2sDai->fifo = pu8ptr;
  458. rt_memset(pu8ptr, 0, NU_I2S_DMA_FIFO_SIZE);
  459. RT_ASSERT(psNuI2sDai->fifo != RT_NULL);
  460. psNuI2sDai->pdma_chanid = -1;
  461. psNuI2sDai->fifo_block_idx = 0;
  462. RT_ASSERT(nu_hw_i2s_pdma_allocate(psNuI2sDai) == RT_EOK);
  463. RT_ASSERT(nu_pdma_sgtbls_allocate(&psNuI2sDai->pdma_descs[0], NU_I2S_DMA_BUF_BLOCK_NUMBER) == RT_EOK);
  464. }
  465. /* Register ops of audio device */
  466. g_nu_i2s_dev.audio.ops = &nu_i2s_audio_ops;
  467. /* Register device, RW: it is with replay and record functions. */
  468. rt_audio_register(&g_nu_i2s_dev.audio, g_nu_i2s_dev.name, RT_DEVICE_FLAG_RDWR, &g_nu_i2s_dev);
  469. return RT_EOK;
  470. }
  471. INIT_DEVICE_EXPORT(rt_hw_i2s_init);
  472. #endif //#if defined(BSP_USING_I2S)