drv_spii2s.c 18 KB

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  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-5-29 YHKuo First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #if defined(BSP_USING_SPII2S)
  14. #include <rtdevice.h>
  15. #include <drv_pdma.h>
  16. #include <drv_i2s.h>
  17. /* Private define ---------------------------------------------------------------*/
  18. #define DBG_ENABLE
  19. #define DBG_LEVEL DBG_LOG
  20. #define DBG_SECTION_NAME "spii2s"
  21. #define DBG_COLOR
  22. #include <rtdbg.h>
  23. enum
  24. {
  25. SPII2S_START = -1,
  26. #if defined(BSP_USING_SPII2S0)
  27. SPII2S0_IDX,
  28. #endif
  29. #if defined(BSP_USING_SPII2S1)
  30. SPII2S1_IDX,
  31. #endif
  32. #if defined(BSP_USING_SPII2S2)
  33. SPII2S2_IDX,
  34. #endif
  35. #if defined(BSP_USING_SPII2S3)
  36. SPII2S3_IDX,
  37. #endif
  38. SPII2S_CNT
  39. };
  40. /* Private functions ------------------------------------------------------------*/
  41. static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps);
  42. static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps);
  43. static rt_err_t nu_spii2s_init(struct rt_audio_device *audio);
  44. static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream);
  45. static rt_err_t nu_spii2s_stop(struct rt_audio_device *audio, int stream);
  46. static void nu_spii2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info);
  47. /* Public functions -------------------------------------------------------------*/
  48. rt_err_t nu_spii2s_acodec_register(struct rt_audio_device *audio, nu_acodec_ops_t);
  49. /* Private variables ------------------------------------------------------------*/
  50. static struct nu_i2s g_nu_spii2s_arr [] =
  51. {
  52. #if defined(BSP_USING_SPII2S0)
  53. {
  54. .name = "spii2s0",
  55. .i2s_base = (I2S_T *)SPI0, //Avoid warning
  56. .i2s_rst = SPI0_RST,
  57. .i2s_dais = {
  58. [NU_I2S_DAI_PLAYBACK] = {
  59. .pdma_perp = PDMA_SPI0_TX,
  60. },
  61. [NU_I2S_DAI_CAPTURE] = {
  62. .pdma_perp = PDMA_SPI0_RX,
  63. }
  64. }
  65. },
  66. #endif
  67. #if defined(BSP_USING_SPII2S1)
  68. {
  69. .name = "spii2s1",
  70. .i2s_base = (I2S_T *)SPI1, //Avoid warning
  71. .i2s_rst = SPI1_RST,
  72. .i2s_dais = {
  73. [NU_I2S_DAI_PLAYBACK] = {
  74. .pdma_perp = PDMA_SPI1_TX,
  75. },
  76. [NU_I2S_DAI_CAPTURE] = {
  77. .pdma_perp = PDMA_SPI1_RX,
  78. }
  79. }
  80. },
  81. #endif
  82. #if defined(BSP_USING_SPII2S2)
  83. {
  84. .name = "spii2s2",
  85. .i2s_base = (I2S_T *)SPI2, //Avoid warning
  86. .i2s_rst = SPI2_RST,
  87. .i2s_dais = {
  88. [NU_I2S_DAI_PLAYBACK] = {
  89. .pdma_perp = PDMA_SPI2_TX,
  90. },
  91. [NU_I2S_DAI_CAPTURE] = {
  92. .pdma_perp = PDMA_SPI2_RX,
  93. }
  94. }
  95. },
  96. #endif
  97. #if defined(BSP_USING_SPII2S3)
  98. {
  99. .name = "spii2s3",
  100. .i2s_base = (I2S_T *)SPI3, //Avoid warning
  101. .i2s_rst = SPI3_RST,
  102. .i2s_dais = {
  103. [NU_I2S_DAI_PLAYBACK] = {
  104. .pdma_perp = PDMA_SPI3_TX,
  105. },
  106. [NU_I2S_DAI_CAPTURE] = {
  107. .pdma_perp = PDMA_SPI3_RX,
  108. }
  109. }
  110. },
  111. #endif
  112. };
  113. static void nu_pdma_spii2s_rx_cb(void *pvUserData, uint32_t u32EventFilter)
  114. {
  115. nu_i2s_t psNuSPII2s = (nu_i2s_t)pvUserData;
  116. nu_i2s_dai_t psNuSPII2sDai;
  117. RT_ASSERT(psNuSPII2s != RT_NULL);
  118. psNuSPII2sDai = &psNuSPII2s->i2s_dais[NU_I2S_DAI_CAPTURE];
  119. if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
  120. {
  121. // Report a buffer ready.
  122. rt_uint8_t *pbuf_old = &psNuSPII2sDai->fifo[psNuSPII2sDai->fifo_block_idx * NU_I2S_DMA_BUF_BLOCK_SIZE] ;
  123. psNuSPII2sDai->fifo_block_idx = (psNuSPII2sDai->fifo_block_idx + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER;
  124. /* Report upper layer. */
  125. rt_audio_rx_done(&psNuSPII2s->audio, pbuf_old, NU_I2S_DMA_BUF_BLOCK_SIZE);
  126. }
  127. }
  128. static void nu_pdma_spii2s_tx_cb(void *pvUserData, uint32_t u32EventFilter)
  129. {
  130. nu_i2s_t psNuSPII2s = (nu_i2s_t)pvUserData;
  131. nu_i2s_dai_t psNuSPII2sDai;
  132. RT_ASSERT(psNuSPII2s != RT_NULL);
  133. psNuSPII2sDai = &psNuSPII2s->i2s_dais[NU_I2S_DAI_PLAYBACK];
  134. if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
  135. {
  136. rt_audio_tx_complete(&psNuSPII2s->audio);
  137. psNuSPII2sDai->fifo_block_idx = (psNuSPII2sDai->fifo_block_idx + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER;
  138. }
  139. }
  140. static rt_err_t nu_spii2s_pdma_sc_config(nu_i2s_t psNuSPII2s, E_NU_I2S_DAI dai)
  141. {
  142. rt_err_t result = RT_EOK;
  143. SPI_T *spii2s_base;
  144. nu_i2s_dai_t psNuSPII2sDai;
  145. int i;
  146. uint32_t u32Src, u32Dst;
  147. nu_pdma_cb_handler_t pfm_pdma_cb;
  148. RT_ASSERT(psNuSPII2s != RT_NULL);
  149. /* Get base address of spii2s register */
  150. spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
  151. psNuSPII2sDai = &psNuSPII2s->i2s_dais[dai];
  152. switch ((int)dai)
  153. {
  154. case NU_I2S_DAI_PLAYBACK:
  155. pfm_pdma_cb = nu_pdma_spii2s_tx_cb;
  156. u32Src = (uint32_t)&psNuSPII2sDai->fifo[0];
  157. u32Dst = (uint32_t)&spii2s_base->TX;
  158. break;
  159. case NU_I2S_DAI_CAPTURE:
  160. pfm_pdma_cb = nu_pdma_spii2s_rx_cb;
  161. u32Src = (uint32_t)&spii2s_base->RX;
  162. u32Dst = (uint32_t)&psNuSPII2sDai->fifo[0];
  163. break;
  164. default:
  165. return -RT_EINVAL;
  166. }
  167. result = nu_pdma_callback_register(psNuSPII2sDai->pdma_chanid,
  168. pfm_pdma_cb,
  169. (void *)psNuSPII2s,
  170. NU_PDMA_EVENT_TRANSFER_DONE);
  171. RT_ASSERT(result == RT_EOK);
  172. for (i = 0; i < NU_I2S_DMA_BUF_BLOCK_NUMBER; i++)
  173. {
  174. /* Setup dma descriptor entry */
  175. result = nu_pdma_desc_setup(psNuSPII2sDai->pdma_chanid, // Channel ID
  176. psNuSPII2sDai->pdma_descs[i], // this descriptor
  177. 32, // 32-bits
  178. (dai == NU_I2S_DAI_PLAYBACK) ? u32Src + (i * NU_I2S_DMA_BUF_BLOCK_SIZE) : u32Src, //Memory or RXFIFO
  179. (dai == NU_I2S_DAI_PLAYBACK) ? u32Dst : u32Dst + (i * NU_I2S_DMA_BUF_BLOCK_SIZE), //TXFIFO or Memory
  180. (int32_t)NU_I2S_DMA_BUF_BLOCK_SIZE / 4, // Transfer count
  181. psNuSPII2sDai->pdma_descs[(i + 1) % NU_I2S_DMA_BUF_BLOCK_NUMBER]); // Next descriptor
  182. RT_ASSERT(result == RT_EOK);
  183. }
  184. /* Assign head descriptor */
  185. result = nu_pdma_sg_transfer(psNuSPII2sDai->pdma_chanid, psNuSPII2sDai->pdma_descs[0], 0);
  186. RT_ASSERT(result == RT_EOK);
  187. return result;
  188. }
  189. static rt_bool_t nu_spii2s_capacity_check(struct rt_audio_configure *pconfig)
  190. {
  191. switch (pconfig->samplebits)
  192. {
  193. case 8:
  194. case 16:
  195. /* case 24: PDMA constrain */
  196. case 32:
  197. break;
  198. default:
  199. goto exit_nu_spii2s_capacity_check;
  200. }
  201. switch (pconfig->channels)
  202. {
  203. case 1:
  204. case 2:
  205. break;
  206. default:
  207. goto exit_nu_spii2s_capacity_check;
  208. }
  209. return RT_TRUE;
  210. exit_nu_spii2s_capacity_check:
  211. return RT_FALSE;
  212. }
  213. static rt_err_t nu_spii2s_dai_setup(nu_i2s_t psNuSPII2s, struct rt_audio_configure *pconfig)
  214. {
  215. rt_err_t result = RT_EOK;
  216. nu_acodec_ops_t pNuACodecOps;
  217. SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
  218. RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
  219. pNuACodecOps = psNuSPII2s->AcodecOps;
  220. /* Open SPII2S */
  221. if (nu_spii2s_capacity_check(pconfig) == RT_TRUE)
  222. {
  223. /* Reset audio codec */
  224. if (pNuACodecOps->nu_acodec_reset)
  225. result = pNuACodecOps->nu_acodec_reset();
  226. if (result != RT_EOK)
  227. goto exit_nu_spii2s_dai_setup;
  228. /* Setup audio codec */
  229. if (pNuACodecOps->nu_acodec_init)
  230. result = pNuACodecOps->nu_acodec_init();
  231. if (!pNuACodecOps->nu_acodec_init || result != RT_EOK)
  232. goto exit_nu_spii2s_dai_setup;
  233. /* Setup acodec samplerate/samplebit/channel */
  234. if (pNuACodecOps->nu_acodec_dsp_control)
  235. result = pNuACodecOps->nu_acodec_dsp_control(pconfig);
  236. if (!pNuACodecOps->nu_acodec_dsp_control || result != RT_EOK)
  237. goto exit_nu_spii2s_dai_setup;
  238. SPII2S_Open(spii2s_base,
  239. (psNuSPII2s->AcodecOps->role == NU_ACODEC_ROLE_MASTER) ? SPII2S_MODE_SLAVE : SPII2S_MODE_MASTER,
  240. pconfig->samplerate,
  241. (((pconfig->samplebits / 8) - 1) << SPI_I2SCTL_WDWIDTH_Pos),
  242. (pconfig->channels == 1) ? SPII2S_MONO : SPII2S_STEREO,
  243. SPII2S_FORMAT_I2S);
  244. LOG_I("Open SPII2S.");
  245. /* Set MCLK and enable MCLK */
  246. /* The target MCLK is related to audio codec setting. */
  247. SPII2S_EnableMCLK(spii2s_base, 12000000);
  248. /* Set un-mute */
  249. if (pNuACodecOps->nu_acodec_mixer_control)
  250. pNuACodecOps->nu_acodec_mixer_control(AUDIO_MIXER_MUTE, RT_FALSE);
  251. }
  252. else
  253. result = -RT_EINVAL;
  254. exit_nu_spii2s_dai_setup:
  255. return result;
  256. }
  257. static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  258. {
  259. rt_err_t result = RT_EOK;
  260. nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
  261. nu_acodec_ops_t pNuACodecOps;
  262. RT_ASSERT(audio != RT_NULL);
  263. RT_ASSERT(caps != RT_NULL);
  264. RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
  265. pNuACodecOps = psNuSPII2s->AcodecOps;
  266. switch (caps->main_type)
  267. {
  268. case AUDIO_TYPE_QUERY:
  269. switch (caps->sub_type)
  270. {
  271. case AUDIO_TYPE_QUERY:
  272. caps->udata.mask = AUDIO_TYPE_INPUT | AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER;
  273. break;
  274. default:
  275. result = -RT_ERROR;
  276. break;
  277. } // switch (caps->sub_type)
  278. break;
  279. case AUDIO_TYPE_MIXER:
  280. if (pNuACodecOps->nu_acodec_mixer_query)
  281. {
  282. switch (caps->sub_type)
  283. {
  284. case AUDIO_MIXER_QUERY:
  285. return pNuACodecOps->nu_acodec_mixer_query(AUDIO_MIXER_QUERY, &caps->udata.mask);
  286. default:
  287. return pNuACodecOps->nu_acodec_mixer_query(caps->sub_type, (rt_uint32_t *)&caps->udata.value);
  288. } // switch (caps->sub_type)
  289. } // if (pNuACodecOps->nu_acodec_mixer_query)
  290. result = -RT_ERROR;
  291. break;
  292. case AUDIO_TYPE_INPUT:
  293. case AUDIO_TYPE_OUTPUT:
  294. switch (caps->sub_type)
  295. {
  296. case AUDIO_DSP_PARAM:
  297. caps->udata.config.channels = psNuSPII2s->config.channels;
  298. caps->udata.config.samplebits = psNuSPII2s->config.samplebits;
  299. caps->udata.config.samplerate = psNuSPII2s->config.samplerate;
  300. break;
  301. case AUDIO_DSP_SAMPLERATE:
  302. caps->udata.config.samplerate = psNuSPII2s->config.samplerate;
  303. break;
  304. case AUDIO_DSP_CHANNELS:
  305. caps->udata.config.channels = psNuSPII2s->config.channels;
  306. break;
  307. case AUDIO_DSP_SAMPLEBITS:
  308. caps->udata.config.samplebits = psNuSPII2s->config.samplebits;
  309. break;
  310. default:
  311. result = -RT_ERROR;
  312. break;
  313. } // switch (caps->sub_type)
  314. break;
  315. default:
  316. result = -RT_ERROR;
  317. break;
  318. } // switch (caps->main_type)
  319. return result;
  320. }
  321. static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  322. {
  323. rt_err_t result = RT_EOK;
  324. nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
  325. nu_acodec_ops_t pNuACodecOps;
  326. int stream = -1;
  327. RT_ASSERT(audio != RT_NULL);
  328. RT_ASSERT(caps != RT_NULL);
  329. RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
  330. pNuACodecOps = psNuSPII2s->AcodecOps;
  331. switch (caps->main_type)
  332. {
  333. case AUDIO_TYPE_MIXER:
  334. if (psNuSPII2s->AcodecOps->nu_acodec_mixer_control)
  335. psNuSPII2s->AcodecOps->nu_acodec_mixer_control(caps->sub_type, caps->udata.value);
  336. break;
  337. case AUDIO_TYPE_INPUT:
  338. stream = AUDIO_STREAM_RECORD;
  339. case AUDIO_TYPE_OUTPUT:
  340. {
  341. rt_bool_t bNeedReset = RT_FALSE;
  342. if (stream < 0)
  343. stream = AUDIO_STREAM_REPLAY;
  344. switch (caps->sub_type)
  345. {
  346. case AUDIO_DSP_PARAM:
  347. if (rt_memcmp(&psNuSPII2s->config, &caps->udata.config, sizeof(struct rt_audio_configure)) != 0)
  348. {
  349. rt_memcpy(&psNuSPII2s->config, &caps->udata.config, sizeof(struct rt_audio_configure));
  350. bNeedReset = RT_TRUE;
  351. }
  352. break;
  353. case AUDIO_DSP_SAMPLEBITS:
  354. if (psNuSPII2s->config.samplerate != caps->udata.config.samplebits)
  355. {
  356. psNuSPII2s->config.samplerate = caps->udata.config.samplebits;
  357. bNeedReset = RT_TRUE;
  358. }
  359. break;
  360. case AUDIO_DSP_CHANNELS:
  361. if (psNuSPII2s->config.channels != caps->udata.config.channels)
  362. {
  363. pNuACodecOps->config.channels = caps->udata.config.channels;
  364. bNeedReset = RT_TRUE;
  365. }
  366. break;
  367. case AUDIO_DSP_SAMPLERATE:
  368. if (psNuSPII2s->config.samplerate != caps->udata.config.samplerate)
  369. {
  370. psNuSPII2s->config.samplerate = caps->udata.config.samplerate;
  371. bNeedReset = RT_TRUE;
  372. }
  373. break;
  374. default:
  375. result = -RT_ERROR;
  376. break;
  377. } // switch (caps->sub_type)
  378. if (bNeedReset)
  379. {
  380. return nu_spii2s_start(audio, stream);
  381. }
  382. }
  383. break;
  384. default:
  385. result = -RT_ERROR;
  386. break;
  387. } // switch (caps->main_type)
  388. return result;
  389. }
  390. static rt_err_t nu_spii2s_init(struct rt_audio_device *audio)
  391. {
  392. rt_err_t result = RT_EOK;
  393. nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
  394. RT_ASSERT(audio != RT_NULL);
  395. /* Reset this module */
  396. SYS_ResetModule(psNuSPII2s->i2s_rst);
  397. return -(result);
  398. }
  399. static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream)
  400. {
  401. nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
  402. SPI_T *spii2s_base;
  403. RT_ASSERT(audio != RT_NULL);
  404. spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
  405. /* Restart all: SPII2S and codec. */
  406. nu_spii2s_stop(audio, stream);
  407. if (nu_spii2s_dai_setup(psNuSPII2s, &psNuSPII2s->config) != RT_EOK)
  408. return -RT_ERROR;
  409. switch (stream)
  410. {
  411. case AUDIO_STREAM_REPLAY:
  412. {
  413. nu_spii2s_pdma_sc_config(psNuSPII2s, NU_I2S_DAI_PLAYBACK);
  414. /* Start TX DMA */
  415. SPII2S_ENABLE_TXDMA(spii2s_base);
  416. /* Enable I2S Tx function */
  417. SPII2S_ENABLE_TX(spii2s_base);
  418. LOG_I("Start replay.");
  419. }
  420. break;
  421. case AUDIO_STREAM_RECORD:
  422. {
  423. nu_spii2s_pdma_sc_config(psNuSPII2s, NU_I2S_DAI_CAPTURE);
  424. /* Start RX DMA */
  425. SPII2S_ENABLE_RXDMA(spii2s_base);
  426. /* Enable I2S Rx function */
  427. SPII2S_ENABLE_RX(spii2s_base);
  428. LOG_I("Start record.");
  429. }
  430. break;
  431. default:
  432. return -RT_ERROR;
  433. }
  434. return RT_EOK;
  435. }
  436. static rt_err_t nu_spii2s_stop(struct rt_audio_device *audio, int stream)
  437. {
  438. nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
  439. nu_i2s_dai_t psNuSPII2sDai = RT_NULL;
  440. SPI_T *spii2s_base;
  441. RT_ASSERT(audio != RT_NULL);
  442. spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
  443. switch (stream)
  444. {
  445. case AUDIO_STREAM_REPLAY:
  446. psNuSPII2sDai = &psNuSPII2s->i2s_dais[NU_I2S_DAI_PLAYBACK];
  447. // Disable TX
  448. SPII2S_DISABLE_TXDMA(spii2s_base);
  449. SPII2S_DISABLE_TX(spii2s_base);
  450. LOG_I("Stop replay.");
  451. break;
  452. case AUDIO_STREAM_RECORD:
  453. psNuSPII2sDai = &psNuSPII2s->i2s_dais[NU_I2S_DAI_CAPTURE];
  454. // Disable RX
  455. SPII2S_DISABLE_RXDMA(spii2s_base);
  456. SPII2S_DISABLE_RX(spii2s_base);
  457. LOG_I("Stop record.");
  458. break;
  459. default:
  460. return -RT_EINVAL;
  461. }
  462. /* Stop DMA transfer. */
  463. nu_pdma_channel_terminate(psNuSPII2sDai->pdma_chanid);
  464. /* Close SPII2S */
  465. if (!(spii2s_base->I2SCTL & (SPI_I2SCTL_TXEN_Msk | SPI_I2SCTL_RXEN_Msk)))
  466. {
  467. SPII2S_DisableMCLK(spii2s_base);
  468. SPII2S_Close(spii2s_base);
  469. LOG_I("Close SPII2S.");
  470. }
  471. /* Silence */
  472. rt_memset((void *)psNuSPII2sDai->fifo, 0, NU_I2S_DMA_FIFO_SIZE);
  473. psNuSPII2sDai->fifo_block_idx = 0;
  474. return RT_EOK;
  475. }
  476. static void nu_spii2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
  477. {
  478. nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
  479. RT_ASSERT(audio != RT_NULL);
  480. RT_ASSERT(info != RT_NULL);
  481. info->buffer = (rt_uint8_t *)psNuSPII2s->i2s_dais[NU_I2S_DAI_PLAYBACK].fifo ;
  482. info->total_size = NU_I2S_DMA_FIFO_SIZE;
  483. info->block_size = NU_I2S_DMA_BUF_BLOCK_SIZE;
  484. info->block_count = NU_I2S_DMA_BUF_BLOCK_NUMBER;
  485. return;
  486. }
  487. static struct rt_audio_ops nu_spii2s_audio_ops =
  488. {
  489. .getcaps = nu_spii2s_getcaps,
  490. .configure = nu_spii2s_configure,
  491. .init = nu_spii2s_init,
  492. .start = nu_spii2s_start,
  493. .stop = nu_spii2s_stop,
  494. .transmit = RT_NULL,
  495. .buffer_info = nu_spii2s_buffer_info
  496. };
  497. static rt_err_t nu_hw_spii2s_pdma_allocate(nu_i2s_dai_t psNuSPII2sDai)
  498. {
  499. /* Allocate I2S nu_dma channel */
  500. if ((psNuSPII2sDai->pdma_chanid = nu_pdma_channel_allocate(psNuSPII2sDai->pdma_perp)) < 0)
  501. {
  502. goto nu_hw_spii2s_pdma_allocate;
  503. }
  504. return RT_EOK;
  505. nu_hw_spii2s_pdma_allocate:
  506. return -(RT_ERROR);
  507. }
  508. int rt_hw_spii2s_init(void)
  509. {
  510. int j = 0;
  511. nu_i2s_dai_t psNuSPII2sDai;
  512. for (j = (SPII2S_START + 1); j < SPII2S_CNT; j++)
  513. {
  514. int i = 0;
  515. for (i = 0; i < NU_I2S_DAI_CNT; i++)
  516. {
  517. uint8_t *pu8ptr = rt_malloc(NU_I2S_DMA_FIFO_SIZE);
  518. psNuSPII2sDai = &g_nu_spii2s_arr[j].i2s_dais[i];
  519. psNuSPII2sDai->fifo = pu8ptr;
  520. rt_memset(pu8ptr, 0, NU_I2S_DMA_FIFO_SIZE);
  521. RT_ASSERT(psNuSPII2sDai->fifo != RT_NULL);
  522. psNuSPII2sDai->pdma_chanid = -1;
  523. psNuSPII2sDai->fifo_block_idx = 0;
  524. RT_ASSERT(nu_hw_spii2s_pdma_allocate(psNuSPII2sDai) == RT_EOK);
  525. RT_ASSERT(nu_pdma_sgtbls_allocate(&psNuSPII2sDai->pdma_descs[0], NU_I2S_DMA_BUF_BLOCK_NUMBER) == RT_EOK);
  526. }
  527. /* Register ops of audio device */
  528. g_nu_spii2s_arr[j].audio.ops = &nu_spii2s_audio_ops;
  529. /* Register device, RW: it is with replay and record functions. */
  530. rt_audio_register(&g_nu_spii2s_arr[j].audio, g_nu_spii2s_arr[j].name, RT_DEVICE_FLAG_RDWR, &g_nu_spii2s_arr[j]);
  531. }
  532. return RT_EOK;
  533. }
  534. INIT_DEVICE_EXPORT(rt_hw_spii2s_init);
  535. #endif //#if defined(BSP_USING_SPII2S)