nu_rtc.h 33 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508
  1. /**************************************************************************//**
  2. * @file RTC.h
  3. * @brief N9H30 RTC driver header file
  4. *
  5. * @note
  6. * SPDX-License-Identifier: Apache-2.0
  7. * Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
  8. *****************************************************************************/
  9. #ifndef __NU_RTC_H__
  10. #define __NU_RTC_H__
  11. /*---------------------------------------------------------------------------------------------------------*/
  12. /* Includes of system headers */
  13. /*---------------------------------------------------------------------------------------------------------*/
  14. #include "N9H30.h"
  15. #include "nu_sys.h"
  16. #ifdef __cplusplus
  17. extern "C"
  18. {
  19. #endif
  20. /** @addtogroup N9H30_Device_Driver N9H30 Device Driver
  21. @{
  22. */
  23. /** @addtogroup N9H30_RTC_Driver RTC Driver
  24. @{
  25. */
  26. /** @addtogroup N9H30_RTC_EXPORTED_CONSTANTS RTC Exported Constants
  27. @{
  28. */
  29. /*---------------------------------------------------------------------------------------------------------*/
  30. /* Define Error Code */
  31. /*---------------------------------------------------------------------------------------------------------*/
  32. #define E_RTC_SUCCESS 0 /*!< success */
  33. #define E_RTC_ERR_CALENDAR_VALUE 1 /*!< Wrong Calendar Value */
  34. #define E_RTC_ERR_TIMESACLE_VALUE 2 /*!< Wrong Time Scale Value */
  35. #define E_RTC_ERR_TIME_VALUE 3 /*!< Wrong Time Value */
  36. #define E_RTC_ERR_DWR_VALUE 4 /*!< Wrong Day Value */
  37. #define E_RTC_ERR_FCR_VALUE 5 /*!< Wrong Compenation value */
  38. #define E_RTC_ERR_EIO 6 /*!< Initial RTC Failed */
  39. #define E_RTC_ERR_ENOTTY 7 /*!< Command not support, or parameter incorrect */
  40. #define E_RTC_ERR_ENODEV 8 /*!< Interface number incorrect */
  41. #define RTC_FCR_REFERENCE 32761 /*!< RTC Reference for frequency compensation */
  42. #define RTC_INIT_KEY 0xa5eb1357 /*!< RTC Access Key \hideinitializer */
  43. #define RTC_WRITE_KEY 0xa965 /*!< RTC Access Key \hideinitializer */
  44. #define RTC_WAIT_COUNT 0xFFFFFFFF /*!< Initial Time Out Value \hideinitializer */
  45. #define RTC_YEAR2000 2000 /*!< RTC Reference \hideinitializer */
  46. #define RTC_LEAP_YEAR 1 /*!< RTC leap year \hideinitializer */
  47. #define RTC_CLOCK_12 0 /*!< RTC 12 Hour */
  48. #define RTC_CLOCK_24 1 /*!< RTC 24 Hour */
  49. #define RTC_AM 1 /*!< RTC AM \hideinitializer */
  50. #define RTC_PM 2 /*!< RTC PM \hideinitializer */
  51. #define RTC_INIT_ACTIVE_Pos (0) /*!< RTC INIT: ACTIVE Position */
  52. #define RTC_INIT_ACTIVE_Msk (0x1ul << RTC_INIT_ACTIVE_Pos) /*!< RTC INIT: ACTIVE Mask */
  53. #define RTC_INIT_INIT_Pos (0) /*!< RTC INIT: INIT Position */
  54. #define RTC_INIT_INIT_Msk (0xfffffffful << RTC_INIT_INIT_Pos) /*!< RTC INIT: INIT Mask */
  55. #define RTC_RWEN_RWENPASSWD_Pos (0) /*!< RTC RWEN: RWEN Position */
  56. #define RTC_RWEN_RWENPASSWD_Msk (0xfffful << RTC_RWEN_RWEN_Pos) /*!< RTC RWEN: RWEN Mask */
  57. #define RTC_RWEN_RWENF_Pos (16) /*!< RTC RWEN: RWENF Position */
  58. #define RTC_RWEN_RWENF_Msk (0x1ul << RTC_RWEN_RWENF_Pos) /*!< RTC RWEN: RWENF Mask */
  59. #define RTC_FREQADJ_FRACTION_Pos (0) /*!< RTC FREQADJ: FRACTION Position */
  60. #define RTC_FREQADJ_FRACTION_Msk (0x3ful << RTC_FREQADJ_FRACTION_Pos) /*!< RTC FREQADJ: FRACTION Mask */
  61. #define RTC_FREQADJ_INTEGER_Pos (8) /*!< RTC FREQADJ: INTEGER Position */
  62. #define RTC_FREQADJ_INTEGER_Msk (0xful << RTC_FREQADJ_INTEGER_Pos) /*!< RTC FREQADJ: INTEGER Mask */
  63. #define RTC_TIME_SEC_Pos (0) /*!< RTC TIME: SEC Position */
  64. #define RTC_TIME_SEC_Msk (0xful << RTC_TIME_SEC_Pos) /*!< RTC TIME: SEC Mask */
  65. #define RTC_TIME_TENSEC_Pos (4) /*!< RTC TIME: TENSEC Position */
  66. #define RTC_TIME_TENSEC_Msk (0x7ul << RTC_TIME_TENSEC_Pos) /*!< RTC TIME: TENSEC Mask */
  67. #define RTC_TIME_MIN_Pos (8) /*!< RTC TIME: MIN Position */
  68. #define RTC_TIME_MIN_Msk (0xful << RTC_TIME_MIN_Pos) /*!< RTC TIME: MIN Mask */
  69. #define RTC_TIME_TENMIN_Pos (12) /*!< RTC TIME: TENMIN Position */
  70. #define RTC_TIME_TENMIN_Msk (0x7ul << RTC_TIME_TENMIN_Pos) /*!< RTC TIME: TENMIN Mask */
  71. #define RTC_TIME_HR_Pos (16) /*!< RTC TIME: HR Position */
  72. #define RTC_TIME_HR_Msk (0xful << RTC_TIME_HR_Pos) /*!< RTC TIME: HR Mask */
  73. #define RTC_TIME_TENHR_Pos (20) /*!< RTC TIME: TENHR Position */
  74. #define RTC_TIME_TENHR_Msk (0x3ul << RTC_TIME_TENHR_Pos) /*!< RTC TIME: TENHR Mask */
  75. #define RTC_CAL_DAY_Pos (0) /*!< RTC CAL: DAY Position */
  76. #define RTC_CAL_DAY_Msk (0xful << RTC_CAL_DAY_Pos) /*!< RTC CAL: DAY Mask */
  77. #define RTC_CAL_TENDAY_Pos (4) /*!< RTC CAL: TENDAY Position */
  78. #define RTC_CAL_TENDAY_Msk (0x3ul << RTC_CAL_TENDAY_Pos) /*!< RTC CAL: TENDAY Mask */
  79. #define RTC_CAL_MON_Pos (8) /*!< RTC CAL: MON Position */
  80. #define RTC_CAL_MON_Msk (0xful << RTC_CAL_MON_Pos) /*!< RTC CAL: MON Mask */
  81. #define RTC_CAL_TENMON_Pos (12) /*!< RTC CAL: TENMON Position */
  82. #define RTC_CAL_TENMON_Msk (0x1ul << RTC_CAL_TENMON_Pos) /*!< RTC CAL: TENMON Mask */
  83. #define RTC_CAL_YEAR_Pos (16) /*!< RTC CAL: YEAR Position */
  84. #define RTC_CAL_YEAR_Msk (0xful << RTC_CAL_YEAR_Pos) /*!< RTC CAL: YEAR Mask */
  85. #define RTC_CAL_TENYEAR_Pos (20) /*!< RTC CAL: TENYEAR Position */
  86. #define RTC_CAL_TENYEAR_Msk (0xful << RTC_CAL_TENYEAR_Pos) /*!< RTC CAL: TENYEAR Mask */
  87. #define RTC_TIMEFMT_24HEN_Pos (0) /*!< RTC CLKFMT: 24HEN Position */
  88. #define RTC_TIMEFMT_24HEN_Msk (0x1ul << RTC_CLKFMT_24HEN_Pos) /*!< RTC CLKFMT: 24HEN Mask */
  89. #define RTC_WEEKDAY_WEEKDAY_Pos (0) /*!< RTC WEEKDAY: WEEKDAY Position */
  90. #define RTC_WEEKDAY_WEEKDAY_Msk (0x7ul << RTC_WEEKDAY_WEEKDAY_Pos) /*!< RTC WEEKDAY: WEEKDAY Mask */
  91. #define RTC_TALM_SEC_Pos (0) /*!< RTC TALM: SEC Position */
  92. #define RTC_TALM_SEC_Msk (0xful << RTC_TALM_SEC_Pos) /*!< RTC TALM: SEC Mask */
  93. #define RTC_TALM_TENSEC_Pos (4) /*!< RTC TALM: TENSEC Position */
  94. #define RTC_TALM_TENSEC_Msk (0x7ul << RTC_TALM_TENSEC_Pos) /*!< RTC TALM: TENSEC Mask */
  95. #define RTC_TALM_MIN_Pos (8) /*!< RTC TALM: MIN Position */
  96. #define RTC_TALM_MIN_Msk (0xful << RTC_TALM_MIN_Pos) /*!< RTC TALM: MIN Mask */
  97. #define RTC_TALM_TENMIN_Pos (12) /*!< RTC TALM: TENMIN Position */
  98. #define RTC_TALM_TENMIN_Msk (0x7ul << RTC_TALM_TENMIN_Pos) /*!< RTC TALM: TENMIN Mask */
  99. #define RTC_TALM_HR_Pos (16) /*!< RTC TALM: HR Position */
  100. #define RTC_TALM_HR_Msk (0xful << RTC_TALM_HR_Pos) /*!< RTC TALM: HR Mask */
  101. #define RTC_TALM_TENHR_Pos (20) /*!< RTC TALM: TENHR Position */
  102. #define RTC_TALM_TENHR_Msk (0x3ul << RTC_TALM_TENHR_Pos) /*!< RTC TALM: TENHR Mask */
  103. #define RTC_CALM_DAY_Pos (0) /*!< RTC CALM: DAY Position */
  104. #define RTC_CALM_DAY_Msk (0xful << RTC_CALM_DAY_Pos) /*!< RTC CALM: DAY Mask */
  105. #define RTC_CALM_TENDAY_Pos (4) /*!< RTC CALM: TENDAY Position */
  106. #define RTC_CALM_TENDAY_Msk (0x3ul << RTC_CALM_TENDAY_Pos) /*!< RTC CALM: TENDAY Mask */
  107. #define RTC_CALM_MON_Pos (8) /*!< RTC CALM: MON Position */
  108. #define RTC_CALM_MON_Msk (0xful << RTC_CALM_MON_Pos) /*!< RTC CALM: MON Mask */
  109. #define RTC_CALM_TENMON_Pos (12) /*!< RTC CALM: TENMON Position */
  110. #define RTC_CALM_TENMON_Msk (0x1ul << RTC_CALM_TENMON_Pos) /*!< RTC CALM: TENMON Mask */
  111. #define RTC_CALM_YEAR_Pos (16) /*!< RTC CALM: YEAR Position */
  112. #define RTC_CALM_YEAR_Msk (0xful << RTC_CALM_YEAR_Pos) /*!< RTC CALM: YEAR Mask */
  113. #define RTC_CALM_TENYEAR_Pos (20) /*!< RTC CALM: TENYEAR Position */
  114. #define RTC_CALM_TENYEAR_Msk (0xful << RTC_CALM_TENYEAR_Pos) /*!< RTC CALM: TENYEAR Mask */
  115. #define RTC_CALM_WEEKDAY_Pos (24) /*!< RTC CALM: WEEKDAY Position */
  116. #define RTC_CALM_WEEKDAY_Msk (0x7ul << RTC_CALM_WEEKDAY_Pos) /*!< RTC CALM: WEEKDAY Mask */
  117. #define RTC_CALM_DAYALM_MSK_Pos (28) /*!< RTC CALM: DAYALM_MSK Position */
  118. #define RTC_CALM_DAYALM_MSK_Msk (0x1ul << RTC_CALM_DAYALM_MSK_Pos) /*!< RTC CALM: DAYALM_MSK Mask */
  119. #define RTC_CALM_MONALM_MSK_Pos (29) /*!< RTC CALM: MONALM_MSK Position */
  120. #define RTC_CALM_MONALM_MSK_Msk (0x1ul << RTC_CALM_MONALM_MSK_Pos) /*!< RTC CALM: MONALM_MSK Mask */
  121. #define RTC_CALM_YRALM_MSK_Pos (30) /*!< RTC CALM: YRALM_MSK Position */
  122. #define RTC_CALM_YRALM_MSK_Msk (0x1ul << RTC_CALM_YRALM_MSK_Pos) /*!< RTC CALM: YRALM_MSK Mask */
  123. #define RTC_CALM_WKDALM_MSK_Pos (31) /*!< RTC CALM: WKDALM_MSK Position */
  124. #define RTC_CALM_WKDALM_MSK_Msk (0x1ul << RTC_CALM_WKDALM_MSK_Pos) /*!< RTC CALM: WKDALM_MSK Mask */
  125. #define RTC_LEAPYEAR_LEAPYEAR_Pos (0) /*!< RTC LEAPYEAR: LEAPYEAR Position */
  126. #define RTC_LEAPYEAR_LEAPYEAR_Msk (0x1ul << RTC_LEAPYEAR_LEAPYEAR_Pos) /*!< RTC LEAPYEAR: LEAPYEAR Mask */
  127. #define RTC_INTEN_ALMIEN_Pos (0) /*!< RTC INTEN: ALMIEN Position */
  128. #define RTC_INTEN_ALMIEN_Msk (0x1ul << RTC_INTEN_ALMIEN_Pos) /*!< RTC INTEN: ALMIEN Mask */
  129. #define RTC_INTEN_TICKIEN_Pos (1) /*!< RTC INTEN: TICKIEN Position */
  130. #define RTC_INTEN_TICKIEN_Msk (0x1ul << RTC_INTEN_TICKIEN_Pos) /*!< RTC INTEN: TICKIEN Mask */
  131. #define RTC_INTEN_WAKEUPIEN_Pos (2) /*!< RTC INTEN: WAKEUPIEN Position */
  132. #define RTC_INTEN_WAKEUPIEN_Msk (0x1ul << RTC_INTEN_WAKEUPIEN_Pos) /*!< RTC INTEN: WAKEUPIEN Mask */
  133. #define RTC_INTEN_PWRSWIEN_Pos (3) /*!< RTC INTEN: PWRSWIEN Position */
  134. #define RTC_INTEN_PWRSWIEN_Msk (0x1ul << RTC_INTEN_PWRSWIEN_Pos) /*!< RTC INTEN: PWRSWIEN Mask */
  135. #define RTC_INTEN_RELALMIEN_Pos (4) /*!< RTC INTEN: RELALMIEN Position */
  136. #define RTC_INTEN_RELALMIEN_Msk (0x1ul << RTC_INTEN_RELALMIEN_Pos) /*!< RTC INTEN: RELALMIEN Mask */
  137. #define RTC_INTEN_KEYPRESIEN_Pos (5) /*!< RTC INTEN: KEYPRESIEN Position */
  138. #define RTC_INTEN_KEYPRESIEN_Msk (0x1ul << RTC_INTEN_KEYPRESIEN_Pos) /*!< RTC INTEN: KEYPRESIEN Mask */
  139. #define RTC_INTSTS_ALMINT_Pos (0) /*!< RTC INTSTS: ALMINT Position */
  140. #define RTC_INTSTS_ALMINT_Msk (0x1ul << RTC_INTSTS_ALMINT_Pos) /*!< RTC INTSTS: ALMINT Mask */
  141. #define RTC_INTSTS_TICKINT_Pos (1) /*!< RTC INTSTS: TICKINT Position */
  142. #define RTC_INTSTS_TICKINT_Msk (0x1ul << RTC_INTSTS_TICKINT_Pos) /*!< RTC INTSTS: TICKINT Mask */
  143. #define RTC_INTSTS_WAKEUPINT_Pos (2) /*!< RTC INTSTS: WAKEUPINT Position */
  144. #define RTC_INTSTS_WAKEUPINT_Msk (0x1ul << RTC_INTSTS_WAKEUPINT_Pos) /*!< RTC INTSTS: WAKEUPINT Mask */
  145. #define RTC_INTSTS_PWRSWINT_Pos (3) /*!< RTC INTSTS: PWRSWINT Position */
  146. #define RTC_INTSTS_PWRSWINT_Msk (0x1ul << RTC_INTSTS_PWRSWINT_Pos) /*!< RTC INTSTS: PWRSWINT Mask */
  147. #define RTC_INTSTS_RELALMINT_Pos (4) /*!< RTC INTSTS: RELALMINT Position */
  148. #define RTC_INTSTS_RELALMINT_Msk (0x1ul << RTC_INTSTS_RELALMINT_Pos) /*!< RTC INTSTS: RELALMINT Mask */
  149. #define RTC_INTSTS_KEYPRESINT_Pos (5) /*!< RTC INTSTS: KEYPRESINT Position */
  150. #define RTC_INTSTS_KEYPRESINT_Msk (0x1ul << RTC_INTSTS_KEYPRESINT_Pos) /*!< RTC INTSTS: KEYPRESINT Mask */
  151. #define RTC_INTSTS_REGWRBUSY_Pos (31) /*!< RTC INTSTS: REGWRBUSY Position */
  152. #define RTC_INTSTS_REGWRBUSY_Msk (0x1ul << RTC_INTSTS_REGWRBUSY_Pos) /*!< RTC INTSTS: REGWRBUSY Mask */
  153. #define RTC_TICK_TTR_Pos (0) /*!< RTC TICK: TTR Position */
  154. #define RTC_TICK_TTR_Msk (0x7ul << RTC_TICK_TTR_Pos) /*!< RTC TICK: TTR Mask */
  155. #define RTC_PWRCTL_PWR_ON_Pos (0) /*!< RTC PWRCTL: PWR_ON Position */
  156. #define RTC_PWRCTL_PWR_ON_Msk (0x1ul << RTC_PWRCTL_PWR_ON_Pos) /*!< RTC PWRCTL: PWR_ON Mask */
  157. #define RTC_PWRCTL_SW_PCLR_Pos (1) /*!< RTC PWRCTL: SW_PCLR Position */
  158. #define RTC_PWRCTL_SW_PCLR_Msk (0x1ul << RTC_PWRCTL_SW_PCLR_Pos) /*!< RTC PWRCTL: SW_PCLR Mask */
  159. #define RTC_PWRCTL_HW_PCLR_EN_Pos (2) /*!< RTC PWRCTL: HW_PCLR_EN Position */
  160. #define RTC_PWRCTL_HW_PCLR_EN_Msk (0x1ul << RTC_PWRCTL_HW_PCLR_EN_Pos) /*!< RTC PWRCTL: HW_PCLR_EN Mask */
  161. #define RTC_PWRCTL_ALARM_EN_Pos (3) /*!< RTC PWRCTL: ALARM_EN Position */
  162. #define RTC_PWRCTL_ALARM_EN_Msk (0x1ul << RTC_PWRCTL_ALARM_EN_Pos) /*!< RTC PWRCTL: ALARM_EN Mask */
  163. #define RTC_PWRCTL_REL_ALARM_EN_Pos (4) /*!< RTC PWRCTL: REL_ALARM_EN Position */
  164. #define RTC_PWRCTL_REL_ALARM_EN_Msk (0x1ul << RTC_PWRCTL_REL_ALARM_EN_Pos) /*!< RTC PWRCTL: REL_ALARM_EN Mask */
  165. #define RTC_PWRCTL_EDGE_TRIG_Pos (5) /*!< RTC PWRCTL: EDGE_TRIG Position */
  166. #define RTC_PWRCTL_EDGE_TRIG_Msk (0x1ul << RTC_PWRCTL_EDGE_TRIG_Pos) /*!< RTC PWRCTL: EDGE_TRIG Mask */
  167. #define RTC_PWRCTL_TIMEUNITL_Pos (6) /*!< RTC PWRCTL: TIMEUNITL Position */
  168. #define RTC_PWRCTL_TIMEUNITL_Msk (0x1ul << RTC_PWRCTL_TIMEUNITLPos) /*!< RTC PWRCTL: TIMEUNITL Mask */
  169. #define RTC_PWRCTL_PWR_KEY_Pos (7) /*!< RTC PWRCTL: PWR_KEY Position */
  170. #define RTC_PWRCTL_PWR_KEY_Msk (0x1ul << RTC_PWRCTL_PWR_KEY_Pos) /*!< RTC PWRCTL: PWR_KEY Mask */
  171. #define RTC_PWRCTL_PWRON_TIME_Pos (8) /*!< RTC PWRCTL: PWRON_TIME Position */
  172. #define RTC_PWRCTL_PWRON_TIME_Msk (0xful << RTC_PWRCTL_PWRON_TIME_Pos) /*!< RTC PWRCTL: PWRON_TIME Mask */
  173. #define RTC_PWRCTL_PWROFF_TIME_Pos (12) /*!< RTC PWRCTL: PWROFF_TIME Position */
  174. #define RTC_PWRCTL_PWROFF_TIME_Msk (0xful << RTC_PWRCTL_PWROFF_TIME_Pos) /*!< RTC PWRCTL: PWROFF_TIME Mask */
  175. #define RTC_PWRCTL_RELALM_TIME_Pos (16) /*!< RTC PWRCTL: RELALM_TIME Position */
  176. #define RTC_PWRCTL_RELALM_TIME_Msk (0xffful << RTC_PWRCTL_RELALM_TIME_Pos) /*!< RTC PWRCTL: RELALM_TIME Mask */
  177. #define RTC_PWRCTL_ALARM_MODE_Pos (28) /*!< RTC PWRCTL: ALARM_MODE Position */
  178. #define RTC_PWRCTL_ALARM_MODE_Msk (0x1ul << RTC_PWRCTL_ALARM_MODE_Pos) /*!< RTC PWRCTL: ALARM_MODE Mask */
  179. #define RTC_SPRCTL_SNPDEN_Pos (0) /*!< RTC SPRCTL: SNPDEN Position */
  180. #define RTC_SPRCTL_SNPDEN_Msk (0x1ul << RTC_SPRCTL_SNPDEN_Pos) /*!< RTC SPRCTL: SNPDEN Mask */
  181. #define RTC_SPRCTL_SNPTYPE0_Pos (1) /*!< RTC SPRCTL: SNPTYPE0 Position */
  182. #define RTC_SPRCTL_SNPTYPE0_Msk (0x1ul << RTC_SPRCTL_SNPTYPE0_Pos) /*!< RTC SPRCTL: SNPTYPE0 Mask */
  183. #define RTC_SPRCTL_SPRRWEN_Pos (2) /*!< RTC SPRCTL: SPRRWEN Position */
  184. #define RTC_SPRCTL_SPRRWEN_Msk (0x1ul << RTC_SPRCTL_SPRRWEN_Pos) /*!< RTC SPRCTL: SPRRWEN Mask */
  185. #define RTC_SPRCTL_SNPTYPE1_Pos (3) /*!< RTC SPRCTL: SNPTYPE1 Position */
  186. #define RTC_SPRCTL_SNPTYPE1_Msk (0x1ul << RTC_SPRCTL_SNPTYPE1_Pos) /*!< RTC SPRCTL: SNPTYPE1 Mask */
  187. #define RTC_SPRCTL_SPRCSTS_Pos (5) /*!< RTC SPRCTL: SPRCSTS Position */
  188. #define RTC_SPRCTL_SPRCSTS_Msk (0x1ul << RTC_SPRCTL_SPRCSTS_Pos) /*!< RTC SPRCTL: SPRCSTS Mask */
  189. #define RTC_SPRCTL_SPRRWRDY_Pos (7) /*!< RTC SPRCTL: SPRRWRDY Position */
  190. #define RTC_SPRCTL_SPRRWRDY_Msk (0x1ul << RTC_SPRCTL_SPRRWRDY_Pos) /*!< RTC SPRCTL: SPRRWRDY Mask */
  191. #define RTC_SPR0_SPARE_Pos (0) /*!< RTC SPR0: SPARE Position */
  192. #define RTC_SPR0_SPARE_Msk (0xfffffffful << RTC_SPR0_SPARE_Pos) /*!< RTC SPR0: SPARE Mask */
  193. #define RTC_SPR1_SPARE_Pos (0) /*!< RTC SPR1: SPARE Position */
  194. #define RTC_SPR1_SPARE_Msk (0xfffffffful << RTC_SPR1_SPARE_Pos) /*!< RTC SPR1: SPARE Mask */
  195. #define RTC_SPR2_SPARE_Pos (0) /*!< RTC SPR2: SPARE Position */
  196. #define RTC_SPR2_SPARE_Msk (0xfffffffful << RTC_SPR2_SPARE_Pos) /*!< RTC SPR2: SPARE Mask */
  197. #define RTC_SPR3_SPARE_Pos (0) /*!< RTC SPR3: SPARE Position */
  198. #define RTC_SPR3_SPARE_Msk (0xfffffffful << RTC_SPR3_SPARE_Pos) /*!< RTC SPR3: SPARE Mask */
  199. #define RTC_SPR4_SPARE_Pos (0) /*!< RTC SPR4: SPARE Position */
  200. #define RTC_SPR4_SPARE_Msk (0xfffffffful << RTC_SPR4_SPARE_Pos) /*!< RTC SPR4: SPARE Mask */
  201. #define RTC_SPR5_SPARE_Pos (0) /*!< RTC SPR5: SPARE Position */
  202. #define RTC_SPR5_SPARE_Msk (0xfffffffful << RTC_SPR5_SPARE_Pos) /*!< RTC SPR5: SPARE Mask */
  203. #define RTC_SPR6_SPARE_Pos (0) /*!< RTC SPR6: SPARE Position */
  204. #define RTC_SPR6_SPARE_Msk (0xfffffffful << RTC_SPR6_SPARE_Pos) /*!< RTC SPR6: SPARE Mask */
  205. #define RTC_SPR7_SPARE_Pos (0) /*!< RTC SPR7: SPARE Position */
  206. #define RTC_SPR7_SPARE_Msk (0xfffffffful << RTC_SPR7_SPARE_Pos) /*!< RTC SPR7: SPARE Mask */
  207. #define RTC_SPR8_SPARE_Pos (0) /*!< RTC SPR8: SPARE Position */
  208. #define RTC_SPR8_SPARE_Msk (0xfffffffful << RTC_SPR8_SPARE_Pos) /*!< RTC SPR8: SPARE Mask */
  209. #define RTC_SPR9_SPARE_Pos (0) /*!< RTC SPR9: SPARE Position */
  210. #define RTC_SPR9_SPARE_Msk (0xfffffffful << RTC_SPR9_SPARE_Pos) /*!< RTC SPR9: SPARE Mask */
  211. #define RTC_SPR10_SPARE_Pos (0) /*!< RTC SPR10: SPARE Position */
  212. #define RTC_SPR10_SPARE_Msk (0xfffffffful << RTC_SPR10_SPARE_Pos) /*!< RTC SPR10: SPARE Mask */
  213. #define RTC_SPR11_SPARE_Pos (0) /*!< RTC SPR11: SPARE Position */
  214. #define RTC_SPR11_SPARE_Msk (0xfffffffful << RTC_SPR11_SPARE_Pos) /*!< RTC SPR11: SPARE Mask */
  215. #define RTC_SPR12_SPARE_Pos (0) /*!< RTC SPR12: SPARE Position */
  216. #define RTC_SPR12_SPARE_Msk (0xfffffffful << RTC_SPR12_SPARE_Pos) /*!< RTC SPR12: SPARE Mask */
  217. #define RTC_SPR13_SPARE_Pos (0) /*!< RTC SPR13: SPARE Position */
  218. #define RTC_SPR13_SPARE_Msk (0xfffffffful << RTC_SPR13_SPARE_Pos) /*!< RTC SPR13: SPARE Mask */
  219. #define RTC_SPR14_SPARE_Pos (0) /*!< RTC SPR14: SPARE Position */
  220. #define RTC_SPR14_SPARE_Msk (0xfffffffful << RTC_SPR14_SPARE_Pos) /*!< RTC SPR14: SPARE Mask */
  221. #define RTC_SPR15_SPARE_Pos (0) /*!< RTC SPR15: SPARE Position */
  222. #define RTC_SPR15_SPARE_Msk (0xfffffffful << RTC_SPR15_SPARE_Pos) /*!< RTC SPR15: SPARE Mask */
  223. #define RTC_SPR16_SPARE_Pos (0) /*!< RTC SPR16: SPARE Position */
  224. #define RTC_SPR16_SPARE_Msk (0xfffffffful << RTC_SPR16_SPARE_Pos) /*!< RTC SPR16: SPARE Mask */
  225. #define RTC_SPR17_SPARE_Pos (0) /*!< RTC SPR17: SPARE Position */
  226. #define RTC_SPR17_SPARE_Msk (0xfffffffful << RTC_SPR17_SPARE_Pos) /*!< RTC SPR17: SPARE Mask */
  227. #define RTC_SPR18_SPARE_Pos (0) /*!< RTC SPR18: SPARE Position */
  228. #define RTC_SPR18_SPARE_Msk (0xfffffffful << RTC_SPR18_SPARE_Pos) /*!< RTC SPR18: SPARE Mask */
  229. #define RTC_SPR19_SPARE_Pos (0) /*!< RTC SPR19: SPARE Position */
  230. #define RTC_SPR19_SPARE_Msk (0xfffffffful << RTC_SPR19_SPARE_Pos) /*!< RTC SPR19: SPARE Mask */
  231. /**
  232. * @brief RTC define interrupt source
  233. */
  234. typedef enum
  235. {
  236. RTC_ALARM_INT = 0x01, /*!< Alarm interrupt */
  237. RTC_TICK_INT = 0x02, /*!< Tick interrupt */
  238. RTC_WAKEUP_INT = 0x04, /*!< Wake-up interrupt */
  239. RTC_PSWI_INT = 0x08, /*!< Power switch interrupt */
  240. RTC_RELATIVE_ALARM_INT = 0x10, /*!< Releative Alarm interrupt */
  241. RTC_KEY_PRESS_INT = 0x20, /*!< Power Key press interrupt */
  242. RTC_ALL_INT = 0x3F /*!< All interrupt */
  243. } RTC_INT_SOURCE;
  244. /**
  245. * @brief Define Ioctl commands
  246. */
  247. typedef enum
  248. {
  249. RTC_IOC_IDENTIFY_LEAP_YEAR = 0, /*!< Identify leap year */
  250. RTC_IOC_SET_TICK_MODE = 1, /*!< Set tick mode */
  251. RTC_IOC_GET_TICK = 2, /*!< Get tick count */
  252. RTC_IOC_RESTORE_TICK = 3, /*!< Reset tick count */
  253. RTC_IOC_ENABLE_INT = 4, /*!< Enable RTC interrupt */
  254. RTC_IOC_DISABLE_INT = 5, /*!< Disable RTC interrupt */
  255. RTC_IOC_SET_CURRENT_TIME = 6, /*!< Set current time */
  256. RTC_IOC_SET_ALAMRM_TIME = 7, /*!< set alarm time */
  257. RTC_IOC_SET_FREQUENCY = 8, /*!< Set frequency compensation value */
  258. RTC_IOC_SET_POWER_ON = 9, /*!< Set Power on */
  259. RTC_IOC_SET_POWER_OFF = 10, /*!< Set Power off*/
  260. RTC_IOC_SET_POWER_OFF_PERIOD = 11, /*!< Set Power off period */
  261. RTC_IOC_ENABLE_HW_POWEROFF = 12, /*!< Enable H/W Power off */
  262. RTC_IOC_DISABLE_HW_POWEROFF = 13, /*!< Disable H/W Power off */
  263. RTC_IOC_GET_POWERKEY_STATUS = 14, /*!< Get Power key status */
  264. RTC_IOC_SET_PSWI_CALLBACK = 15, /*!< Set Power switch isr call back function */
  265. //RTC_IOC_GET_SW_STATUS = 16,
  266. //RTC_IOC_SET_SW_STATUS = 17,
  267. RTC_IOC_SET_RELEATIVE_ALARM = 18, /*!< Set releative alarm */
  268. //RTC_IOC_SET_POWER_KEY_DELAY = 19,
  269. //RTC_IOC_SET_CLOCK_SOURCE = 20,
  270. //RTC_IOC_GET_CLOCK_SOURCE = 21
  271. } E_RTC_CMD;
  272. /**
  273. * @brief RTC define Tick mode
  274. */
  275. typedef enum
  276. {
  277. RTC_TICK_1_SEC = 0, /*!< Time tick is 1 second */
  278. RTC_TICK_1_2_SEC = 1, /*!< Time tick is 1/2 second */
  279. RTC_TICK_1_4_SEC = 2, /*!< Time tick is 1/4 second */
  280. RTC_TICK_1_8_SEC = 3, /*!< Time tick is 1/8 second */
  281. RTC_TICK_1_16_SEC = 4, /*!< Time tick is 1/16 second */
  282. RTC_TICK_1_32_SEC = 5, /*!< Time tick is 1/32 second */
  283. RTC_TICK_1_64_SEC = 6, /*!< Time tick is 1/64 second */
  284. RTC_TICK_1_128_SEC = 7 /*!< Time tick is 1/128 second */
  285. } RTC_TICK;
  286. typedef void (PFN_RTC_CALLBACK)(void); /*!< Call back function \hideinitializer */
  287. /**
  288. * @brief RTC current/alarm time select
  289. */
  290. typedef enum
  291. {
  292. RTC_CURRENT_TIME = 0, /*!< Select current time */
  293. RTC_ALARM_TIME = 1 /*!< Select alarm time */
  294. } E_RTC_TIME_SELECT;
  295. /**
  296. * @brief RTC define Day of week parameter
  297. */
  298. typedef enum
  299. {
  300. RTC_SUNDAY = 0, /*!< Sunday */
  301. RTC_MONDAY = 1, /*!< Monday */
  302. RTC_TUESDAY = 2, /*!< Tuesday */
  303. RTC_WEDNESDAY = 3, /*!< Wednesday */
  304. RTC_THURSDAY = 4, /*!< Thursday */
  305. RTC_FRIDAY = 5, /*!< Friday */
  306. RTC_SATURDAY = 6 /*!< Saturday */
  307. } E_RTC_DWR_PARAMETER;
  308. /**
  309. * @brief RTC define Time Data Struct
  310. */
  311. typedef struct
  312. {
  313. UINT8 u8cClockDisplay; /*!< 12-Hour, 24-Hour */
  314. UINT8 u8cAmPm; /*!< Time Scale select 12-hr/24-hr */
  315. UINT32 u32cSecond; /*!< Second value */
  316. UINT32 u32cMinute; /*!< Minute value */
  317. UINT32 u32cHour; /*!< Hour value */
  318. UINT32 u32cDayOfWeek; /*!< Day of week value */
  319. UINT32 u32cDay; /*!< Day value */
  320. UINT32 u32cMonth; /*!< Month value */
  321. UINT32 u32Year; /*!< Year value */
  322. UINT32 u32AlarmMaskSecond; /*!< Alarm mask second */
  323. UINT32 u32AlarmMaskMinute; /*!< Alarm mask minute */
  324. UINT32 u32AlarmMaskHour; /*!< Alarm mask hour */
  325. PFN_RTC_CALLBACK *pfnAlarmCallBack; /*!< Alarm ISR call back function */
  326. } S_RTC_TIME_DATA_T;
  327. /**
  328. * @brief RTC define Tick Struct
  329. */
  330. typedef struct
  331. {
  332. UINT8 ucMode; /*!< Tick Mode */
  333. PFN_RTC_CALLBACK *pfnTickCallBack; /*!< Tick ISR call back function */
  334. } RTC_TICK_T;
  335. /*@}*/ /* end of group N9H30_RTC_EXPORTED_CONSTANTS */
  336. /** @addtogroup N9H30_RTC_EXPORTED_FUNCTIONS RTC Exported Functions
  337. @{
  338. */
  339. UINT32 RTC_Init(void);
  340. UINT32 RTC_Open(S_RTC_TIME_DATA_T *sPt);
  341. UINT32 RTC_Ioctl(INT32 i32Num, E_RTC_CMD eCmd, UINT32 u32Arg0, UINT32 u32Arg1);
  342. UINT32 RTC_Read(E_RTC_TIME_SELECT eTime, S_RTC_TIME_DATA_T *sPt);
  343. UINT32 RTC_Write(E_RTC_TIME_SELECT eTime, S_RTC_TIME_DATA_T *sPt);
  344. UINT32 RTC_DoFrequencyCompensation(INT32 i32FrequencyX100);
  345. UINT32 RTC_WriteEnable(BOOL bEnable);
  346. UINT32 RTC_Close(void);
  347. void RTC_EnableClock(BOOL bEnable);
  348. VOID RTC_Check(void);
  349. #define RTC_DisableInt(u32IntFlag) RTC_Ioctl(0, RTC_IOC_DISABLE_INT, u32IntFlag, 0)
  350. #define RTC_EnableInt(u32IntFlag) RTC_Ioctl(0, RTC_IOC_ENABLE_INT, u32IntFlag, 0)
  351. #define RTC_GET_TICK_INT_FLAG() (inp32(REG_RTC_INTSTS)&RTC_TICK_INT)
  352. #define RTC_GET_ALARM_INT_FLAG() (inp32(REG_RTC_INTSTS)&RTC_ALARM_INT)
  353. static __inline void RTC_CLEAR_TICK_INT_FLAG(void)
  354. {
  355. RTC_WriteEnable(1);
  356. outp32(REG_RTC_INTSTS, RTC_TICK_INT);
  357. RTC_Check();
  358. }
  359. static __inline void RTC_CLEAR_ALARM_INT_FLAG(void)
  360. {
  361. RTC_WriteEnable(1);
  362. outp32(REG_RTC_INTSTS, RTC_ALARM_INT);
  363. RTC_Check();
  364. }
  365. /*@}*/ /* end of group N9H30_RTC_EXPORTED_FUNCTIONS */
  366. /*@}*/ /* end of group N9H30_RTC_Driver */
  367. /*@}*/ /* end of group N9H30_Device_Driver */
  368. #ifdef __cplusplus
  369. }
  370. #endif
  371. #endif /* __NU_RTC_H__ */
  372. /*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/