nu_scuart.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335
  1. /**************************************************************************//**
  2. * @file scuart.h
  3. * @brief N9H30 series Smartcard UART mode (SCUART) driver header file
  4. *
  5. * @note
  6. * SPDX-License-Identifier: Apache-2.0
  7. * Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
  8. *****************************************************************************/
  9. #ifndef __NU_SCUART_H__
  10. #define __NU_SCUART_H__
  11. #ifdef __cplusplus
  12. extern "C"
  13. {
  14. #endif
  15. /** @addtogroup N9H30_Device_Driver N9H30 Device Driver
  16. @{
  17. */
  18. /** @addtogroup N9H30_SCUART_Driver SCUART Driver
  19. @{
  20. */
  21. /** @addtogroup N9H30_SCUART_EXPORTED_CONSTANTS SCUART Exported Constants
  22. @{
  23. */
  24. #define SCUART_CHAR_LEN_5 (0x3ul << 4) /*!< Set SCUART word length to 5 bits */
  25. #define SCUART_CHAR_LEN_6 (0x2ul << 4) /*!< Set SCUART word length to 6 bits */
  26. #define SCUART_CHAR_LEN_7 (0x1ul << 4) /*!< Set SCUART word length to 7 bits */
  27. #define SCUART_CHAR_LEN_8 (0) /*!< Set SCUART word length to 8 bits */
  28. #define SCUART_PARITY_NONE (0x00000040) /*!< Set SCUART transfer with no parity */
  29. #define SCUART_PARITY_ODD (0x00000080) /*!< Set SCUART transfer with odd parity */
  30. #define SCUART_PARITY_EVEN (0) /*!< Set SCUART transfer with even parity */
  31. #define SCUART_STOP_BIT_1 (0x00008000) /*!< Set SCUART transfer with one stop bit */
  32. #define SCUART_STOP_BIT_2 (0) /*!< Set SCUART transfer with two stop bits */
  33. #define SC_STATUS_RXEMPTY_Msk 0x00000002
  34. #define SC_STATUS_RXFULL_Msk 0x00000004
  35. #define SC_STATUS_PEF_Msk 0x00000010
  36. #define SC_STATUS_FEF_Msk 0x00000020
  37. #define SC_STATUS_BEF_Msk 0x00000040
  38. #define SC_STATUS_TXEMPTY_Msk 0x00000200
  39. #define SC_STATUS_TXFULL_Msk 0x00000400
  40. #define SC_STATUS_TXACT_Msk 0x80000000
  41. #define SC_INTEN_RXTOIEN_Msk 0x00000200
  42. #define SC_INTEN_TERRIEN_Msk 0x00000004
  43. #define SC_INTEN_TBEIEN_Msk 0x00000002
  44. #define SC_INTEN_RDAIEN_Msk 0x00000001
  45. #define SC_INTSTS_RBTOIF_Msk 0x00000200
  46. #define SC_INTSTS_TERRIF_Msk 0x00000004
  47. #define SC_INTSTS_TBEIF_Msk 0x00000002
  48. #define SC_INTSTS_RDAIF_Msk 0x00000001
  49. #define SC_CTL_SCEN_Msk 0x00000001
  50. #define SC_CTL_NSB_Msk 0x00008000
  51. #define SC_UARTCTL_UARTEN_Msk 0x00000001
  52. /*@}*/ /* end of group N9H30_SCUART_EXPORTED_CONSTANTS */
  53. /** @addtogroup N9H30_SCUART_EXPORTED_FUNCTIONS SCUART Exported Functions
  54. @{
  55. */
  56. /* TX Macros */
  57. /**
  58. * @brief Write Data to Tx data register.
  59. * @param[in] sc Smartcard module number
  60. * @param[in] u8Data Data byte to transmit.
  61. * @return None
  62. * @details By writing data to DAT register, the SC will send out an 8-bit data.
  63. * \hideinitializer
  64. */
  65. #define SCUART_WRITE(sc, u8Data) \
  66. do {\
  67. if(sc == 0)\
  68. outpw(REG_SC0_DAT, u8Data);\
  69. else\
  70. outpw(REG_SC1_DAT, u8Data);\
  71. }while(0)
  72. /**
  73. * @brief Get TX FIFO empty flag status from register.
  74. * @param[in] sc Smartcard module number
  75. * @return Transmit FIFO empty status.
  76. * @retval 0 Transmit FIFO is not empty.
  77. * @retval SC_STATUS_TXEMPTY_Msk Transmit FIFO is empty.
  78. * @details When the last byte of TX buffer has been transferred to Transmitter Shift Register, hardware sets TXEMPTY bit (SC_STATUS[9]) high.
  79. * It will be cleared when writing data into DAT (SC_DAT[7:0]).
  80. * \hideinitializer
  81. */
  82. #define SCUART_GET_TX_EMPTY(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & SC_STATUS_TXEMPTY_Msk) : (inpw(REG_SC1_STATUS) & SC_STATUS_TXEMPTY_Msk))
  83. /**
  84. * @brief Get TX FIFO full flag status from register.
  85. * @param[in] sc Smartcard module number
  86. * @retval 0 Transmit FIFO is not full.
  87. * @retval SC_STATUS_TXFULL_Msk Transmit FIFO is full.
  88. * @details TXFULL(SC_STATUS[10]) is set when TX pointer is equal to 4, otherwise is cleared by hardware.
  89. * \hideinitializer
  90. */
  91. #define SCUART_GET_TX_FULL(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & SC_STATUS_TXFULL_Msk) : (inpw(REG_SC1_STATUS) & SC_STATUS_TXFULL_Msk))
  92. /**
  93. * @brief Wait specified smartcard port transmission complete.
  94. * @param[in] sc Smartcard module number
  95. * @return None
  96. * @details TXACT (SC_STATUS[31]) is cleared automatically when TX transfer is finished or the last byte transmission has completed.
  97. * @note This macro blocks until transmit complete.
  98. * \hideinitializer
  99. */
  100. #define SCUART_WAIT_TX_EMPTY(sc)\
  101. do {\
  102. if(sc == 0)\
  103. while(inpw(REG_SC0_STATUS) & SC_STATUS_TXACT_Msk);\
  104. else\
  105. while(inpw(REG_SC1_STATUS) & SC_STATUS_TXACT_Msk);\
  106. }while(0)
  107. /**
  108. * @brief Check specified smartcard port transmit FIFO is full or not.
  109. * @param[in] sc Smartcard module number
  110. * @retval 0 Transmit FIFO is not full.
  111. * @retval 1 Transmit FIFO is full.
  112. * @details TXFULL(SC_STATUS[10]) indicates TX buffer full or not.
  113. * This is set when TX pointer is equal to 4, otherwise is cleared by hardware.
  114. * \hideinitializer
  115. */
  116. #define SCUART_IS_TX_FULL(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & SC_STATUS_TXFULL_Msk ? 1 : 0) : (inpw(REG_SC1_STATUS) & SC_STATUS_TXFULL_Msk ? 1 : 0))
  117. /**
  118. * @brief Check specified smartcard port transmission is over.
  119. * @param[in] sc Smartcard module number
  120. * @retval 0 Transmit is not complete.
  121. * @retval 1 Transmit complete.
  122. * @details TXACT (SC_STATUS[31]) is set by hardware when TX transfer is in active and the STOP bit of the last byte has been transmitted.
  123. * \hideinitializer
  124. */
  125. #define SCUART_IS_TX_EMPTY(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & SC_STATUS_TXACT_Msk ? 1 : 0) : (inpw(REG_SC1_STATUS) & SC_STATUS_TXACT_Msk ? 1 : 0))
  126. /* RX Macros */
  127. /**
  128. * @brief Read Rx data register.
  129. * @param[in] sc Smartcard module number
  130. * @return The oldest data byte in RX FIFO.
  131. * @details By reading DAT register, the SC will return an 8-bit received data.
  132. * \hideinitializer
  133. */
  134. #define SCUART_READ(sc) (sc == 0 ? inpw(REG_SC0_DAT) : inpw(REG_SC1_DAT))
  135. /**
  136. * @brief Get RX FIFO empty flag status from register.
  137. * @param[in] sc Smartcard module number
  138. * @retval 0 Receive FIFO is not empty.
  139. * @retval SC_STATUS_RXEMPTY_Msk Receive FIFO is empty.
  140. * @details When the last byte of Rx buffer has been read by CPU, hardware sets RXEMPTY(SC_STATUS[1]) high.
  141. * It will be cleared when SC receives any new data.
  142. * \hideinitializer
  143. */
  144. #define SCUART_GET_RX_EMPTY(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & SC_STATUS_RXEMPTY_Msk) : (inpw(REG_SC1_STATUS) & SC_STATUS_RXEMPTY_Msk))
  145. /**
  146. * @brief Get RX FIFO full flag status from register.
  147. * @param[in] sc Smartcard module number
  148. * @retval 0 Receive FIFO is not full.
  149. * @retval SC_STATUS_RXFULL_Msk Receive FIFO is full.
  150. * @details RXFULLF(SC_STATUS[2]) is set when RX pointer is equal to 4, otherwise it is cleared by hardware.
  151. * \hideinitializer
  152. */
  153. #define SCUART_GET_RX_FULL(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & SC_STATUS_RXFULL_Msk) : (inpw(REG_SC1_STATUS) & SC_STATUS_RXFULL_Msk))
  154. /**
  155. * @brief Check if receive data number in FIFO reach FIFO trigger level or not.
  156. * @param[in] sc Smartcard module number
  157. * @retval 0 The number of bytes in receive FIFO is less than trigger level.
  158. * @retval 1 The number of bytes in receive FIFO equals or larger than trigger level.
  159. * @details RDAIF(SC_INTSTS[0]) is used for received data reaching trigger level RXTRGLV (SC_CTL[7:6]) interrupt status flag.
  160. * @note If receive trigger level is \b not 1 byte, this macro return 0 does not necessary indicates there is no data in FIFO.
  161. * \hideinitializer
  162. */
  163. #define SCUART_IS_RX_READY(sc) (sc == 0 ? (inpw(REG_SC0_INTSTS) & SC_INTSTS_RDAIF_Msk ? 1 : 0) : (inpw(REG_SC1_INTSTS) & SC_INTSTS_RDAIF_Msk ? 1 : 0))
  164. /**
  165. * @brief Check specified smartcard port receive FIFO is full or not.
  166. * @param[in] sc Smartcard module number
  167. * @retval 0 Receive FIFO is not full.
  168. * @retval 1 Receive FIFO is full.
  169. * @details RXFULLF(SC_STATUS[2]) is set when RX pointer is equal to 4, otherwise it is cleared by hardware.
  170. * \hideinitializer
  171. */
  172. #define SCUART_IS_RX_FULL(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & SC_STATUS_RXFULL_Msk ? 1 : 0) : (inpw(REG_SC1_STATUS) & SC_STATUS_RXFULL_Msk ? 1 : 0))
  173. /* Interrupt Macros */
  174. /**
  175. * @brief Enable specified interrupts.
  176. * @param[in] sc Smartcard module number
  177. * @param[in] u32Mask Interrupt masks to enable, a combination of following bits.
  178. * - \ref SC_INTEN_RXTOIEN_Msk
  179. * - \ref SC_INTEN_TERRIEN_Msk
  180. * - \ref SC_INTEN_TBEIEN_Msk
  181. * - \ref SC_INTEN_RDAIEN_Msk
  182. * @return None
  183. * @details The macro is used to enable receiver buffer time-out interrupt, transfer error interrupt,
  184. * transmit buffer empty interrupt or receive data reach trigger level interrupt.
  185. * \hideinitializer
  186. */
  187. #define SCUART_ENABLE_INT(sc, u32Mask)\
  188. do {\
  189. if(sc == 0)\
  190. outpw(REG_SC0_INTEN, inpw(REG_SC0_INTEN) | (u32Mask));\
  191. else\
  192. outpw(REG_SC1_INTEN, inpw(REG_SC1_INTEN) | (u32Mask));\
  193. }while(0)
  194. /**
  195. * @brief Disable specified interrupts.
  196. * @param[in] sc Smartcard module number
  197. * @param[in] u32Mask Interrupt masks to disable, a combination of following bits.
  198. * - \ref SC_INTEN_RXTOIEN_Msk
  199. * - \ref SC_INTEN_TERRIEN_Msk
  200. * - \ref SC_INTEN_TBEIEN_Msk
  201. * - \ref SC_INTEN_RDAIEN_Msk
  202. * @return None
  203. * @details The macro is used to disable receiver buffer time-out interrupt, transfer error interrupt,
  204. * transmit buffer empty interrupt or receive data reach trigger level interrupt.
  205. * \hideinitializer
  206. */
  207. #define SCUART_DISABLE_INT(sc, u32Mask)\
  208. do {\
  209. if(sc == 0)\
  210. outpw(REG_SC0_INTEN, inpw(REG_SC0_INTEN) & ~(u32Mask));\
  211. else\
  212. outpw(REG_SC1_INTEN, inpw(REG_SC1_INTEN) & ~(u32Mask));\
  213. }while(0)
  214. /**
  215. * @brief Get specified interrupt flag/status.
  216. * @param[in] sc Smartcard module number
  217. * @param[in] u32Type Interrupt flag/status to check, could be one of following value:
  218. * - \ref SC_INTSTS_RBTOIF_Msk
  219. * - \ref SC_INTSTS_TERRIF_Msk
  220. * - \ref SC_INTSTS_TBEIF_Msk
  221. * - \ref SC_INTSTS_RDAIF_Msk
  222. * @return The status of specified interrupt.
  223. * @retval 0 Specified interrupt does not happened.
  224. * @retval 1 Specified interrupt happened.
  225. * @details The macro is used to get receiver buffer time-out interrupt status, transfer error interrupt status,
  226. * transmit buffer empty interrupt status or receive data reach interrupt status.
  227. * \hideinitializer
  228. */
  229. #define SCUART_GET_INT_FLAG(sc, u32Type) (sc == 0 ? (inpw(REG_SC0_INTSTS) & (u32Type) ? 1 : 0) : (inpw(REG_SC1_INTSTS) & (u32Type) ? 1 : 0))
  230. /**
  231. * @brief Clear specified interrupt flag/status.
  232. * @param[in] sc Smartcard module number
  233. * @param[in] u32Type Interrupt flag/status to clear, could be the combination of following values:
  234. * - \ref SC_INTSTS_RBTOIF_Msk
  235. * - \ref SC_INTSTS_TERRIF_Msk
  236. * - \ref SC_INTSTS_TBEIF_Msk
  237. * @return None
  238. * @details The macro is used to clear receiver buffer time-out interrupt flag, transfer error interrupt flag or
  239. * transmit buffer empty interrupt flag.
  240. * \hideinitializer
  241. */
  242. #define SCUART_CLR_INT_FLAG(sc, u32Type) \
  243. do {\
  244. if(sc == 0)\
  245. outpw(REG_SC0_INTSTS, (u32Type));\
  246. else\
  247. outpw(REG_SC1_INTSTS, (u32Type));\
  248. }while(0)
  249. /**
  250. * @brief Get receive error flag/status.
  251. * @param[in] sc Smartcard module number
  252. * @return Current receive error status, could one of following errors:
  253. * @retval SC_STATUS_PEF_Msk Parity error.
  254. * @retval SC_STATUS_FEF_Msk Frame error.
  255. * @retval SC_STATUS_BEF_Msk Break error.
  256. * @details The macro is used to get receiver parity error status, receiver frame error status or
  257. * receiver break error status.
  258. * \hideinitializer
  259. */
  260. #define SCUART_GET_ERR_FLAG(sc) (sc == 0 ? (inpw(REG_SC0_STATUS) & (SC_STATUS_PEF_Msk | SC_STATUS_FEF_Msk | SC_STATUS_BEF_Msk)) : (inpw(REG_SC1_STATUS) & (SC_STATUS_PEF_Msk | SC_STATUS_FEF_Msk | SC_STATUS_BEF_Msk)))
  261. /**
  262. * @brief Clear specified receive error flag/status.
  263. * @param[in] sc Smartcard module number
  264. * @param[in] u32Mask Receive error flag/status to clear, combination following values:
  265. * - \ref SC_STATUS_PEF_Msk
  266. * - \ref SC_STATUS_FEF_Msk
  267. * - \ref SC_STATUS_BEF_Msk
  268. * @return None
  269. * @details The macro is used to clear receiver parity error flag, receiver frame error flag or
  270. * receiver break error flag.
  271. * \hideinitializer
  272. */
  273. #define SCUART_CLR_ERR_FLAG(sc, u32Mask)\
  274. do {\
  275. if(sc == 0)\
  276. outpw(REG_SC0_STATUS, (u32Mask));\
  277. else\
  278. outpw(REG_SC1_STATUS, (u32Mask));\
  279. }while(0)
  280. void SCUART_Close(UINT sc);
  281. UINT SCUART_Open(UINT sc, UINT u32baudrate);
  282. UINT SCUART_Read(UINT sc, char *pu8RxBuf, UINT u32ReadBytes);
  283. UINT SCUART_SetLineConfig(UINT sc, UINT u32Baudrate, UINT u32DataWidth, UINT u32Parity, UINT u32StopBits);
  284. void SCUART_SetTimeoutCnt(UINT sc, UINT u32TOC);
  285. void SCUART_Write(UINT sc, char *pu8TxBuf, UINT u32WriteBytes);
  286. /*@}*/ /* end of group N9H30_SCUART_EXPORTED_FUNCTIONS */
  287. /*@}*/ /* end of group N9H30_SCUART_Driver */
  288. /*@}*/ /* end of group N9H30_Device_Driver */
  289. #ifdef __cplusplus
  290. }
  291. #endif
  292. #endif //__NU_SCUART_H__
  293. /*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/