drv_etimer.c 7.3 KB

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  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-12-3 Wayne First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)
  14. #include <rtdevice.h>
  15. #include "NuMicro.h"
  16. #include <drv_sys.h>
  17. /* Private define ---------------------------------------------------------------*/
  18. #define NU_TIMER_DEVICE(etimer) (nu_etimer_t)(etimer)
  19. enum
  20. {
  21. ETIMER_START = -1,
  22. #if defined(BSP_USING_TIMER0)
  23. ETIMER0_IDX,
  24. #endif
  25. #if defined(BSP_USING_TIMER1)
  26. ETIMER1_IDX,
  27. #endif
  28. #if defined(BSP_USING_TIMER2)
  29. ETIMER2_IDX,
  30. #endif
  31. #if defined(BSP_USING_TIMER3)
  32. ETIMER3_IDX,
  33. #endif
  34. #if defined(BSP_USING_TIMER4)
  35. ETIMER4_IDX,
  36. #endif
  37. /* BSP_USING_TIMER5 is reserved for Systick usage. */
  38. ETIMER_CNT
  39. };
  40. /* Private typedef --------------------------------------------------------------*/
  41. struct nu_etimer
  42. {
  43. rt_hwtimer_t parent;
  44. char *name;
  45. uint32_t idx;
  46. IRQn_Type irqn;
  47. E_SYS_IPRST rstidx;
  48. E_SYS_IPCLK clkidx;
  49. };
  50. typedef struct nu_etimer *nu_etimer_t;
  51. /* Private functions ------------------------------------------------------------*/
  52. static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state);
  53. static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode);
  54. static void nu_etimer_stop(rt_hwtimer_t *timer);
  55. static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer);
  56. static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args);
  57. /* Public functions -------------------------------------------------------------*/
  58. /* Private variables ------------------------------------------------------------*/
  59. static struct nu_etimer nu_etimer_arr [] =
  60. {
  61. #if defined(BSP_USING_TIMER0)
  62. {
  63. .name = "etimer0",
  64. .idx = 0,
  65. .irqn = IRQ_TIMER0,
  66. .rstidx = TIMER0RST,
  67. .clkidx = TIMER0CKEN,
  68. },
  69. #endif
  70. #if defined(BSP_USING_TIMER1)
  71. {
  72. .name = "etimer1",
  73. .idx = 1,
  74. .irqn = IRQ_TIMER1,
  75. .rstidx = TIMER1RST,
  76. .clkidx = TIMER1CKEN,
  77. },
  78. #endif
  79. #if defined(BSP_USING_TIMER2)
  80. {
  81. .name = "etimer2",
  82. .idx = 2,
  83. .irqn = IRQ_TIMER2,
  84. .rstidx = TIMER2RST,
  85. .clkidx = TIMER2CKEN,
  86. },
  87. #endif
  88. #if defined(BSP_USING_TIMER3)
  89. {
  90. .name = "etimer3",
  91. .idx = 3,
  92. .irqn = IRQ_TIMER3,
  93. .rstidx = TIMER3RST,
  94. .clkidx = TIMER3CKEN,
  95. },
  96. #endif
  97. #if defined(BSP_USING_TIMER4)
  98. {
  99. .name = "etimer4",
  100. .idx = 4,
  101. .irqn = IRQ_TIMER4,
  102. .rstidx = TIMER4RST,
  103. .clkidx = TIMER4CKEN,
  104. },
  105. #endif
  106. /* BSP_USING_TIMER5 is reserved for Systick usage. */
  107. };
  108. static struct rt_hwtimer_info nu_etimer_info =
  109. {
  110. 12000000, /* maximum count frequency */
  111. 46875, /* minimum count frequency */
  112. 0xFFFFFF, /* the maximum counter value */
  113. HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */
  114. };
  115. static struct rt_hwtimer_ops nu_etimer_ops =
  116. {
  117. nu_etimer_init,
  118. nu_etimer_start,
  119. nu_etimer_stop,
  120. nu_etimer_count_get,
  121. nu_etimer_control
  122. };
  123. /* Functions define ------------------------------------------------------------*/
  124. static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
  125. {
  126. nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
  127. RT_ASSERT(psNuETmr != RT_NULL);
  128. if (1 == state)
  129. {
  130. uint32_t timer_clk;
  131. struct rt_hwtimer_info *info = &nu_etimer_info;
  132. timer_clk = ETIMER_GetModuleClock(psNuETmr->idx);
  133. info->maxfreq = timer_clk;
  134. info->minfreq = timer_clk / 256;
  135. ETIMER_Open(psNuETmr->idx, ETIMER_ONESHOT_MODE, 1);
  136. ETIMER_EnableInt(psNuETmr->idx);
  137. rt_hw_interrupt_umask(psNuETmr->irqn);
  138. }
  139. else
  140. {
  141. rt_hw_interrupt_mask(psNuETmr->irqn);
  142. ETIMER_DisableInt(psNuETmr->idx);
  143. ETIMER_Close(psNuETmr->idx);
  144. }
  145. }
  146. static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode)
  147. {
  148. rt_err_t ret = RT_EINVAL;
  149. rt_uint32_t u32OpMode;
  150. nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
  151. RT_ASSERT(psNuETmr != RT_NULL);
  152. if (cnt <= 1 || cnt > 0xFFFFFF)
  153. {
  154. goto exit_nu_etimer_start;
  155. }
  156. switch (opmode)
  157. {
  158. case HWTIMER_MODE_PERIOD:
  159. u32OpMode = ETIMER_PERIODIC_MODE;
  160. break;
  161. case HWTIMER_MODE_ONESHOT:
  162. u32OpMode = ETIMER_ONESHOT_MODE;
  163. break;
  164. default:
  165. goto exit_nu_etimer_start;
  166. }
  167. ETIMER_SET_CMP_VALUE(psNuETmr->idx, cnt);
  168. ETIMER_SET_OPMODE(psNuETmr->idx, u32OpMode);
  169. ETIMER_EnableInt(psNuETmr->idx);
  170. rt_hw_interrupt_umask(psNuETmr->irqn);
  171. ETIMER_Start(psNuETmr->idx);
  172. ret = RT_EOK;
  173. exit_nu_etimer_start:
  174. return -(ret);
  175. }
  176. static void nu_etimer_stop(rt_hwtimer_t *timer)
  177. {
  178. nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
  179. RT_ASSERT(psNuETmr != RT_NULL);
  180. rt_hw_interrupt_mask(psNuETmr->irqn);
  181. ETIMER_DisableInt(psNuETmr->idx);
  182. ETIMER_Stop(psNuETmr->idx);
  183. ETIMER_ClearCounter(psNuETmr->idx);
  184. }
  185. static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer)
  186. {
  187. nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
  188. RT_ASSERT(psNuETmr != RT_NULL);
  189. return ETIMER_GetCounter(psNuETmr->idx);
  190. }
  191. static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
  192. {
  193. rt_err_t ret = RT_EOK;
  194. nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer);
  195. RT_ASSERT(psNuETmr != RT_NULL);
  196. switch (cmd)
  197. {
  198. case HWTIMER_CTRL_FREQ_SET:
  199. {
  200. uint32_t clk;
  201. uint32_t pre;
  202. clk = ETIMER_GetModuleClock(psNuETmr->idx);
  203. pre = clk / *((uint32_t *)args) - 1;
  204. ETIMER_SET_PRESCALE_VALUE(psNuETmr->idx, pre);
  205. *((uint32_t *)args) = clk / (pre + 1) ;
  206. }
  207. break;
  208. case HWTIMER_CTRL_STOP:
  209. ETIMER_Stop(psNuETmr->idx);
  210. break;
  211. default:
  212. ret = RT_EINVAL;
  213. break;
  214. }
  215. return -(ret);
  216. }
  217. /**
  218. * All UART interrupt service routine
  219. */
  220. static void nu_etimer_isr(int vector, void *param)
  221. {
  222. nu_etimer_t psNuETmr = NU_TIMER_DEVICE(param);
  223. RT_ASSERT(psNuETmr != RT_NULL);
  224. if (ETIMER_GetIntFlag(psNuETmr->idx))
  225. {
  226. ETIMER_ClearIntFlag(psNuETmr->idx);
  227. rt_device_hwtimer_isr(&psNuETmr->parent);
  228. }
  229. }
  230. int rt_hw_etimer_init(void)
  231. {
  232. int i;
  233. rt_err_t ret = RT_EOK;
  234. for (i = (ETIMER_START + 1); i < ETIMER_CNT; i++)
  235. {
  236. nu_sys_ipclk_enable(nu_etimer_arr[i].clkidx);
  237. nu_sys_ip_reset(nu_etimer_arr[i].rstidx);
  238. /* Register Etimer information. */
  239. nu_etimer_arr[i].parent.info = &nu_etimer_info;
  240. /* Register Etimer operation. */
  241. nu_etimer_arr[i].parent.ops = &nu_etimer_ops;
  242. /* Register Etimer interrupt service routine. */
  243. rt_hw_interrupt_install(nu_etimer_arr[i].irqn, nu_etimer_isr, &nu_etimer_arr[i], nu_etimer_arr[i].name);
  244. /* Register RT hwtimer device. */
  245. ret = rt_device_hwtimer_register(&nu_etimer_arr[i].parent, nu_etimer_arr[i].name, &nu_etimer_arr[i]);
  246. RT_ASSERT(ret == RT_EOK);
  247. }
  248. return 0;
  249. }
  250. INIT_BOARD_EXPORT(rt_hw_etimer_init);
  251. #endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)