nu_pin_init.c 4.3 KB

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  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-12-12 Wayne First version
  10. *
  11. ******************************************************************************/
  12. #include "board.h"
  13. static void nu_pin_uart_init(void)
  14. {
  15. /* UART0: PE[0, 1] */
  16. outpw(REG_SYS_GPE_MFPL, (inpw(REG_SYS_GPE_MFPL) & 0xffffff00) | 0x00000099);
  17. /* UART1: PH[4, 7] */
  18. outpw(REG_SYS_GPH_MFPL, (inpw(REG_SYS_GPH_MFPL) & 0x0000ffff) | 0x99990000);
  19. /* UART2: PF[11, 14] */
  20. outpw(REG_SYS_GPF_MFPH, (inpw(REG_SYS_GPF_MFPH) & 0xf0000fff) | 0x09999000);
  21. /* UART3: PE[12, 13] */
  22. outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & 0xff00ffff) | 0x00990000);
  23. /* UART4: PH[8, 11] */
  24. outpw(REG_SYS_GPH_MFPH, (inpw(REG_SYS_GPH_MFPH) & 0xffff0000) | 0x00009999);
  25. /* UART5: PB[0, 1] */
  26. outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xffffff00) | 0x00000099);
  27. /* UART7: PI[1, 2] */
  28. outpw(REG_SYS_GPI_MFPL, (inpw(REG_SYS_GPI_MFPL) & 0xfffff00f) | 0x00000990);
  29. /* UART8: PH[12, 15] */
  30. outpw(REG_SYS_GPH_MFPH, (inpw(REG_SYS_GPH_MFPH) & 0x0000ffff) | 0x99990000);
  31. /* UART10: PB[12, 15] */
  32. outpw(REG_SYS_GPB_MFPH, (inpw(REG_SYS_GPB_MFPH) & 0x0000ffff) | 0x99990000);
  33. }
  34. static void nu_pin_emac_init(void)
  35. {
  36. /* EMAC0: PF[0, 9] */
  37. outpw(REG_SYS_GPF_MFPL, 0x11111111);
  38. outpw(REG_SYS_GPF_MFPH, (inpw(REG_SYS_GPF_MFPH) & 0xffffff00) | 0x00000011);
  39. /* EMAC1: PE[2, 11] */
  40. outpw(REG_SYS_GPE_MFPL, (inpw(REG_SYS_GPE_MFPL) & 0x000000ff) | 0x11111100);
  41. outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & 0xffff0000) | 0x00001111);
  42. }
  43. static void nu_pin_sdh_init(void)
  44. {
  45. /* SDH0: PD[0, 6] */
  46. outpw(REG_SYS_GPD_MFPL, (inpw(REG_SYS_GPD_MFPL) & 0xf0000000) | 0x06666666);
  47. }
  48. static void nu_pin_spi_init(void)
  49. {
  50. /* QSPI0: PB[6, 11] */
  51. outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0x00ffffff) | 0xbb000000);
  52. outpw(REG_SYS_GPB_MFPH, (inpw(REG_SYS_GPB_MFPH) & 0xffff0000) | 0x0000bbbb);
  53. }
  54. static void nu_pin_i2c_init(void)
  55. {
  56. /* I2C0: PG[0, 1] */
  57. outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0xffffff00) | 0x00000088);
  58. /* I2C1: PG[2, 3] */
  59. outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0xffff00ff) | 0x00008800);
  60. }
  61. static void nu_pin_pwm_init(void)
  62. {
  63. /* PWM0: PB2, LCD_PWM */
  64. outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xfffff0ff) | 0x00000d00);
  65. /* PWM1: PB3, Buzzer */
  66. outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xffff0fff) | 0x0000d000);
  67. }
  68. static void nu_pin_i2s_init(void)
  69. {
  70. /* I2S: PG[10, 14] */
  71. outpw(REG_SYS_GPG_MFPH, (inpw(REG_SYS_GPG_MFPH) & 0xf00000ff) | 0x08888800);
  72. }
  73. static void nu_pin_can_init(void)
  74. {
  75. /* CAN0: PI[3, 4] */
  76. outpw(REG_SYS_GPI_MFPL, (inpw(REG_SYS_GPI_MFPL) & 0xfff00fff) | 0x000cc000);
  77. }
  78. static void nu_pin_usbd_init(void)
  79. {
  80. /* USB0_VBUSVLD, PH0 */
  81. outpw(REG_SYS_GPH_MFPL, (inpw(REG_SYS_GPH_MFPL) & 0xfffffff0) | 0x00000007);
  82. }
  83. static void nu_pin_vpost_init(void)
  84. {
  85. /* CLK: PG6, HSYNC: PG7 */
  86. outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0x00ffffff) | 0x22000000);
  87. /* VSYNC: PG8, DEN: PG9 */
  88. outpw(REG_SYS_GPG_MFPH, (inpw(REG_SYS_GPG_MFPH) & 0xffffff00) | 0x00000022);
  89. /* DATA pin: 24bit RGB */
  90. /* PA[0, 7] */
  91. outpw(REG_SYS_GPA_MFPL, 0x22222222);
  92. /* PA[8, 15] */
  93. outpw(REG_SYS_GPA_MFPH, 0x22222222);
  94. #if (BSP_LCD_BPP==32)
  95. /* PD[8, 15 ] */
  96. outpw(REG_SYS_GPD_MFPH, 0x22222222);
  97. #endif
  98. }
  99. static void nu_pin_fmi_init(void)
  100. {
  101. /* select NAND function pins */
  102. if (inpw(REG_SYS_PWRON) & 0x08000000)
  103. {
  104. /* NAND: PI[0, 14] */
  105. outpw(REG_SYS_GPI_MFPL, 0x55555550);
  106. outpw(REG_SYS_GPI_MFPH, 0x55555555);
  107. }
  108. else
  109. {
  110. /* NAND: PC[0, 14] */
  111. outpw(REG_SYS_GPC_MFPL, 0x55555555);
  112. outpw(REG_SYS_GPC_MFPH, 0x05555555);
  113. }
  114. }
  115. static void nu_pin_usbh_init(void)
  116. {
  117. }
  118. void nu_pin_init(void)
  119. {
  120. nu_pin_uart_init();
  121. nu_pin_emac_init();
  122. nu_pin_sdh_init();
  123. nu_pin_spi_init();
  124. nu_pin_i2c_init();
  125. nu_pin_pwm_init();
  126. nu_pin_i2s_init();
  127. nu_pin_can_init();
  128. nu_pin_vpost_init();
  129. nu_pin_fmi_init();
  130. nu_pin_usbd_init();
  131. nu_pin_usbh_init();
  132. }
  133. void nu_pin_deinit(void)
  134. {
  135. }