board_dev.c 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236
  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-12-12 Wayne First version
  10. *
  11. ******************************************************************************/
  12. #include <rtconfig.h>
  13. #include <rtdevice.h>
  14. #if defined(BOARD_USING_STORAGE_SPIFLASH)
  15. #if defined(RT_USING_SFUD)
  16. #include "spi_flash.h"
  17. #include "spi_flash_sfud.h"
  18. #endif
  19. #include "drv_qspi.h"
  20. #define W25X_REG_READSTATUS (0x05)
  21. #define W25X_REG_READSTATUS2 (0x35)
  22. #define W25X_REG_WRITEENABLE (0x06)
  23. #define W25X_REG_WRITESTATUS (0x01)
  24. #define W25X_REG_QUADENABLE (0x02)
  25. static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
  26. {
  27. rt_uint8_t u8Val;
  28. rt_err_t result = RT_EOK;
  29. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
  30. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  31. RT_ASSERT(result > 0);
  32. return u8Val;
  33. }
  34. static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
  35. {
  36. rt_uint8_t u8Val;
  37. rt_err_t result = RT_EOK;
  38. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
  39. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  40. RT_ASSERT(result > 0);
  41. return u8Val;
  42. }
  43. static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
  44. {
  45. rt_uint8_t w25x_txCMD1;
  46. rt_uint8_t au8Val[2];
  47. rt_err_t result;
  48. struct rt_qspi_message qspi_message = {0};
  49. /* Enable WE */
  50. w25x_txCMD1 = W25X_REG_WRITEENABLE;
  51. result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
  52. if (result != sizeof(w25x_txCMD1))
  53. goto exit_SpiFlash_WriteStatusReg;
  54. /* Prepare status-1, 2 data */
  55. au8Val[0] = u8Value1;
  56. au8Val[1] = u8Value2;
  57. /* 1-bit mode: Instruction+payload */
  58. qspi_message.instruction.content = W25X_REG_WRITESTATUS;
  59. qspi_message.instruction.qspi_lines = 1;
  60. qspi_message.qspi_data_lines = 1;
  61. qspi_message.parent.cs_take = 1;
  62. qspi_message.parent.cs_release = 1;
  63. qspi_message.parent.send_buf = &au8Val[0];
  64. qspi_message.parent.length = sizeof(au8Val);
  65. qspi_message.parent.next = RT_NULL;
  66. if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
  67. {
  68. result = -RT_ERROR;
  69. }
  70. result = RT_EOK;
  71. exit_SpiFlash_WriteStatusReg:
  72. return result;
  73. }
  74. static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
  75. {
  76. volatile uint8_t u8ReturnValue;
  77. do
  78. {
  79. u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
  80. u8ReturnValue = u8ReturnValue & 1;
  81. }
  82. while (u8ReturnValue != 0); // check the BUSY bit
  83. }
  84. static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
  85. {
  86. rt_err_t result = RT_EOK;
  87. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  88. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  89. u8Status2 |= W25X_REG_QUADENABLE;
  90. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  91. RT_ASSERT(result == RT_EOK);
  92. SpiFlash_WaitReady(qspi_device);
  93. }
  94. static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
  95. {
  96. rt_err_t result = RT_EOK;
  97. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  98. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  99. u8Status2 &= ~W25X_REG_QUADENABLE;
  100. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  101. RT_ASSERT(result == RT_EOK);
  102. SpiFlash_WaitReady(qspi_device);
  103. }
  104. static int rt_hw_spiflash_init(void)
  105. {
  106. if (nu_qspi_bus_attach_device("qspi0", "qspi01", 2, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
  107. return -1;
  108. #if defined(RT_USING_SFUD)
  109. if (rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi01") == RT_NULL)
  110. {
  111. return -(RT_ERROR);
  112. }
  113. #endif
  114. return 0;
  115. }
  116. INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
  117. #endif
  118. #if defined(BOARD_USING_STORAGE_SPINAND) && defined(NU_PKG_USING_SPINAND)
  119. #include "drv_qspi.h"
  120. #include "spinand.h"
  121. struct rt_mtd_nand_device mtd_partitions[MTD_SPINAND_PARTITION_NUM] =
  122. {
  123. [0] =
  124. {
  125. .block_start = 0,
  126. .block_end = 23,
  127. .block_total = 24,
  128. },
  129. [1] =
  130. {
  131. .block_start = 24,
  132. .block_end = 1023,
  133. .block_total = 1000,
  134. },
  135. [2] =
  136. {
  137. .block_start = 0,
  138. .block_end = 1023,
  139. .block_total = 1024,
  140. }
  141. };
  142. static int rt_hw_spinand_init(void)
  143. {
  144. if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, RT_NULL, RT_NULL) != RT_EOK)
  145. return -1;
  146. if (rt_hw_mtd_spinand_register("qspi01") != RT_EOK)
  147. return -1;
  148. return 0;
  149. }
  150. INIT_COMPONENT_EXPORT(rt_hw_spinand_init);
  151. #endif
  152. #if defined(BOARD_USING_UART8_RS485)
  153. #include <drv_uart.h>
  154. #define NU_UART_DEVNAME "uart8"
  155. int test_rs485(int argc, char **argv)
  156. {
  157. rt_device_t serial;
  158. char txbuf[16];
  159. rt_err_t ret;
  160. int str_len;
  161. serial = rt_device_find(NU_UART_DEVNAME);
  162. if (!serial)
  163. {
  164. rt_kprintf("Can't find %s. EXIT.\n", NU_UART_DEVNAME);
  165. goto exit_test_rs485;
  166. }
  167. /* Interrupt RX */
  168. ret = rt_device_open(serial, RT_DEVICE_FLAG_INT_RX);
  169. RT_ASSERT(ret == RT_EOK);
  170. /* Nuvoton private command */
  171. nu_uart_set_rs485aud((struct rt_serial_device *)serial, RT_FALSE);
  172. rt_snprintf(&txbuf[0], sizeof(txbuf), "Hello World!\r\n");
  173. str_len = rt_strlen(txbuf);
  174. /* Say Hello */
  175. ret = rt_device_write(serial, 0, &txbuf[0], str_len);
  176. RT_ASSERT(ret == str_len);
  177. ret = rt_device_close(serial);
  178. RT_ASSERT(ret == RT_EOK);
  179. exit_test_rs485:
  180. return 0;
  181. }
  182. MSH_CMD_EXPORT(test_rs485, test rs485 communication);
  183. #endif //defined(BOARD_USING_UART8_RS485)