trap.c 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-07-20 Bernard first version
  9. * 2019-07-28 zdzn add smp support
  10. * 2019-08-09 zhangjun fixup the problem of smp startup and scheduling issues,
  11. * write addr to mailbox3 to startup smp, and we use mailbox0 for ipi
  12. */
  13. #include <rthw.h>
  14. #include <board.h>
  15. #include <rtthread.h>
  16. #include "armv7.h"
  17. extern struct rt_thread *rt_current_thread;
  18. #if defined(RT_USING_FINSH) && defined(MSH_USING_BUILT_IN_COMMANDS)
  19. extern long list_thread(void);
  20. #endif
  21. /**
  22. * this function will show registers of CPU
  23. *
  24. * @param regs the registers point
  25. */
  26. void rt_hw_show_register(struct rt_hw_exp_stack *regs)
  27. {
  28. rt_kprintf("Execption:\n");
  29. rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
  30. rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
  31. rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
  32. rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
  33. rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
  34. rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
  35. }
  36. /**
  37. * When comes across an instruction which it cannot handle,
  38. * it takes the undefined instruction trap.
  39. *
  40. * @param regs system registers
  41. *
  42. * @note never invoke this function in application
  43. */
  44. void rt_hw_trap_undef(struct rt_hw_exp_stack *regs)
  45. {
  46. rt_kprintf("undefined instruction:\n");
  47. rt_hw_show_register(regs);
  48. #if defined(RT_USING_FINSH) && defined(MSH_USING_BUILT_IN_COMMANDS)
  49. list_thread();
  50. #endif
  51. rt_hw_cpu_shutdown();
  52. }
  53. /**
  54. * The software interrupt instruction (SWI) is used for entering
  55. * Supervisor mode, usually to request a particular supervisor
  56. * function.
  57. *
  58. * @param regs system registers
  59. *
  60. * @note never invoke this function in application
  61. */
  62. void rt_hw_trap_swi(struct rt_hw_exp_stack *regs)
  63. {
  64. rt_kprintf("software interrupt:\n");
  65. rt_hw_show_register(regs);
  66. #if defined(RT_USING_FINSH) && defined(MSH_USING_BUILT_IN_COMMANDS)
  67. list_thread();
  68. #endif
  69. rt_hw_cpu_shutdown();
  70. }
  71. /**
  72. * An abort indicates that the current memory access cannot be completed,
  73. * which occurs during an instruction prefetch.
  74. *
  75. * @param regs system registers
  76. *
  77. * @note never invoke this function in application
  78. */
  79. void rt_hw_trap_pabt(struct rt_hw_exp_stack *regs)
  80. {
  81. rt_kprintf("prefetch abort:\n");
  82. rt_hw_show_register(regs);
  83. #if defined(RT_USING_FINSH) && defined(MSH_USING_BUILT_IN_COMMANDS)
  84. list_thread();
  85. #endif
  86. rt_hw_cpu_shutdown();
  87. }
  88. /**
  89. * An abort indicates that the current memory access cannot be completed,
  90. * which occurs during a data access.
  91. *
  92. * @param regs system registers
  93. *
  94. * @note never invoke this function in application
  95. */
  96. void rt_hw_trap_dabt(struct rt_hw_exp_stack *regs)
  97. {
  98. rt_kprintf("data abort:");
  99. rt_hw_show_register(regs);
  100. #if defined(RT_USING_FINSH) && defined(MSH_USING_BUILT_IN_COMMANDS)
  101. list_thread();
  102. #endif
  103. rt_hw_cpu_shutdown();
  104. }
  105. /**
  106. * Normally, system will never reach here
  107. *
  108. * @param regs system registers
  109. *
  110. * @note never invoke this function in application
  111. */
  112. void rt_hw_trap_resv(struct rt_hw_exp_stack *regs)
  113. {
  114. rt_kprintf("reserved trap:\n");
  115. rt_hw_show_register(regs);
  116. #if defined(RT_USING_FINSH) && defined(MSH_USING_BUILT_IN_COMMANDS)
  117. list_thread();
  118. #endif
  119. rt_hw_cpu_shutdown();
  120. }
  121. #ifdef RT_USING_CPU_FFS
  122. int __rt_ffs(int value)
  123. {
  124. int num = 0;
  125. if ((value & 0xffff) == 0)
  126. {
  127. num += 16;
  128. value >>= 16;
  129. }
  130. if ((value & 0xff) == 0)
  131. {
  132. num += 8;
  133. value >>= 8;
  134. }
  135. if ((value & 0xf) == 0)
  136. {
  137. num += 4;
  138. value >>= 4;
  139. }
  140. if ((value & 0x3) == 0)
  141. {
  142. num += 2;
  143. value >>= 2;
  144. }
  145. if ((value & 0x1) == 0)
  146. {
  147. num += 1;
  148. }
  149. return num;
  150. }
  151. #endif
  152. void rt_hw_trap_irq(void)
  153. {
  154. void *param;
  155. uint32_t irq;
  156. rt_isr_handler_t isr_func;
  157. extern struct rt_irq_desc isr_table[];
  158. uint32_t value = 0;
  159. value = IRQ_PEND_BASIC & 0x3ff;
  160. #ifdef RT_USING_SMP
  161. uint32_t mailbox_data;
  162. uint32_t cpu_id = rt_hw_cpu_id();
  163. uint32_t int_source = CORE_IRQSOURCE(cpu_id);
  164. mailbox_data = IPI_MAILBOX_CLEAR(cpu_id);
  165. if (int_source & 0x0f)
  166. {
  167. if (int_source & 0x08)
  168. {
  169. isr_func = isr_table[IRQ_ARM_TIMER].handler;
  170. #ifdef RT_USING_INTERRUPT_INFO
  171. isr_table[IRQ_ARM_TIMER].counter++;
  172. #endif
  173. if (isr_func)
  174. {
  175. param = isr_table[IRQ_ARM_TIMER].param;
  176. isr_func(IRQ_ARM_TIMER, param);
  177. }
  178. }
  179. }
  180. if (int_source & 0xf0)
  181. {
  182. /*it's a ipi interrupt*/
  183. if (mailbox_data & 0x1)
  184. {
  185. /* clear mailbox */
  186. IPI_MAILBOX_CLEAR(cpu_id) = mailbox_data;
  187. isr_func = isr_table[IRQ_ARM_MAILBOX].handler;
  188. #ifdef RT_USING_INTERRUPT_INFO
  189. isr_table[IRQ_ARM_MAILBOX].counter++;
  190. #endif
  191. if (isr_func)
  192. {
  193. param = isr_table[IRQ_ARM_MAILBOX].param;
  194. isr_func(IRQ_ARM_MAILBOX, param);
  195. }
  196. }
  197. else
  198. CORE_MAILBOX3_CLEAR(cpu_id) = mailbox_data;
  199. }
  200. #endif
  201. /* local interrupt*/
  202. if (value)
  203. {
  204. if (value & (1 << 8))
  205. {
  206. value = IRQ_PEND1;
  207. irq = __rt_ffs(value) - 1;
  208. }
  209. else if (value & (1 << 9))
  210. {
  211. value = IRQ_PEND2;
  212. irq = __rt_ffs(value) + 31;
  213. }
  214. else
  215. {
  216. value &= 0x0f;
  217. irq = __rt_ffs(value) + 63;
  218. }
  219. /* get interrupt service routine */
  220. isr_func = isr_table[irq].handler;
  221. #ifdef RT_USING_INTERRUPT_INFO
  222. isr_table[irq].counter++;
  223. #endif
  224. if (isr_func)
  225. {
  226. /* Interrupt for myself. */
  227. param = isr_table[irq].param;
  228. /* turn to interrupt service routine */
  229. isr_func(irq, param);
  230. }
  231. }
  232. }
  233. void rt_hw_trap_fiq(void)
  234. {
  235. }