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drv_uart.c 14 KB

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  1. /**
  2. * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. ******************************************************************************
  6. * @file drv_uart.c
  7. * @author Huibin Hong
  8. * @version V0.5
  9. * @date 10-Dec-2018
  10. * @brief serial driver
  11. *
  12. ******************************************************************************
  13. */
  14. #include <rthw.h>
  15. #include <rtdevice.h>
  16. #include <rtthread.h>
  17. #ifdef RT_USING_UART
  18. #include "hal_base.h"
  19. #include "hal_bsp.h"
  20. #include "drv_uart.h"
  21. #include "drv_clock.h"
  22. #ifdef RK_BSP_TEMP
  23. #include "drv_pm.h"
  24. #endif
  25. #include "board.h"
  26. /****************************************************************************
  27. * Private Types
  28. ****************************************************************************/
  29. struct rockchip_uart
  30. {
  31. const struct uart_board *uart_board;
  32. /* HAL */
  33. const struct HAL_UART_DEV *dev;
  34. /* irq handler */
  35. rt_isr_handler_t irq_handler;
  36. };
  37. static int rockchip_uart_irq(rt_serial_t *serial);
  38. #define DEFINE_ROCKCHIP_UART(ID) \
  39. static void rockchip_uart##ID##_irq(int irq, void *param); \
  40. static struct rt_serial_device serial##ID; \
  41. static struct rockchip_uart rk_uart##ID = \
  42. { \
  43. .uart_board = &g_uart##ID##_board, \
  44. .dev = &g_uart##ID##Dev, \
  45. .irq_handler = rockchip_uart##ID##_irq, \
  46. }; \
  47. static void rockchip_uart##ID##_irq(int irq, void *param) \
  48. { \
  49. rockchip_uart_irq(&serial##ID); \
  50. } \
  51. #if defined(RT_USING_UART0)
  52. DEFINE_ROCKCHIP_UART(0);
  53. #endif /* RT_USING_UART0 */
  54. #if defined(RT_USING_UART1)
  55. DEFINE_ROCKCHIP_UART(1);
  56. #endif /* RT_USING_UART1 */
  57. #if defined(RT_USING_UART2)
  58. DEFINE_ROCKCHIP_UART(2);
  59. #endif /* RT_USING_UART2 */
  60. #if defined(RT_USING_UART3)
  61. DEFINE_ROCKCHIP_UART(3);
  62. #endif /* RT_USING_UART3 */
  63. #if defined(RT_USING_UART4)
  64. DEFINE_ROCKCHIP_UART(4);
  65. #endif /* RT_USING_UART4 */
  66. #if defined(RT_USING_UART5)
  67. DEFINE_ROCKCHIP_UART(5);
  68. #endif /* RT_USING_UART5 */
  69. #if defined(RT_USING_UART6)
  70. DEFINE_ROCKCHIP_UART(6);
  71. #endif /* RT_USING_UART6 */
  72. #if defined(RT_USING_UART7)
  73. DEFINE_ROCKCHIP_UART(7);
  74. #endif /* RT_USING_UART7 */
  75. #if defined(RT_USING_UART8)
  76. DEFINE_ROCKCHIP_UART(8);
  77. #endif /* RT_USING_UART8 */
  78. #if defined(RT_USING_UART9)
  79. DEFINE_ROCKCHIP_UART(9);
  80. #endif /* RT_USING_UART9 */
  81. static struct rockchip_uart *rk_uart_table[] =
  82. {
  83. #if defined(RT_USING_UART0)
  84. &rk_uart0,
  85. #endif
  86. #if defined(RT_USING_UART1)
  87. &rk_uart1,
  88. #endif
  89. #if defined(RT_USING_UART2)
  90. &rk_uart2,
  91. #endif
  92. #if defined(RT_USING_UART3)
  93. &rk_uart3,
  94. #endif
  95. #if defined(RT_USING_UART4)
  96. &rk_uart4,
  97. #endif
  98. #if defined(RT_USING_UART5)
  99. &rk_uart5,
  100. #endif
  101. #if defined(RT_USING_UART6)
  102. &rk_uart6,
  103. #endif
  104. #if defined(RT_USING_UART7)
  105. &rk_uart7,
  106. #endif
  107. #if defined(RT_USING_UART8)
  108. &rk_uart8,
  109. #endif
  110. #if defined(RT_USING_UART9)
  111. &rk_uart9,
  112. #endif
  113. };
  114. static struct rt_serial_device *rt_serial_table[] =
  115. {
  116. #if defined(RT_USING_UART0)
  117. &serial0,
  118. #endif
  119. #if defined(RT_USING_UART1)
  120. &serial1,
  121. #endif
  122. #if defined(RT_USING_UART2)
  123. &serial2,
  124. #endif
  125. #if defined(RT_USING_UART3)
  126. &serial3,
  127. #endif
  128. #if defined(RT_USING_UART4)
  129. &serial4,
  130. #endif
  131. #if defined(RT_USING_UART5)
  132. &serial5,
  133. #endif
  134. #if defined(RT_USING_UART6)
  135. &serial6,
  136. #endif
  137. #if defined(RT_USING_UART7)
  138. &serial7,
  139. #endif
  140. #if defined(RT_USING_UART8)
  141. &serial8,
  142. #endif
  143. #if defined(RT_USING_UART9)
  144. &serial9,
  145. #endif
  146. };
  147. static int rockchip_uart_putc(rt_serial_t *serial, char c)
  148. {
  149. struct rockchip_uart *uart = RT_NULL;
  150. RT_ASSERT(serial != RT_NULL);
  151. uart = (struct rockchip_uart *)serial->parent.user_data;
  152. HAL_UART_SerialOutChar(uart->dev->pReg, c);
  153. return 1;
  154. }
  155. static int rockchip_uart_getc(rt_serial_t *serial)
  156. {
  157. rt_uint8_t c = 0;
  158. int ret = -1;
  159. struct rockchip_uart *uart = RT_NULL;
  160. RT_ASSERT(serial != RT_NULL);
  161. uart = (struct rockchip_uart *)serial->parent.user_data;
  162. ret = HAL_UART_SerialIn(uart->dev->pReg, &c, 1);
  163. if (ret <= 0)
  164. {
  165. return -1;
  166. }
  167. else
  168. {
  169. ret = c;
  170. return ret;
  171. }
  172. }
  173. int rt_hw_console_channel(void)
  174. {
  175. #if defined(RT_CONSOLE_DEVICE_NAME)
  176. #if defined(RT_USING_UART0)
  177. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart0"))
  178. return 0;
  179. #endif
  180. #if defined(RT_USING_UART1)
  181. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart1"))
  182. return 1;
  183. #endif
  184. #if defined(RT_USING_UART2)
  185. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart2"))
  186. return 2;
  187. #endif
  188. #if defined(RT_USING_UART3)
  189. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart3"))
  190. return 3;
  191. #endif
  192. #if defined(RT_USING_UART4)
  193. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart4"))
  194. return 4;
  195. #endif
  196. #if defined(RT_USING_UART5)
  197. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart5"))
  198. return 5;
  199. #endif
  200. #if defined(RT_USING_UART6)
  201. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart6"))
  202. return 6;
  203. #endif
  204. #if defined(RT_USING_UART7)
  205. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart7"))
  206. return 7;
  207. #endif
  208. #if defined(RT_USING_UART8)
  209. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart8"))
  210. return 8;
  211. #endif
  212. #if defined(RT_USING_UART9)
  213. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart9"))
  214. return 9;
  215. #endif
  216. #endif
  217. return -RT_EINVAL;
  218. }
  219. void rt_hw_console_output(const char *str)
  220. {
  221. struct rockchip_uart *uart = RT_NULL;
  222. #if defined(RT_CONSOLE_DEVICE_NAME)
  223. #if defined(RT_USING_UART0)
  224. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart0"))
  225. uart = &rk_uart0;
  226. #endif
  227. #if defined(RT_USING_UART1)
  228. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart1"))
  229. uart = &rk_uart1;
  230. #endif
  231. #if defined(RT_USING_UART2)
  232. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart2"))
  233. uart = &rk_uart2;
  234. #endif
  235. #if defined(RT_USING_UART3)
  236. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart3"))
  237. uart = &rk_uart3;
  238. #endif
  239. #if defined(RT_USING_UART4)
  240. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart4"))
  241. uart = &rk_uart4;
  242. #endif
  243. #if defined(RT_USING_UART5)
  244. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart5"))
  245. uart = &rk_uart5;
  246. #endif
  247. #if defined(RT_USING_UART6)
  248. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart6"))
  249. uart = &rk_uart6;
  250. #endif
  251. #if defined(RT_USING_UART7)
  252. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart7"))
  253. uart = &rk_uart7;
  254. #endif
  255. #if defined(RT_USING_UART8)
  256. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart8"))
  257. uart = &rk_uart8;
  258. #endif
  259. #if defined(RT_USING_UART9)
  260. if (!strcmp(RT_CONSOLE_DEVICE_NAME, "uart9"))
  261. uart = &rk_uart9;
  262. #endif
  263. #endif
  264. if (!uart)
  265. return;
  266. while (*str)
  267. {
  268. if (*str == '\n')
  269. HAL_UART_SerialOutChar(uart->dev->pReg, '\r');
  270. HAL_UART_SerialOutChar(uart->dev->pReg, *str);
  271. str++;
  272. }
  273. }
  274. static rt_err_t rockchip_uart_configure(rt_serial_t *serial, struct serial_configure *cfg)
  275. {
  276. struct rockchip_uart *uart = RT_NULL;
  277. struct HAL_UART_CONFIG hal_uart_config;
  278. const struct HAL_UART_DEV *dev;
  279. RT_ASSERT(serial != RT_NULL);
  280. uart = (struct rockchip_uart *)serial->parent.user_data;
  281. dev = uart->dev;
  282. if (cfg->stop_bits == STOP_BITS_1)
  283. hal_uart_config.stopBit = UART_ONE_STOPBIT;
  284. else if (cfg->stop_bits == STOP_BITS_2)
  285. hal_uart_config.stopBit = UART_ONE_AND_HALF_OR_TWO_STOPBIT;
  286. else
  287. rt_kprintf("STOP_BITS_3 and STOP_BITS_4 are not supported\n");
  288. if (cfg->parity == PARITY_ODD)
  289. hal_uart_config.parity = UART_ODD_PARITY;
  290. else if (cfg->parity == PARITY_EVEN)
  291. hal_uart_config.parity = UART_EVEN_PARITY;
  292. else
  293. hal_uart_config.parity = UART_PARITY_DISABLE;
  294. hal_uart_config.baudRate = cfg->baud_rate;
  295. hal_uart_config.dataBit = cfg->data_bits;
  296. HAL_UART_Init(dev, &hal_uart_config);
  297. #ifdef RK_BSP_TEMP
  298. if (dev->isAutoFlow && (cfg->flow_ctrl == RT_SERIAL_AUTO_FLOW_ENABLE))
  299. HAL_UART_EnableAutoFlowControl(dev->pReg);
  300. else
  301. HAL_UART_DisableAutoFlowControl(dev->pReg);
  302. #endif
  303. rt_hw_interrupt_umask(dev->irqNum);
  304. return RT_EOK;
  305. }
  306. static rt_err_t rockchip_uart_control(rt_serial_t *serial, int cmd, void *arg)
  307. {
  308. struct rockchip_uart *uart = RT_NULL;
  309. struct UART_REG *hw_base = RT_NULL;
  310. const struct HAL_UART_DEV *dev;
  311. rt_uint32_t flag = (rt_uint32_t)arg;
  312. RT_ASSERT(serial != RT_NULL);
  313. uart = (struct rockchip_uart *)serial->parent.user_data;
  314. hw_base = uart->dev->pReg;
  315. dev = uart->dev;
  316. switch (cmd)
  317. {
  318. case RT_DEVICE_CTRL_CLR_INT:
  319. if (flag == RT_DEVICE_FLAG_INT_RX)
  320. HAL_UART_DisableIrq(hw_base, UART_IER_RDI);
  321. else if (flag == RT_DEVICE_FLAG_INT_TX)
  322. HAL_UART_DisableIrq(hw_base, UART_IER_THRI);
  323. break;
  324. case RT_DEVICE_CTRL_SET_INT:
  325. if (flag == RT_DEVICE_FLAG_INT_RX)
  326. HAL_UART_EnableIrq(hw_base, UART_IER_RDI);
  327. else if (flag == RT_DEVICE_FLAG_INT_TX)
  328. HAL_UART_EnableIrq(hw_base, UART_IER_THRI);
  329. break;
  330. case RT_DEVICE_CTRL_CONFIG:
  331. if (flag == RT_DEVICE_FLAG_DMA_RX)
  332. HAL_UART_EnableIrq(hw_base, UART_IER_RDI);
  333. break;
  334. #ifdef RK_BSP_TEMP
  335. case RT_DEVICE_CTRL_HW_OPEN:
  336. clk_enable_by_id(dev->sclkGateID);
  337. break;
  338. case RT_DEVICE_CTRL_HW_CLOSE:
  339. clk_disable_by_id(dev->sclkGateID);
  340. break;
  341. #endif
  342. }
  343. return RT_EOK;
  344. }
  345. static int rockchip_uart_irq(rt_serial_t *serial)
  346. {
  347. rt_uint32_t iir = 0;
  348. struct rockchip_uart *uart = RT_NULL;
  349. struct UART_REG *hw_base = RT_NULL;
  350. RT_ASSERT(serial != RT_NULL);
  351. uart = (struct rockchip_uart *)serial->parent.user_data;
  352. hw_base = uart->dev->pReg;
  353. rt_interrupt_enter();
  354. iir = HAL_UART_GetIrqID(hw_base);
  355. switch (iir)
  356. {
  357. case UART_IIR_RDI:
  358. case UART_IIR_RX_TIMEOUT:
  359. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  360. break;
  361. case UART_IIR_THRI:
  362. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
  363. break;
  364. default:
  365. HAL_UART_HandleIrq(hw_base);
  366. break;
  367. }
  368. rt_interrupt_leave();
  369. return 0;
  370. }
  371. static const struct rt_uart_ops rockchip_uart_ops =
  372. {
  373. rockchip_uart_configure,
  374. rockchip_uart_control,
  375. rockchip_uart_putc,
  376. rockchip_uart_getc,
  377. };
  378. #ifdef RT_USING_PM
  379. static struct UART_SAVE_CONFIG pUartSave;
  380. static int rockchip_uart_suspend(const struct rt_device *device)
  381. {
  382. struct rockchip_uart *uart = RT_NULL;
  383. const struct HAL_UART_DEV *dev;
  384. RT_ASSERT(device != RT_NULL);
  385. uart = (struct rockchip_uart *)device->user_data;
  386. dev = uart->dev;
  387. rt_hw_interrupt_mask(dev->irqNum);
  388. HAL_UART_Suspend(dev->pReg, &pUartSave);
  389. clk_disable_by_id(dev->pclkGateID);
  390. clk_disable_by_id(dev->sclkGateID);
  391. return RT_EOK;
  392. }
  393. static void rockchip_uart_resume(const struct rt_device *device)
  394. {
  395. struct rockchip_uart *uart = RT_NULL;
  396. const struct HAL_UART_DEV *dev;
  397. RT_ASSERT(device != RT_NULL);
  398. uart = (struct rockchip_uart *)device->user_data;
  399. dev = uart->dev;
  400. clk_enable_by_id(dev->pclkGateID);
  401. clk_enable_by_id(dev->sclkGateID);
  402. HAL_UART_Reset(dev->pReg);
  403. HAL_UART_Resume(dev->pReg, &pUartSave);
  404. rt_hw_interrupt_umask(dev->irqNum);
  405. }
  406. static const struct rt_device_pm_ops rockchip_uart_pm_ops =
  407. {
  408. .suspend = rockchip_uart_suspend,
  409. .resume = rockchip_uart_resume,
  410. };
  411. int rockchip_rt_hw_uart_pm_register(void)
  412. {
  413. int i = 0;
  414. struct rockchip_uart *uart;
  415. struct rt_serial_device *serial;
  416. const struct uart_board *uart_board;
  417. for (i = 0; i < HAL_ARRAY_SIZE(rk_uart_table); i++)
  418. {
  419. uart = rk_uart_table[i];
  420. if (uart)
  421. {
  422. rt_bool_t is_console;
  423. uart_board = uart->uart_board;
  424. #ifdef RT_CONSOLE_DEVICE_NAME
  425. if (!strcmp(RT_CONSOLE_DEVICE_NAME, uart_board->name))
  426. is_console = true;
  427. else
  428. is_console = false;
  429. #else
  430. is_console = false;
  431. #endif
  432. serial = rt_serial_table[i];
  433. serial->ops = &rockchip_uart_ops;
  434. #ifdef RK_BSP_TEMP
  435. if (!is_console && !uart_board->en_irq_wake)
  436. rt_pm_register_device(&serial->parent, &rockchip_uart_pm_ops);
  437. #endif
  438. }
  439. }
  440. return 0;
  441. }
  442. INIT_PREV_EXPORT(rockchip_rt_hw_uart_pm_register);
  443. #endif
  444. void rt_hw_usart_init(void)
  445. {
  446. int i = 0;
  447. struct rockchip_uart *uart;
  448. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  449. struct rt_serial_device *serial;
  450. const struct HAL_UART_DEV *dev;
  451. const struct uart_board *uart_board;
  452. for (i = 0; i < HAL_ARRAY_SIZE(rk_uart_table); i++)
  453. {
  454. uart = rk_uart_table[i];
  455. if (uart)
  456. {
  457. rt_bool_t is_console; /* uart is used for console */
  458. dev = uart->dev;
  459. uart_board = uart->uart_board;
  460. if (uart_board->baud_rate)
  461. {
  462. config.baud_rate = uart_board->baud_rate;
  463. }
  464. #ifdef RT_CONSOLE_DEVICE_NAME
  465. if (!strcmp(RT_CONSOLE_DEVICE_NAME, uart_board->name))
  466. {
  467. is_console = true;
  468. }
  469. else
  470. {
  471. is_console = false;
  472. }
  473. #else
  474. is_console = false;
  475. #endif
  476. config.bufsz = uart_board->bufer_size;
  477. serial = rt_serial_table[i];
  478. serial->ops = &rockchip_uart_ops;
  479. serial->config = config;
  480. /* enable uart clk here */
  481. clk_enable_by_id(dev->pclkGateID);
  482. clk_enable_by_id(dev->sclkGateID);
  483. if (!is_console)
  484. HAL_UART_Reset(dev->pReg);
  485. /* register UARTx device */
  486. rt_hw_serial_register(serial, uart_board->name,
  487. uart_board->dev_flag, (void *)uart);
  488. /* enable interrupt */
  489. rt_hw_interrupt_install(dev->irqNum, uart->irq_handler,
  490. RT_NULL, uart_board->name);
  491. rt_hw_interrupt_mask(dev->irqNum);
  492. }
  493. }
  494. }
  495. #endif