smartfusion2_mddr_debug.sct 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354
  1. ;*******************************************************************************
  2. ; (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved.
  3. ; SmartFusion2 scatter file for debugging code executing in external MDDR.
  4. ;
  5. ; SVN $Revision: 7419 $
  6. ; SVN $Date: 2015-05-15 16:50:21 +0100 (Fri, 15 May 2015) $
  7. ;
  8. ; * Some current (April 2015) dev kit memory map possibilities are
  9. ; * --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
  10. ; * --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
  11. ; * --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
  12. ; * --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
  13. ; * --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
  14. ; * --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
  15. ; * --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
  16. ; * --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
  17. ; * --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
  18. ; * --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
  19. ; * --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
  20. ; * --Some older physical memory map possibilities are
  21. ; * --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
  22. ; * --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
  23. ; * --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
  24. ;
  25. ; Example linker scripts use lowest practicl values so will work accross dev kits
  26. ; eNVM=256KB eRAM=64KB External memory = 64MB
  27. ; Extern RAM 64M in total
  28. ; allocate 1/2 to progam, 1/2 to variable data
  29. RAM_LOAD 0x00000000 0x04000000
  30. {
  31. ; Total = 64MB (lowest common amount accross dev kits) 32MB - First half of external memory allocated to RO Code
  32. ER_RO 0x00000000 0x02000000
  33. {
  34. *.o (RESET, +First)
  35. *(InRoot$$Sections)
  36. .ANY (+RO)
  37. }
  38. ; Heap size is defined in startup_m2sxxx.s
  39. ; Heap will be added after RW data in ER_RW unless explicitly
  40. ; allocated a meemory region in .sct file
  41. ; Stack size is defined in startup_m2sxxx.s
  42. ; Stack will be added after heap in ER_RW unless explicitly
  43. ; allocated a memory region in .sct file as is the case below
  44. STACKS 0x20000000 UNINIT
  45. {
  46. startup_m2sxxx.o (STACK)
  47. }
  48. ; 32 MB- Second half of external memory allocated to RW data
  49. ER_RW 0xA2000000 0x02000000
  50. {
  51. .ANY (+RW +ZI)
  52. }
  53. }