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rt-thread
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bsp
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stm32
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libraries
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HAL_Drivers
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config
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f0
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dma_config.h

dma_config.h 1.9 KB
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  1. /*
    2. 

  2.  * Copyright (c) 2006-2021, RT-Thread Development Team
    3. 

  3.  *
    4. 

  4.  * SPDX-License-Identifier: Apache-2.0
    5. 

  5.  *
    6. 

  6.  * Change Logs:
    7. 

  7.  * Date           Author       Notes
    8. 

  8.  * 2018-01-05     zylx         first version
    9. 

  9.  * 2019-01-08     SummerGift   clean up the code
    10. 

  10.  */
    11. 

  11. 

  12. #ifndef __DMA_CONFIG_H__
    13. 

  13. #define __DMA_CONFIG_H__
    14. 

  14. 

  15. #include <rtthread.h>
    16. 

  16. 

  17. #ifdef __cplusplus
    18. 

  18. extern "C" {
    19. 

  19. #endif
    20. 

  20. 

  21. /* DMA1 channel1  */
    22. 

  22. 

  23. /* DMA1 channel2-3 DMA2 channel1-2 */
    24. 

  24. #if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
    25. 

  25. #define UART1_DMA_RX_IRQHandler          DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
    26. 

  26. #define UART1_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
    27. 

  27. #define UART1_RX_DMA_INSTANCE            DMA1_Channel3
    28. 

  28. #define UART1_RX_DMA_IRQ                 DMA1_Ch2_3_DMA2_Ch1_2_IRQn
    29. 

  29. #elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
    30. 

  30. #define SPI1_DMA_RX_TX_IRQHandler       DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
    31. 

  31. #define SPI1_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
    32. 

  32. #define SPI1_RX_DMA_INSTANCE            DMA1_Channel2
    33. 

  33. #define SPI1_RX_DMA_IRQ                 DMA1_Ch2_3_DMA2_Ch1_2_IRQn
    34. 

  34. #endif
    35. 

  35. 

  36. #if  defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
    37. 

  37. #define SPI1_DMA_RX_TX_IRQHandler       DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
    38. 

  38. #define SPI1_TX_DMA_RCC                 RCC_AHBENR_DMA1EN
    39. 

  39. #define SPI1_TX_DMA_INSTANCE            DMA1_Channel3
    40. 

  40. #define SPI1_TX_DMA_IRQ                 DMA1_Ch2_3_DMA2_Ch1_2_IRQn
    41. 

  41. #endif
    42. 

  42. /* DMA1 channel2-3 DMA2 channel1-2 */
    43. 

  43. 

  44. /* DMA1 channel4-7 DMA2 channel3-5 */
    45. 

  45. #if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
    46. 

  46. #define UART2_DMA_RX_IRQHandler          DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
    47. 

  47. #define UART2_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
    48. 

  48. #define UART2_RX_DMA_INSTANCE            DMA1_Channel5
    49. 

  49. #define UART2_RX_DMA_IRQ                 DMA1_Ch4_7_DMA2_Ch3_5_IRQn
    50. 

  50. #endif
    51. 

  51. /* DMA1 channel4-7 DMA2 channel3-5 */
    52. 

  52. 

  53. #ifdef __cplusplus
    54. 

  54. }
    55. 

  55. #endif
    56. 

  56. 

  57. #endif /* __DMA_CONFIG_H__ */
    58.