dma_config.h 4.4 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-06-20 thread-liu first version
  9. */
  10. #ifndef __DMA_CONFIG_H__
  11. #define __DMA_CONFIG_H__
  12. #include <rtthread.h>
  13. #ifdef __cplusplus
  14. extern "C" {
  15. #endif
  16. /* DMA1 stream0 */
  17. /* DMA1 stream1 */
  18. /* DMA1 stream2 */
  19. /* DMA1 stream3 */
  20. /* DMA1 stream4 */
  21. /* DMA1 stream5 */
  22. /* DMA1 stream6 */
  23. /* DMA1 stream7 */
  24. /* DMA2 stream0 */
  25. #if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
  26. #define UART3_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
  27. #define UART3_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  28. #define UART3_RX_DMA_INSTANCE DMA2_Stream0
  29. #define UART3_RX_DMA_CHANNEL DMA_REQUEST_USART3_RX
  30. #define UART3_RX_DMA_IRQ DMA2_Stream0_IRQn
  31. #elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
  32. #define SPI5_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
  33. #define SPI5_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  34. #define SPI5_RX_DMA_INSTANCE DMA2_Stream0
  35. #define SPI5_RX_DMA_CHANNEL DMA_REQUEST_SPI5_RX
  36. #define SPI5_RX_DMA_IRQ DMA2_Stream0_IRQn
  37. #endif
  38. /* DMA2 stream1 */
  39. #if defined(BSP_UART3_TX_USING_DMA) && !defined(BSP_UART3_TX_USING_INSTANCE)
  40. #define UART3_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler
  41. #define UART3_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  42. #define UART3_TX_DMA_INSTANCE DMA2_Stream1
  43. #define UART3_TX_DMA_CHANNEL DMA_REQUEST_USART3_TX
  44. #define UART3_TX_DMA_IRQ DMA2_Stream1_IRQn
  45. #elif defined(BSP_SPI5_TX_USING_DMA) && !defined(SPI5_TX_DMA_INSTANCE)
  46. #define SPI5_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler
  47. #define SPI5_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  48. #define SPI5_TX_DMA_INSTANCE DMA2_Stream1
  49. #define SPI5_TX_DMA_CHANNEL DMA_REQUEST_SPI5_TX
  50. #define SPI5_TX_DMA_IRQ DMA2_Stream1_IRQn
  51. #endif
  52. /* DMA2 stream2 */
  53. #if defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE)
  54. #define QSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler
  55. #define QSPI_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  56. #define QSPI_DMA_INSTANCE DMA2_Stream2
  57. #define QSPI_DMA_CHANNEL DMA_CHANNEL_11
  58. #define QSPI_DMA_IRQ DMA2_Stream2_IRQn
  59. #endif
  60. /* DMA2 stream3 */
  61. #if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE)
  62. #define UART4_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler
  63. #define UART4_RX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  64. #define UART4_RX_DMA_INSTANCE DMA2_Stream3
  65. #define UART4_RX_DMA_CHANNEL DMA_REQUEST_UART4_RX
  66. #define UART4_RX_DMA_IRQ DMA2_Stream3_IRQn
  67. #endif
  68. /* DMA2 stream4 */
  69. #if defined(BSP_UART4_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE)
  70. #define UART4_DMA_TX_IRQHandler DMA2_Stream4_IRQHandler
  71. #define UART4_TX_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  72. #define UART4_TX_DMA_INSTANCE DMA2_Stream4
  73. #define UART4_TX_DMA_CHANNEL DMA_REQUEST_UART4_TX
  74. #define UART4_TX_DMA_IRQ DMA2_Stream4_IRQn
  75. #endif
  76. /* DMA2 stream5 */
  77. #if defined(BSP_USING_CRYP) && !defined(CRYP2_OUT_DMA_INSTANCE)
  78. #define CRYP2_DMA_OUT_IRQHandler DMA2_Stream5_IRQHandler
  79. #define CRYP2_OUT_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  80. #define CRYP2_OUT_DMA_INSTANCE DMA2_Stream5
  81. #define CRYP2_OUT_DMA_CHANNEL DMA_REQUEST_CRYP2_OUT
  82. #define CRYP2_OUT_DMA_IRQ DMA2_Stream5_IRQn
  83. #endif
  84. /* DMA2 stream6 */
  85. #if defined(BSP_USING_CRYP) && !defined(CRYP2_IN_DMA_INSTANCE)
  86. #define CRYP2_DMA_IN_IRQHandler DMA2_Stream6_IRQHandler
  87. #define CRYP2_IN_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  88. #define CRYP2_IN_DMA_INSTANCE DMA2_Stream6
  89. #define CRYP2_IN_DMA_CHANNEL DMA_REQUEST_CRYP2_IN
  90. #define CRYP2_IN_DMA_IRQ DMA2_Stream6_IRQn
  91. #endif
  92. /* DMA2 stream7 */
  93. #if defined(BSP_USING_HASH) && !defined(HASH2_IN_DMA_INSTANCE)
  94. #define HASH2_DMA_IN_IRQHandler DMA2_Stream7_IRQHandler
  95. #define HASH2_IN_DMA_RCC RCC_MC_AHB2ENSETR_DMA2EN
  96. #define HASH2_IN_DMA_INSTANCE DMA2_Stream7
  97. #define HASH2_IN_DMA_CHANNEL DMA_REQUEST_HASH2_IN
  98. #define HASH2_IN_DMA_IRQ DMA2_Stream7_IRQn
  99. #endif
  100. #ifdef __cplusplus
  101. }
  102. #endif
  103. #endif /* __DMA_CONFIG_H__ */