board.c 2.0 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-11-06 SummerGift first version
  9. */
  10. #include "board.h"
  11. void SystemClock_Config(void)
  12. {
  13. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  14. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  15. /** Configure the main internal regulator output voltage
  16. */
  17. if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK)
  18. {
  19. Error_Handler();
  20. }
  21. /** Configure LSE Drive Capability
  22. */
  23. HAL_PWR_EnableBkUpAccess();
  24. __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
  25. /** Initializes the RCC Oscillators according to the specified parameters
  26. * in the RCC_OscInitTypeDef structure.
  27. */
  28. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_LSE
  29. |RCC_OSCILLATORTYPE_MSI;
  30. RCC_OscInitStruct.LSEState = RCC_LSE_ON;
  31. RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
  32. RCC_OscInitStruct.MSIState = RCC_MSI_ON;
  33. RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
  34. RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
  35. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  36. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
  37. RCC_OscInitStruct.PLL.PLLM = 1;
  38. RCC_OscInitStruct.PLL.PLLN = 55;
  39. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
  40. RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
  41. RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
  42. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  43. {
  44. Error_Handler();
  45. }
  46. /** Initializes the CPU, AHB and APB buses clocks
  47. */
  48. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  49. |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  50. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  51. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  52. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  53. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  54. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
  55. {
  56. Error_Handler();
  57. }
  58. }