system_stm32mp1xx.c 8.8 KB

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  1. /**
  2. ******************************************************************************
  3. * @file system_stm32mp1xx.c
  4. * @author MCD Application Team
  5. * @brief CMSIS Cortex Device Peripheral Access Layer System Source File.
  6. *
  7. * This file provides two functions and one global variable to be called from
  8. * user application:
  9. * - SystemInit(): This function is called at startup just after reset and
  10. * before branch to main program. This call is made inside
  11. * the "startup_stm32mp1xx.s" file.
  12. *
  13. * - SystemCoreClock variable: Contains the core clock frequency, it can
  14. * be used by the user application to setup
  15. * the SysTick timer or configure other
  16. * parameters.
  17. *
  18. * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
  19. * be called whenever the core clock is changed
  20. * during program execution.
  21. *
  22. *
  23. ******************************************************************************
  24. *
  25. * @attention
  26. *
  27. * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  28. * All rights reserved.</center></h2>
  29. *
  30. * This software component is licensed by ST under BSD 3-Clause license,
  31. * the "License"; You may not use this file except in compliance with the
  32. * License. You may obtain a copy of the License at:
  33. * opensource.org/licenses/BSD-3-Clause
  34. *
  35. *
  36. ******************************************************************************
  37. */
  38. /** @addtogroup CMSIS
  39. * @{
  40. */
  41. /** @addtogroup stm32mp1xx_system
  42. * @{
  43. */
  44. /** @addtogroup STM32MP1xx_System_Private_Includes
  45. * @{
  46. */
  47. #include "stm32mp1xx_hal.h"
  48. /**
  49. * @}
  50. */
  51. /** @addtogroup STM32MP1xx_System_Private_TypesDefinitions
  52. * @{
  53. */
  54. /**
  55. * @}
  56. */
  57. /** @addtogroup STM32MP1xx_System_Private_Defines
  58. * @{
  59. */
  60. /************************* Miscellaneous Configuration ************************/
  61. /*!< Uncomment the following line if you need to use external SRAM mounted
  62. on EVAL board as data memory */
  63. /* #define DATA_IN_ExtSRAM */
  64. /*!< Uncomment the following line if you need to relocate your vector Table in
  65. Internal SRAM. */
  66. /* #define VECT_TAB_SRAM */
  67. #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
  68. This value must be a multiple of 0x400. */
  69. /******************************************************************************/
  70. /**
  71. * @}
  72. */
  73. /** @addtogroup STM32MP1xx_System_Private_Macros
  74. * @{
  75. */
  76. /**
  77. * @}
  78. */
  79. /** @addtogroup STM32MP1xx_System_Private_Variables
  80. * @{
  81. */
  82. /* This variable is updated in three ways:
  83. 1) by calling CMSIS function SystemCoreClockUpdate()
  84. 2) each time HAL_RCC_ClockConfig() is called to configure the system clock
  85. frequency
  86. Note: If you use this function to configure the system clock;
  87. then there is no need to call the first functions listed above,
  88. since SystemCoreClock variable is updated automatically.
  89. */
  90. uint32_t SystemCoreClock = HSI_VALUE;
  91. /**
  92. * @}
  93. */
  94. /** @addtogroup STM32MP1xx_System_Private_FunctionPrototypes
  95. * @{
  96. */
  97. #if defined (DATA_IN_ExtSRAM)
  98. static void SystemInit_ExtMemCtl(void);
  99. #endif /* DATA_IN_ExtSRAM */
  100. /**
  101. * @}
  102. */
  103. /** @addtogroup STM32MP1xx_System_Private_Functions
  104. * @{
  105. */
  106. /**
  107. * @brief Setup the microcontroller system
  108. * Initialize the FPU setting, vector table location and External memory
  109. * configuration.
  110. * @param None
  111. * @retval None
  112. */
  113. void SystemInit (void)
  114. {
  115. /* FPU settings ------------------------------------------------------------*/
  116. #if defined (CORE_CM4)
  117. #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
  118. SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
  119. #endif
  120. /* Configure the Vector Table location add offset address ------------------*/
  121. #if defined (VECT_TAB_SRAM)
  122. SCB->VTOR = MCU_AHB_SRAM | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
  123. #endif
  124. /* Disable all interrupts and events */
  125. CLEAR_REG(EXTI_C2->IMR1);
  126. CLEAR_REG(EXTI_C2->IMR2);
  127. CLEAR_REG(EXTI_C2->IMR3);
  128. CLEAR_REG(EXTI_C2->EMR1);
  129. CLEAR_REG(EXTI_C2->EMR2);
  130. CLEAR_REG(EXTI_C2->EMR3);
  131. #else
  132. #error Please #define CORE_CM4
  133. #endif
  134. }
  135. /**
  136. * @brief Update SystemCoreClock variable according to Clock Register Values.
  137. * The SystemCoreClock variable contains the core clock frequency (Hz),
  138. * it can be used by the user application to setup the SysTick timer or
  139. * configure other parameters.
  140. *
  141. * @note Each time the core clock changes, this function must be called to
  142. * update SystemCoreClock variable value. Otherwise, any configuration
  143. * based on this variable will be incorrect.
  144. *
  145. * @note - The system frequency computed by this function is not the real
  146. * frequency in the chip. It is calculated based on the predefined
  147. * constant and the selected clock source:
  148. *
  149. * - If SYSCLK source is HSI, SystemCoreClock will contain the
  150. * HSI_VALUE(*)
  151. *
  152. * - If SYSCLK source is HSE, SystemCoreClock will contain the
  153. * HSE_VALUE(**)
  154. *
  155. * - If SYSCLK source is CSI, SystemCoreClock will contain the
  156. * CSI_VALUE(***)
  157. *
  158. * - If SYSCLK source is PLL3_P, SystemCoreClock will contain the
  159. * HSI_VALUE(*) or the HSE_VALUE(*) or the CSI_VALUE(***)
  160. * multiplied/divided by the PLL3 factors.
  161. *
  162. * (*) HSI_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
  163. * (default value 64 MHz) but the real value may vary depending
  164. * on the variations in voltage and temperature.
  165. *
  166. * (**) HSE_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
  167. * (default value 24 MHz), user has to ensure that HSE_VALUE is
  168. * same as the real frequency of the crystal used. Otherwise, this
  169. * function may have wrong result.
  170. *
  171. * (***) CSI_VALUE is a constant defined in stm32mp1xx_hal_conf.h file
  172. * (default value 4 MHz)but the real value may vary depending
  173. * on the variations in voltage and temperature.
  174. *
  175. * - The result of this function could be not correct when using
  176. * fractional value for HSE crystal.
  177. *
  178. * @param None
  179. * @retval None
  180. */
  181. void SystemCoreClockUpdate (void)
  182. {
  183. uint32_t pllsource, pll3m, pll3fracen;
  184. float fracn1, pll3vco;
  185. switch (RCC->MSSCKSELR & RCC_MSSCKSELR_MCUSSRC)
  186. {
  187. case 0x00: /* HSI used as system clock source */
  188. SystemCoreClock = (HSI_VALUE >> (RCC->HSICFGR & RCC_HSICFGR_HSIDIV));
  189. break;
  190. case 0x01: /* HSE used as system clock source */
  191. SystemCoreClock = HSE_VALUE;
  192. break;
  193. case 0x02: /* CSI used as system clock source */
  194. SystemCoreClock = CSI_VALUE;
  195. break;
  196. case 0x03: /* PLL3_P used as system clock source */
  197. pllsource = (RCC->RCK3SELR & RCC_RCK3SELR_PLL3SRC);
  198. pll3m = ((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVM3) >> RCC_PLL3CFGR1_DIVM3_Pos) + 1U;
  199. pll3fracen = (RCC->PLL3FRACR & RCC_PLL3FRACR_FRACLE) >> 16U;
  200. fracn1 = (float)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACV) >> 3U));
  201. pll3vco = (float)((float)((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVN) + 1U) + (fracn1 / (float) 0x1FFF));
  202. if (pll3m != 0U)
  203. {
  204. switch (pllsource)
  205. {
  206. case 0x00: /* HSI used as PLL clock source */
  207. pll3vco *= (float)((HSI_VALUE >> (RCC->HSICFGR & RCC_HSICFGR_HSIDIV)) / pll3m);
  208. break;
  209. case 0x01: /* HSE used as PLL clock source */
  210. pll3vco *= (float)(HSE_VALUE / pll3m);
  211. break;
  212. case 0x02: /* CSI used as PLL clock source */
  213. pll3vco *= (float)(CSI_VALUE / pll3m);
  214. break;
  215. case 0x03: /* No clock source for PLL */
  216. pll3vco = 0;
  217. break;
  218. }
  219. SystemCoreClock = (uint32_t)(pll3vco/ ((float)((RCC->PLL3CFGR2 & RCC_PLL3CFGR2_DIVP) + 1U)));
  220. }
  221. else
  222. {
  223. SystemCoreClock = 0U;
  224. }
  225. break;
  226. }
  227. /* Compute mcu_ck */
  228. SystemCoreClock = SystemCoreClock >> (RCC->MCUDIVR & RCC_MCUDIVR_MCUDIV);
  229. }
  230. #ifdef DATA_IN_ExtSRAM
  231. /**
  232. * @brief Setup the external memory controller.
  233. * Called in startup_stm32mp15xx.s before jump to main.
  234. * This function configures the external SRAM mounted on Eval boards
  235. * This SRAM will be used as program data memory (including heap and stack).
  236. * @param None
  237. * @retval None
  238. */
  239. void SystemInit_ExtMemCtl(void)
  240. {
  241. }
  242. #endif /* DATA_IN_ExtSRAM */
  243. /**
  244. * @}
  245. */
  246. /**
  247. * @}
  248. */
  249. /**
  250. * @}
  251. */
  252. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/