drv_emmc.c 14 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-07-16 thread-liu first version
  9. */
  10. #include "board.h"
  11. #include "drv_emmc.h"
  12. #include <dfs_fs.h>
  13. #ifdef BSP_USING_EMMC
  14. //#define DRV_DEBUG
  15. //#define EMMC_RX_DUMP
  16. //#define EMMC_TX_DUMP
  17. #define DBG_TAG "drv.emmc"
  18. #ifdef DRV_DEBUG
  19. #define DBG_LVL DBG_LOG
  20. #else
  21. #define DBG_LVL DBG_INFO
  22. #endif /* DRV_DEBUG */
  23. #include <rtdbg.h>
  24. static SD_HandleTypeDef hsd;
  25. static struct rt_mmcsd_host *host;
  26. #define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (100000)
  27. #define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER)
  28. #define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&_sdio->mutex);
  29. struct sdio_pkg
  30. {
  31. struct rt_mmcsd_cmd *cmd;
  32. void *buff;
  33. rt_uint32_t flag;
  34. };
  35. struct rthw_sdio
  36. {
  37. struct rt_mmcsd_host *host;
  38. struct stm32_sdio_des sdio_des;
  39. struct rt_event event;
  40. struct rt_mutex mutex;
  41. struct sdio_pkg *pkg;
  42. };
  43. #define EMMC_BUFF_SIZE 4096
  44. #define EMMC_BUFF_ADDR 0x2FFCB000
  45. #if defined(__ARMCC_VERSION)
  46. __attribute__((at(EMMC_BUFF_ADDR))) static rt_uint8_t cache_buf[EMMC_BUFF_SIZE];
  47. #elif defined ( __GNUC__ )
  48. static rt_uint8_t cache_buf[EMMC_BUFF_SIZE] __attribute__((section(".eMMCSection")));
  49. #elif defined(__ICCARM__)
  50. #pragma location = EMMC_BUFF_ADDR
  51. __no_init static rt_uint8_t cache_buf[EMMC_BUFF_SIZE];
  52. #endif
  53. #if defined(EMMC_RX_DUMP) || defined(EMMC_TX_DUMP)
  54. #define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
  55. static void dump_hex(const rt_uint8_t *ptr, rt_size_t buflen)
  56. {
  57. unsigned char *buf = (unsigned char *)ptr;
  58. int i, j;
  59. for (i = 0; i < buflen; i += 16)
  60. {
  61. rt_kprintf("%08X: ", i);
  62. for (j = 0; j < 16; j++)
  63. if (i + j < buflen)
  64. rt_kprintf("%02X ", buf[i + j]);
  65. else
  66. rt_kprintf(" ");
  67. rt_kprintf(" ");
  68. for (j = 0; j < 16; j++)
  69. if (i + j < buflen)
  70. rt_kprintf("%c", __is_print(buf[i + j]) ? buf[i + j] : '.');
  71. rt_kprintf("\n");
  72. }
  73. }
  74. #endif
  75. /**
  76. * @brief This function get order from sdio.
  77. * @param data
  78. * @retval sdio order
  79. */
  80. static int get_order(rt_uint32_t data)
  81. {
  82. int order = 0;
  83. switch (data)
  84. {
  85. case 1:
  86. order = 0;
  87. break;
  88. case 2:
  89. order = 1;
  90. break;
  91. case 4:
  92. order = 2;
  93. break;
  94. case 8:
  95. order = 3;
  96. break;
  97. case 16:
  98. order = 4;
  99. break;
  100. case 32:
  101. order = 5;
  102. break;
  103. case 64:
  104. order = 6;
  105. break;
  106. case 128:
  107. order = 7;
  108. break;
  109. case 256:
  110. order = 8;
  111. break;
  112. case 512:
  113. order = 9;
  114. break;
  115. case 1024:
  116. order = 10;
  117. break;
  118. case 2048:
  119. order = 11;
  120. break;
  121. case 4096:
  122. order = 12;
  123. break;
  124. case 8192:
  125. order = 13;
  126. break;
  127. case 16384:
  128. order = 14;
  129. break;
  130. default :
  131. order = 0;
  132. break;
  133. }
  134. return order;
  135. }
  136. /**
  137. * @brief This function wait sdio cmd completed.
  138. * @param sdio rthw_sdio
  139. * @retval None
  140. */
  141. static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
  142. {
  143. rt_uint32_t status;
  144. struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
  145. struct rt_mmcsd_data *data = cmd->data;
  146. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  147. if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
  148. rt_tick_from_millisecond(5000), &status) != RT_EOK)
  149. {
  150. LOG_E("wait cmd completed timeout");
  151. cmd->err = -RT_ETIMEOUT;
  152. return;
  153. }
  154. if (sdio->pkg == RT_NULL)
  155. {
  156. return;
  157. }
  158. cmd->resp[0] = hw_sdio->resp1;
  159. cmd->resp[1] = hw_sdio->resp2;
  160. cmd->resp[2] = hw_sdio->resp3;
  161. cmd->resp[3] = hw_sdio->resp4;
  162. if (status & SDMMC_ERRORS)
  163. {
  164. if ((status & SDMMC_STA_CCRCFAIL) && (resp_type(cmd) & (RESP_R3 | RESP_R4)))
  165. {
  166. cmd->err = RT_EOK;
  167. }
  168. else
  169. {
  170. cmd->err = -RT_ERROR;
  171. }
  172. if (status & SDMMC_STA_CTIMEOUT)
  173. {
  174. cmd->err = -RT_ETIMEOUT;
  175. }
  176. if (status & SDMMC_STA_DCRCFAIL)
  177. {
  178. data->err = -RT_ERROR;
  179. }
  180. if (status & SDMMC_STA_DTIMEOUT)
  181. {
  182. data->err = -RT_ETIMEOUT;
  183. }
  184. if (cmd->err == RT_EOK)
  185. {
  186. LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
  187. }
  188. else
  189. {
  190. LOG_D("err:0x%08x, %s%s%s%s%s%s%s cmd:%d arg:0x%08x rw:%c len:%d blksize:%d",
  191. status,
  192. status & SDMMC_STA_CCRCFAIL ? "CCRCFAIL " : "",
  193. status & SDMMC_STA_DCRCFAIL ? "DCRCFAIL " : "",
  194. status & SDMMC_STA_CTIMEOUT ? "CTIMEOUT " : "",
  195. status & SDMMC_STA_DTIMEOUT ? "DTIMEOUT " : "",
  196. status & SDMMC_STA_TXUNDERR ? "TXUNDERR " : "",
  197. status & SDMMC_STA_RXOVERR ? "RXOVERR " : "",
  198. status == 0 ? "NULL" : "",
  199. cmd->cmd_code,
  200. cmd->arg,
  201. data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
  202. data ? data->blks * data->blksize : 0,
  203. data ? data->blksize : 0
  204. );
  205. }
  206. }
  207. else
  208. {
  209. cmd->err = RT_EOK;
  210. LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
  211. }
  212. }
  213. /**
  214. * @brief This function send command.
  215. * @param sdio rthw_sdio
  216. * @param pkg sdio package
  217. * @retval None
  218. */
  219. static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
  220. {
  221. struct rt_mmcsd_cmd *cmd = pkg->cmd;
  222. struct rt_mmcsd_data *data = cmd->data;
  223. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  224. rt_uint32_t reg_cmd;
  225. sdio->pkg = pkg;
  226. LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d\n",
  227. cmd->cmd_code,
  228. cmd->arg,
  229. resp_type(cmd) == RESP_NONE ? "NONE" : "",
  230. resp_type(cmd) == RESP_R1 ? "R1" : "",
  231. resp_type(cmd) == RESP_R1B ? "R1B" : "",
  232. resp_type(cmd) == RESP_R2 ? "R2" : "",
  233. resp_type(cmd) == RESP_R3 ? "R3" : "",
  234. resp_type(cmd) == RESP_R4 ? "R4" : "",
  235. resp_type(cmd) == RESP_R5 ? "R5" : "",
  236. resp_type(cmd) == RESP_R6 ? "R6" : "",
  237. resp_type(cmd) == RESP_R7 ? "R7" : "",
  238. data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
  239. data ? data->blks * data->blksize : 0,
  240. data ? data->blksize : 0
  241. );
  242. /* config cmd reg */
  243. reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN;
  244. if (resp_type(cmd) == RESP_NONE)
  245. {
  246. reg_cmd |= SDMMC_RESPONSE_NO;
  247. }
  248. else if (resp_type(cmd) == RESP_R2)
  249. {
  250. reg_cmd |= SDMMC_RESPONSE_LONG;
  251. }
  252. else
  253. {
  254. reg_cmd |= SDMMC_RESPONSE_SHORT;
  255. }
  256. hw_sdio->mask |= SDIO_MASKR_ALL;
  257. /* data pre configuration */
  258. if (data != RT_NULL)
  259. {
  260. hw_sdio->dctrl = 0;
  261. hw_sdio->mask &= ~(SDMMC_MASK_CMDRENDIE | SDMMC_MASK_CMDSENTIE);
  262. reg_cmd |= SDMMC_CMD_CMDTRANS;
  263. hw_sdio->dtimer = HW_SDIO_DATATIMEOUT;
  264. hw_sdio->dlen = data->blks * data->blksize;
  265. hw_sdio->dctrl = (get_order(data->blksize)<<4) | (data->flags & DATA_DIR_READ ? SDMMC_DCTRL_DTDIR : 0);
  266. hw_sdio->idmabase0r = (rt_uint32_t)cache_buf;
  267. hw_sdio->idmatrlr = SDMMC_ENABLE_IDMA_SINGLE_BUFF;
  268. }
  269. hw_sdio->arg = cmd->arg;
  270. hw_sdio->cmd = reg_cmd;
  271. /* wait completed */
  272. rthw_sdio_wait_completed(sdio);
  273. /* Waiting for data to be sent to completion */
  274. if (data != RT_NULL)
  275. {
  276. volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS;
  277. while (count && (hw_sdio->sta & SDMMC_STA_DPSMACT))
  278. {
  279. count--;
  280. }
  281. if ((count == 0) || (hw_sdio->sta & SDMMC_ERRORS))
  282. {
  283. cmd->err = -RT_ERROR;
  284. }
  285. }
  286. /* data post configuration */
  287. if (data != RT_NULL)
  288. {
  289. if (data->flags & DATA_DIR_READ)
  290. {
  291. #if defined(EMMC_RX_DUMP)
  292. rt_kprintf("\nEMMC Rx:\n");
  293. dump_hex(cache_buf, data->blks * data->blksize);
  294. #endif
  295. rt_memcpy(data->buf, cache_buf, data->blks * data->blksize);
  296. }
  297. }
  298. }
  299. /**
  300. * @brief This function send sdio request.
  301. * @param sdio rthw_sdio
  302. * @param req request
  303. * @retval None
  304. */
  305. static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  306. {
  307. struct sdio_pkg pkg;
  308. struct rthw_sdio *sdio = host->private_data;
  309. struct rt_mmcsd_data *data;
  310. RTHW_SDIO_LOCK(sdio);
  311. if (req->cmd != RT_NULL)
  312. {
  313. rt_memset(&pkg, 0, sizeof(pkg));
  314. data = req->cmd->data;
  315. pkg.cmd = req->cmd;
  316. if (data != RT_NULL)
  317. {
  318. rt_uint32_t size = data->blks * data->blksize;
  319. RT_ASSERT(size <= SDIO_BUFF_SIZE);
  320. if (data->flags & DATA_DIR_WRITE)
  321. {
  322. #if defined(EMMC_TX_DUMP)
  323. rt_kprintf("\nEMMC Tx:\n");
  324. dump_hex(cache_buf, data->blks * data->blksize);
  325. #endif
  326. rt_memcpy(cache_buf, data->buf, size);
  327. }
  328. }
  329. rthw_sdio_send_command(sdio, &pkg);
  330. }
  331. if (req->stop != RT_NULL)
  332. {
  333. rt_memset(&pkg, 0, sizeof(pkg));
  334. pkg.cmd = req->stop;
  335. rthw_sdio_send_command(sdio, &pkg);
  336. }
  337. RTHW_SDIO_UNLOCK(sdio);
  338. mmcsd_req_complete(sdio->host);
  339. }
  340. /**
  341. * @brief This function interrupt process function.
  342. * @param host rt_mmcsd_host
  343. * @retval None
  344. */
  345. void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
  346. {
  347. struct rthw_sdio *sdio = host->private_data;
  348. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  349. rt_uint32_t intstatus = hw_sdio->sta;
  350. /* clear irq flag*/
  351. hw_sdio->icr = intstatus;
  352. rt_event_send(&sdio->event, intstatus);
  353. }
  354. /**
  355. * @brief This function config sdio.
  356. * @param host rt_mmcsd_host
  357. * @param io_cfg rt_mmcsd_io_cfg
  358. * @retval None
  359. */
  360. static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
  361. {
  362. rt_uint32_t temp, clk_src;
  363. rt_uint32_t clk = io_cfg->clock;
  364. struct rthw_sdio *sdio = host->private_data;
  365. struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
  366. LOG_D("clk:%dK width:%s%s%s power:%s%s%s",
  367. clk/1000,
  368. io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
  369. io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
  370. io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
  371. io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
  372. io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
  373. io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
  374. );
  375. RTHW_SDIO_LOCK(sdio);
  376. clk_src = EMMC_CLOCK_FREQ;
  377. if (clk > 0)
  378. {
  379. if (clk > host->freq_max)
  380. {
  381. clk = host->freq_max;
  382. }
  383. temp = DIV_ROUND_UP(clk_src, 2 * clk);
  384. if (temp > 0x3FF)
  385. {
  386. temp = 0x3FF;
  387. }
  388. }
  389. if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
  390. {
  391. temp |= SDMMC_BUS_WIDE_8B;
  392. }
  393. else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
  394. {
  395. temp |= SDMMC_BUS_WIDE_4B;
  396. }
  397. else
  398. {
  399. temp |= SDMMC_BUS_WIDE_1B;
  400. }
  401. hw_sdio->clkcr = temp;
  402. if (io_cfg->power_mode == MMCSD_POWER_ON)
  403. hw_sdio->power |= SDMMC_POWER_PWRCTRL;
  404. RTHW_SDIO_UNLOCK(sdio);
  405. }
  406. static const struct rt_mmcsd_host_ops ops =
  407. {
  408. rthw_sdio_request,
  409. rthw_sdio_iocfg,
  410. RT_NULL,
  411. RT_NULL,
  412. };
  413. /**
  414. * @brief This function create mmcsd host.
  415. * @param sdio_des stm32_sdio_des
  416. * @retval rt_mmcsd_host
  417. */
  418. struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
  419. {
  420. struct rt_mmcsd_host *host;
  421. struct rthw_sdio *sdio = RT_NULL;
  422. if (sdio_des == RT_NULL)
  423. {
  424. return RT_NULL;
  425. }
  426. sdio = rt_malloc(sizeof(struct rthw_sdio));
  427. if (sdio == RT_NULL)
  428. {
  429. LOG_E("malloc rthw_sdio fail");
  430. return RT_NULL;
  431. }
  432. rt_memset(sdio, 0, sizeof(struct rthw_sdio));
  433. host = mmcsd_alloc_host();
  434. if (host == RT_NULL)
  435. {
  436. LOG_E("alloc host fail");
  437. goto err;
  438. }
  439. rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des));
  440. sdio->sdio_des.hw_sdio = (struct stm32_sdio *)EMMC_BASE_ADDRESS;
  441. rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
  442. rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_PRIO);
  443. /* set host default attributes */
  444. host->ops = &ops;
  445. host->freq_min = 400 * 1000;
  446. host->freq_max = EMMC_MAX_FREQ;
  447. host->valid_ocr = 0X00FFFF80; /* The voltage range supported is 1.65v-3.6v */
  448. host->flags = MMCSD_BUSWIDTH_8 | MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED;
  449. host->max_seg_size = SDIO_BUFF_SIZE;
  450. host->max_dma_segs = 1;
  451. host->max_blk_size = 512;
  452. host->max_blk_count = 512;
  453. /* link up host and sdio */
  454. sdio->host = host;
  455. host->private_data = sdio;
  456. /* ready to change */
  457. mmcsd_change(host);
  458. return host;
  459. err:
  460. if (sdio)
  461. {
  462. rt_free(sdio);
  463. }
  464. return RT_NULL;
  465. }
  466. void SDMMC2_IRQHandler(void)
  467. {
  468. rt_interrupt_enter();
  469. /* Process All SDIO Interrupt Sources */
  470. rthw_sdio_irq_process(host);
  471. rt_interrupt_leave();
  472. }
  473. int rt_hw_sdio_init(void)
  474. {
  475. struct stm32_sdio_des sdio_des;
  476. hsd.Instance = SDMMC2;
  477. HAL_SD_MspInit(&hsd);
  478. host = sdio_host_create(&sdio_des);
  479. if (host == RT_NULL)
  480. {
  481. LOG_E("host create fail");
  482. return RT_NULL;
  483. }
  484. return 0;
  485. }
  486. INIT_DEVICE_EXPORT(rt_hw_sdio_init);
  487. #if defined(BSP_USING_EMMC_FS)
  488. int mnt_init(void)
  489. {
  490. rt_device_t sd = RT_NULL;
  491. #if defined(EMMC_RX_DUMP) || defined(EMMC_TX_DUMP)
  492. rt_thread_delay(3000);
  493. #else
  494. rt_thread_delay(RT_TICK_PER_SECOND);
  495. #endif
  496. sd = rt_device_find("sd0");
  497. if (sd == RT_NULL)
  498. {
  499. rt_kprintf("can't find emmc device!\n");
  500. return RT_ERROR;
  501. }
  502. if (dfs_mount("sd0", "/", "elm", 0, 0) != 0)
  503. {
  504. rt_kprintf("file system mount failed!\n");
  505. }
  506. else
  507. {
  508. rt_kprintf("file system mount success!\n");
  509. }
  510. return 0;
  511. }
  512. INIT_APP_EXPORT(mnt_init);
  513. #endif
  514. #endif /* BSP_USING_SDMMC */