drv_gpio.c 5.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-09-05 qinweizhong first version
  9. */
  10. #include <rtthread.h>
  11. #include <rtdevice.h>
  12. #include <rthw.h>
  13. #include <tae32f53xx_ll_gpio.h>
  14. #include <tae32f53xx_ll_cortex.h>
  15. #include "drv_gpio.h"
  16. #define TAE32_PIN(index, gpio, gpio_index) \
  17. { \
  18. 0, GPIO##gpio, GPIO_PIN_##gpio_index \
  19. }
  20. #define TAE32_PIN_DEFAULT \
  21. { \
  22. -1, 0, 0 \
  23. }
  24. /* TAE32 GPIO driver */
  25. struct pin_index
  26. {
  27. int index;
  28. GPIO_TypeDef *gpio;
  29. uint32_t pin;
  30. };
  31. static const struct pin_index _pin_map[] =
  32. {
  33. TAE32_PIN_DEFAULT,
  34. TAE32_PIN_DEFAULT,
  35. TAE32_PIN(2, C, 13),
  36. TAE32_PIN(3, C, 14),
  37. TAE32_PIN(4, C, 15),
  38. TAE32_PIN_DEFAULT,
  39. TAE32_PIN_DEFAULT,
  40. TAE32_PIN_DEFAULT,
  41. TAE32_PIN_DEFAULT,
  42. TAE32_PIN_DEFAULT,
  43. TAE32_PIN(10, A, 0),
  44. TAE32_PIN(11, A, 1),
  45. TAE32_PIN(12, A, 2),
  46. TAE32_PIN(13, A, 3),
  47. TAE32_PIN(14, A, 4),
  48. TAE32_PIN(15, A, 5),
  49. TAE32_PIN(16, A, 6),
  50. TAE32_PIN(17, A, 7),
  51. TAE32_PIN(18, B, 0),
  52. TAE32_PIN(19, B, 1),
  53. TAE32_PIN(20, B, 2),
  54. TAE32_PIN(21, B, 10),
  55. TAE32_PIN(22, B, 11),
  56. TAE32_PIN_DEFAULT,
  57. TAE32_PIN_DEFAULT,
  58. TAE32_PIN(25, B, 12),
  59. TAE32_PIN(26, B, 13),
  60. TAE32_PIN(27, B, 14),
  61. TAE32_PIN(28, B, 15),
  62. TAE32_PIN(29, A, 8),
  63. TAE32_PIN(30, A, 9),
  64. TAE32_PIN(31, A, 10),
  65. TAE32_PIN(32, A, 11),
  66. TAE32_PIN(33, A, 12),
  67. TAE32_PIN(34, A, 13),
  68. TAE32_PIN_DEFAULT,
  69. TAE32_PIN_DEFAULT,
  70. TAE32_PIN(37, A, 14),
  71. TAE32_PIN(38, A, 15),
  72. TAE32_PIN(39, B, 3),
  73. TAE32_PIN(40, B, 4),
  74. TAE32_PIN(41, B, 5),
  75. TAE32_PIN(42, B, 6),
  76. TAE32_PIN(43, B, 7),
  77. TAE32_PIN_DEFAULT,
  78. TAE32_PIN(45, B, 8),
  79. TAE32_PIN(46, B, 9),
  80. TAE32_PIN_DEFAULT,
  81. TAE32_PIN_DEFAULT,
  82. };
  83. #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
  84. const struct pin_index *get_pin(uint8_t pin)
  85. {
  86. const struct pin_index *index;
  87. if (pin < ITEM_NUM(_pin_map))
  88. {
  89. index = &_pin_map[pin];
  90. if (index->gpio == 0)
  91. index = RT_NULL;
  92. }
  93. else
  94. {
  95. index = RT_NULL;
  96. }
  97. return index;
  98. };
  99. void _pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
  100. {
  101. const struct pin_index *index;
  102. index = get_pin(pin);
  103. if (index == RT_NULL)
  104. {
  105. return;
  106. }
  107. if (value == PIN_LOW)
  108. {
  109. LL_GPIO_WritePin(index->gpio, index->pin, GPIO_PIN_RESET);
  110. }
  111. else
  112. {
  113. LL_GPIO_WritePin(index->gpio, index->pin, GPIO_PIN_SET);
  114. }
  115. }
  116. int _pin_read(rt_device_t dev, rt_base_t pin)
  117. {
  118. int value;
  119. const struct pin_index *index;
  120. value = PIN_LOW;
  121. index = get_pin(pin);
  122. if (index == RT_NULL)
  123. {
  124. return PIN_LOW;
  125. }
  126. if (LL_GPIO_ReadPin(index->gpio, index->pin) == GPIO_PIN_RESET)
  127. {
  128. value = PIN_LOW;
  129. }
  130. else
  131. {
  132. value = PIN_HIGH;
  133. }
  134. return value;
  135. }
  136. void _pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
  137. {
  138. const struct pin_index *index;
  139. GPIO_InitTypeDef GPIO_InitStructure;
  140. index = get_pin(pin);
  141. if (index == RT_NULL)
  142. {
  143. return;
  144. }
  145. /* Configure GPIO_InitStructure */
  146. GPIO_InitStructure.Pin = index->pin;
  147. GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT;
  148. GPIO_InitStructure.OType = GPIO_OTYPE_PP;
  149. GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
  150. if (mode == PIN_MODE_OUTPUT)
  151. {
  152. /* output setting */
  153. GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT;
  154. GPIO_InitStructure.OType = GPIO_OTYPE_PP;
  155. }
  156. else if (mode == PIN_MODE_OUTPUT_OD)
  157. {
  158. /* output setting: od. */
  159. GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT;
  160. GPIO_InitStructure.OType = GPIO_OTYPE_OD;
  161. }
  162. else if (mode == PIN_MODE_INPUT)
  163. {
  164. /* input setting: not pull. */
  165. GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
  166. }
  167. else if (mode == PIN_MODE_INPUT_PULLUP)
  168. {
  169. /* input setting: pull up. */
  170. GPIO_InitStructure.Pull = GPIO_PULLUP;
  171. GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
  172. }
  173. else
  174. {
  175. /* input setting:default. */
  176. GPIO_InitStructure.Pull = GPIO_PULLDOWN;
  177. GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
  178. }
  179. LL_GPIO_Init(index->gpio, &GPIO_InitStructure);
  180. }
  181. rt_err_t _pin_attach_irq(struct rt_device *device, rt_int32_t pin,
  182. rt_uint32_t mode, void (*hdr)(void *args), void *args)
  183. {
  184. return -RT_ERROR;
  185. }
  186. rt_err_t _pin_detach_irq(struct rt_device *device, rt_int32_t pin)
  187. {
  188. return -RT_ERROR;
  189. }
  190. rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin,
  191. rt_uint32_t enabled)
  192. {
  193. return -RT_ERROR;
  194. }
  195. const static struct rt_pin_ops _pin_ops =
  196. {
  197. _pin_mode,
  198. _pin_write,
  199. _pin_read,
  200. _pin_attach_irq,
  201. _pin_detach_irq,
  202. _pin_irq_enable,
  203. RT_NULL,
  204. };
  205. int rt_hw_pin_init(void)
  206. {
  207. int result;
  208. result = rt_device_pin_register("pin", &_pin_ops, RT_NULL);
  209. return result;
  210. }
  211. INIT_BOARD_EXPORT(rt_hw_pin_init);