tm4c_rom.icf 2.8 KB

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  1. //*****************************************************************************
  2. //
  3. // tm4c_room.icf - Linker configuration file for RT-Thread BSP.
  4. //
  5. // Copyright (c) 2013-2017 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 2.1.4.178 of the DK-TM4C129X Firmware Package.
  22. //
  23. //*****************************************************************************
  24. //
  25. // Define a memory region that covers the entire 4 GB addressible space of the
  26. // processor.
  27. //
  28. define memory mem with size = 4G;
  29. //
  30. // Define a region for the on-chip flash.
  31. //
  32. define region FLASH = mem:[from 0x00000000 to 0x000fffff];
  33. //
  34. // Define a region for the on-chip SRAM.
  35. //
  36. define region SRAM = mem:[from 0x20000000 to 0x2003ffff];
  37. //
  38. // Define a block for the heap. The size should be set to something other
  39. // than zero if things in the C library that require the heap are used.
  40. //
  41. define block HEAP with alignment = 8, size = 0x00000000 { };
  42. //
  43. // Define a block for RT-Thread components initialization
  44. //
  45. define block RTT_INIT_FUNC with fixed order { readonly section .rti_fn* };
  46. //
  47. // Indicate that the read/write values should be initialized by copying from
  48. // flash.
  49. //
  50. initialize by copy { readwrite };
  51. //
  52. // Indicate that the noinit values should be left alone. This includes the
  53. // stack, which if initialized will destroy the return address from the
  54. // initialization code, causing the processor to branch to zero and fault.
  55. //
  56. do not initialize { section .noinit };
  57. //
  58. // Place the interrupt vectors at the start of flash.
  59. //
  60. place at start of FLASH { readonly section .intvec };
  61. //
  62. // Place the remainder of the read-only items into flash.
  63. //
  64. place in FLASH { readonly, block RTT_INIT_FUNC };
  65. //
  66. // Place the RAM vector table at the start of SRAM.
  67. //
  68. place at start of SRAM { section VTABLE };
  69. //
  70. // Place all read/write items into SRAM.
  71. //
  72. place in SRAM { readwrite, block HEAP };
  73. keep { section FSymTab };
  74. keep { section VSymTab };
  75. keep { section .rti_fn* };