2837xD_RAM_IQMATH_lnk_cpu1.cmd 4.0 KB

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  1. MEMORY
  2. {
  3. PAGE 0 :
  4. /* BEGIN is used for the "boot to SARAM" bootloader mode */
  5. BEGIN : origin = 0x000000, length = 0x000002
  6. RAMM0 : origin = 0x000122, length = 0x0002DE
  7. RAMD0 : origin = 0x00B000, length = 0x000800
  8. RAMLS0 : origin = 0x008000, length = 0x000800
  9. RAMLS1_LS2 : origin = 0x008800, length = 0x001000
  10. RAMLS3 : origin = 0x009800, length = 0x000800
  11. RAMLS4 : origin = 0x00A000, length = 0x000800
  12. RESET : origin = 0x3FFFC0, length = 0x000002
  13. PAGE 1 :
  14. BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
  15. RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
  16. RAMD1 : origin = 0x00B800, length = 0x000800
  17. RAMLS5 : origin = 0x00A800, length = 0x000800
  18. RAMGS0 : origin = 0x00C000, length = 0x001000
  19. RAMGS1 : origin = 0x00D000, length = 0x001000
  20. RAMGS2 : origin = 0x00E000, length = 0x001000
  21. RAMGS3 : origin = 0x00F000, length = 0x001000
  22. RAMGS4 : origin = 0x010000, length = 0x001000
  23. RAMGS5 : origin = 0x011000, length = 0x001000
  24. RAMGS6 : origin = 0x012000, length = 0x001000
  25. RAMGS7 : origin = 0x013000, length = 0x001000
  26. RAMGS8 : origin = 0x014000, length = 0x001000
  27. RAMGS9 : origin = 0x015000, length = 0x001000
  28. RAMGS10 : origin = 0x016000, length = 0x001000
  29. RAMGS11 : origin = 0x017000, length = 0x001000
  30. RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  31. RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  32. RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  33. RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  34. CANA_MSG_RAM : origin = 0x049000, length = 0x000800
  35. CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
  36. CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
  37. CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
  38. }
  39. SECTIONS
  40. {
  41. codestart : > BEGIN, PAGE = 0
  42. .text : >>RAMM0 | RAMD0 | RAMLS0 | RAMLS1_LS2 | RAMLS3 | RAMLS4, PAGE = 0
  43. .cinit : > RAMM0, PAGE = 0
  44. .pinit : > RAMM0, PAGE = 0
  45. .switch : > RAMM0, PAGE = 0
  46. .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
  47. .stack : > RAMM1, PAGE = 1
  48. .ebss : > RAMLS5, PAGE = 1
  49. .econst : > RAMLS5, PAGE = 1
  50. .esysmem : > RAMLS5, PAGE = 1
  51. Filter_RegsFile : > RAMGS0, PAGE = 1
  52. #ifdef __TI_COMPILER_VERSION__
  53. #if __TI_COMPILER_VERSION__ >= 15009000
  54. .TI.ramfunc : {} > RAMM0, PAGE = 0
  55. #else
  56. ramfuncs : > RAMM0 PAGE = 0
  57. #endif
  58. #endif
  59. /* The following section definitions are required when using the IPC API Drivers */
  60. GROUP : > CPU1TOCPU2RAM, PAGE = 1
  61. {
  62. PUTBUFFER
  63. PUTWRITEIDX
  64. GETREADIDX
  65. }
  66. GROUP : > CPU2TOCPU1RAM, PAGE = 1
  67. {
  68. GETBUFFER : TYPE = DSECT
  69. GETWRITEIDX : TYPE = DSECT
  70. PUTREADIDX : TYPE = DSECT
  71. }
  72. /* The following section definition are for SDFM examples */
  73. Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
  74. Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
  75. Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
  76. Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
  77. Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
  78. /* Allocate IQ math areas: */
  79. IQmath : > RAMLS0, PAGE = 0 /* Math Code */
  80. IQmathTables : > RAMLS1_LS2, PAGE = 0
  81. }
  82. /*
  83. //===========================================================================
  84. // End of file.
  85. //===========================================================================
  86. */