2837xD_RAM_lnk_cpu1_far.cmd 5.0 KB

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  1. MEMORY
  2. {
  3. PAGE 0 :
  4. /* BEGIN is used for the "boot to SARAM" bootloader mode */
  5. BEGIN : origin = 0x000000, length = 0x000002
  6. RAMM0 : origin = 0x000122, length = 0x0002DE
  7. RAMD0 : origin = 0x00B000, length = 0x000800
  8. RAMLS0 : origin = 0x008000, length = 0x000800
  9. RAMLS1 : origin = 0x008800, length = 0x000800
  10. RAMLS2 : origin = 0x009000, length = 0x000800
  11. RAMLS3 : origin = 0x009800, length = 0x000800
  12. RAMLS4 : origin = 0x00A000, length = 0x000800
  13. RESET : origin = 0x3FFFC0, length = 0x000002
  14. PAGE 1 :
  15. BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
  16. RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
  17. RAMD1 : origin = 0x00B800, length = 0x000800
  18. RAMLS5 : origin = 0x00A800, length = 0x000800
  19. RAMGS0 : origin = 0x00C000, length = 0x001000
  20. RAMGS1 : origin = 0x00D000, length = 0x001000
  21. RAMGS2 : origin = 0x00E000, length = 0x001000
  22. RAMGS3 : origin = 0x00F000, length = 0x001000
  23. RAMGS4 : origin = 0x010000, length = 0x001000
  24. RAMGS5 : origin = 0x011000, length = 0x001000
  25. RAMGS6 : origin = 0x012000, length = 0x001000
  26. RAMGS7 : origin = 0x013000, length = 0x001000
  27. RAMGS8 : origin = 0x014000, length = 0x001000
  28. RAMGS9 : origin = 0x015000, length = 0x001000
  29. RAMGS10 : origin = 0x016000, length = 0x001000
  30. RAMGS11 : origin = 0x017000, length = 0x001000
  31. RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  32. RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  33. RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  34. RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
  35. EMIF1_CS0n : origin = 0x80000000, length = 0x10000000
  36. EMIF1_CS2n : origin = 0x00100000, length = 0x00200000
  37. EMIF1_CS3n : origin = 0x00300000, length = 0x00080000
  38. EMIF1_CS4n : origin = 0x00380000, length = 0x00060000
  39. EMIF2_CS0n : origin = 0x90000000, length = 0x10000000
  40. EMIF2_CS2n : origin = 0x00002000, length = 0x00001000
  41. CANA_MSG_RAM : origin = 0x049000, length = 0x000800
  42. CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
  43. CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
  44. CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
  45. }
  46. SECTIONS
  47. {
  48. codestart : > BEGIN, PAGE = 0
  49. .text : >>RAMM0 | RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
  50. .cinit : > RAMM0, PAGE = 0
  51. .pinit : > RAMM0, PAGE = 0
  52. .switch : > RAMM0, PAGE = 0
  53. .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
  54. .stack : > RAMM1, PAGE = 1
  55. .ebss : > RAMLS5, PAGE = 1
  56. .econst : > RAMLS5, PAGE = 1
  57. .esysmem : > RAMLS5, PAGE = 1
  58. .farbss : > EMIF1_CS0n, PAGE = 1
  59. .farconst : > EMIF1_CS0n, PAGE = 1
  60. .em1_cs0 : > EMIF1_CS0n, PAGE = 1
  61. .em1_cs2 : > EMIF1_CS2n, PAGE = 1
  62. .em1_cs3 : > EMIF1_CS3n, PAGE = 1
  63. .em1_cs4 : > EMIF1_CS4n, PAGE = 1
  64. .em2_cs0 : > EMIF2_CS0n, PAGE = 1
  65. .em2_cs2 : > EMIF2_CS2n, PAGE = 1
  66. Filter_RegsFile : > RAMGS0, PAGE = 1
  67. ramgs0 : > RAMGS0, PAGE = 1
  68. ramgs1 : > RAMGS1, PAGE = 1
  69. #ifdef __TI_COMPILER_VERSION__
  70. #if __TI_COMPILER_VERSION__ >= 15009000
  71. .TI.ramfunc : {} > RAMM0, PAGE = 0
  72. #else
  73. ramfuncs : > RAMM0 PAGE = 0
  74. #endif
  75. #endif
  76. /* The following section definitions are required when using the IPC API Drivers */
  77. GROUP : > CPU1TOCPU2RAM, PAGE = 1
  78. {
  79. PUTBUFFER
  80. PUTWRITEIDX
  81. GETREADIDX
  82. }
  83. GROUP : > CPU2TOCPU1RAM, PAGE = 1
  84. {
  85. GETBUFFER : TYPE = DSECT
  86. GETWRITEIDX : TYPE = DSECT
  87. PUTREADIDX : TYPE = DSECT
  88. }
  89. /* The following section definition are for SDFM examples */
  90. Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
  91. Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
  92. Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
  93. Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
  94. Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
  95. }
  96. /*
  97. //===========================================================================
  98. // End of file.
  99. //===========================================================================
  100. */