2837xD_RAM_lnk_cpu2_far.cmd 2.7 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283
  1. MEMORY
  2. {
  3. PAGE 0 :
  4. /* BEGIN is used for the "boot to SARAM" bootloader mode */
  5. BEGIN : origin = 0x000000, length = 0x000002
  6. RAMM0 : origin = 0x000080, length = 0x000380
  7. RAMD0 : origin = 0x00B000, length = 0x000800
  8. RAMLS0 : origin = 0x008000, length = 0x000800
  9. RAMLS1 : origin = 0x008800, length = 0x000800
  10. RAMLS2 : origin = 0x009000, length = 0x000800
  11. RAMLS3 : origin = 0x009800, length = 0x000800
  12. RAMLS4 : origin = 0x00A000, length = 0x000800
  13. RESET : origin = 0x3FFFC0, length = 0x000002
  14. PAGE 1 :
  15. BOOT_RSVD : origin = 0x000002, length = 0x00007E /* Part of M0, BOOT rom will use this for stack */
  16. RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
  17. RAMD1 : origin = 0x00B800, length = 0x000800
  18. EMIF1_CS0n : origin = 0x80000000, length = 0x10000000
  19. EMIF1_CS2n : origin = 0x00100000, length = 0x00200000
  20. EMIF1_CS3n : origin = 0x00300000, length = 0x00080000
  21. EMIF1_CS4n : origin = 0x00380000, length = 0x00060000
  22. RAMLS5 : origin = 0x00A800, length = 0x000800
  23. CANA_MSG_RAM : origin = 0x049000, length = 0x000800
  24. CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
  25. CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
  26. CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
  27. }
  28. SECTIONS
  29. {
  30. codestart : > BEGIN, PAGE = 0
  31. .text : >>RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
  32. .cinit : > RAMM0, PAGE = 0
  33. .pinit : > RAMM0, PAGE = 0
  34. .switch : > RAMM0, PAGE = 0
  35. .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
  36. .stack : > RAMM1, PAGE = 1
  37. .ebss : > RAMLS5, PAGE = 1
  38. .econst : > RAMLS5, PAGE = 1
  39. .esysmem : > RAMLS5, PAGE = 1
  40. .farbss : > EMIF1_CS0n, PAGE = 1
  41. .farconst : > EMIF1_CS0n, PAGE = 1
  42. #ifdef __TI_COMPILER_VERSION__
  43. #if __TI_COMPILER_VERSION__ >= 15009000
  44. .TI.ramfunc : {} > RAMM0, PAGE = 0
  45. #else
  46. ramfuncs : > RAMM0 PAGE = 0
  47. #endif
  48. #endif
  49. /* The following section definitions are required when using the IPC API Drivers */
  50. GROUP : > CPU2TOCPU1RAM, PAGE = 1
  51. {
  52. PUTBUFFER
  53. PUTWRITEIDX
  54. GETREADIDX
  55. }
  56. GROUP : > CPU1TOCPU2RAM, PAGE = 1
  57. {
  58. GETBUFFER : TYPE = DSECT
  59. GETWRITEIDX : TYPE = DSECT
  60. PUTREADIDX : TYPE = DSECT
  61. }
  62. }
  63. /*
  64. //===========================================================================
  65. // End of file.
  66. //===========================================================================
  67. */