F2837xD_Ipc_drivers.h 23 KB

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  1. //###########################################################################
  2. //
  3. // FILE: F2837xD_Ipc_drivers.h
  4. //
  5. // TITLE: Defines and Macros for the IPC Controller
  6. //
  7. //###########################################################################
  8. // $TI Release: F2837xD Support Library v3.05.00.00 $
  9. // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
  10. // $Copyright:
  11. // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
  12. //
  13. // Redistribution and use in source and binary forms, with or without
  14. // modification, are permitted provided that the following conditions
  15. // are met:
  16. //
  17. // Redistributions of source code must retain the above copyright
  18. // notice, this list of conditions and the following disclaimer.
  19. //
  20. // Redistributions in binary form must reproduce the above copyright
  21. // notice, this list of conditions and the following disclaimer in the
  22. // documentation and/or other materials provided with the
  23. // distribution.
  24. //
  25. // Neither the name of Texas Instruments Incorporated nor the names of
  26. // its contributors may be used to endorse or promote products derived
  27. // from this software without specific prior written permission.
  28. //
  29. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40. // $
  41. //###########################################################################
  42. //
  43. //! \addtogroup ipc_driver_api
  44. //! @{
  45. //
  46. #ifndef F2837xD_IPC_DRIVERS_H
  47. #define F2837xD_IPC_DRIVERS_H
  48. //
  49. // If building with a C++ compiler, make all of the definitions in this header
  50. // have a C binding.
  51. //
  52. #ifdef __cplusplus
  53. extern "C" {
  54. #endif
  55. //
  56. // Included Files
  57. //
  58. #include "F2837xD_device.h"
  59. //
  60. // Defines
  61. //
  62. //
  63. // The following are values that are used to define the maximum size of the
  64. // global circular buffer variables g_asIPCCPU1toCPU2Buffers and
  65. // g_asIPCCPU2toCPU1Buffers. They are also used in the IpcPut() and IpcGet()
  66. // functions. IPC_BUFFER_SIZE and NUM_IPC_INTERRUPTS are user-configurable.
  67. //
  68. #define IPC_BUFFER_SIZE 4 // # of tIpcMessage messages in
  69. // circular buffer
  70. // (must be interval of 2)
  71. #define NUM_IPC_INTERRUPTS 4 // # of IPC interrupts using circular
  72. // buffer
  73. // (must be same number on both CPUs
  74. #define MAX_BUFFER_INDEX IPC_BUFFER_SIZE - 1
  75. //
  76. // The following are values that can be passed to IPCInitialize()
  77. // as the usCPU1IpcInterrupt and usCPU2IpcInterrupt parameters
  78. //
  79. #define IPC_INT0 0x0001
  80. #define IPC_INT1 0x0002
  81. #define IPC_INT2 0x0003
  82. #define IPC_INT3 0x0004
  83. //
  84. // The following are values that are returned from all of the IPCCtoM command
  85. // functions to determine whether the command was successfully sent or not.
  86. //
  87. #define STATUS_FAIL 0x0001
  88. #define STATUS_PASS 0x0000
  89. //
  90. // The following are values that can be passed to IPCReqMemAccess() as
  91. // usMaster parameter to determine which processor to give master access to
  92. // GSx blocks.
  93. //
  94. #define IPC_GSX_CPU1_MASTER 0x0001
  95. #define IPC_GSX_CPU2_MASTER 0x0000
  96. //
  97. // The following are values that can be passed to all IPC CPU1 to CPU2 or
  98. // CPU2 to CPU1 command functions as bBlock parameter to determine whether to
  99. // wait/block until a slot in PutBuffer is available if it is full, or to exit
  100. // with a failure status.
  101. //
  102. #define ENABLE_BLOCKING 0x0001
  103. #define DISABLE_BLOCKING 0x0000
  104. //
  105. // The following are values that can be passed to IPCCtoMDataRead(),
  106. // IPCCCtoMSetBits(),IPCCCtoMSetBits_Protected(), IPCCCtoMClearBits(),
  107. // IPCCCtoMClearBits_Protected(), IPCCCtoMDataWrite(),
  108. // IPCCtoMDataWrite_Protected()
  109. // as usLength parameter to determine whether command applies to 16- or 32-bit
  110. // data word.
  111. //
  112. #define IPC_LENGTH_16_BITS 0x00000001
  113. #define IPC_LENGTH_32_BITS 0x00000002
  114. //
  115. // The following are values that can be passed to IPCReqMemAccess() as
  116. // ulMask parameter to configure GSxMSEL_REG register for master access to Sx
  117. // RAM block.
  118. //
  119. #define GS0_ACCESS 0x00000001 // Master Access to GS0
  120. #define GS1_ACCESS 0x00000002 // Master Access to GS1
  121. #define GS2_ACCESS 0x00000004 // Master Access to GS2
  122. #define GS3_ACCESS 0x00000008 // Master Access to GS3
  123. #define GS4_ACCESS 0x00000010 // Master Access to GS4
  124. #define GS5_ACCESS 0x00000020 // Master Access to GS5
  125. #define GS6_ACCESS 0x00000040 // Master Access to GS6
  126. #define GS7_ACCESS 0x00000080 // Master Access to GS7
  127. #define GS8_ACCESS 0x00000100 // Master Access to GS8
  128. #define GS9_ACCESS 0x00000200 // Master Access to GS9
  129. #define GS10_ACCESS 0x00000400 // Master Access to GS10
  130. #define GS11_ACCESS 0x00000800 // Master Access to GS11
  131. #define GS12_ACCESS 0x00001000 // Master Access to GS12
  132. #define GS13_ACCESS 0x00002000 // Master Access to GS13
  133. #define GS14_ACCESS 0x00004000 // Master Access to GS14
  134. #define GS15_ACCESS 0x00008000 // Master Access to GS15
  135. //
  136. // The following are values that can be passed to IPCCtoMTaskBusy() as the
  137. // ulFlags parameter.
  138. // IPC_FLAG17 - IPC_FLAG32 can also be passed to IPCtoMDataRead() and
  139. // IPCCtoMReadBlock() as the ulResponseFlag parameter.
  140. //
  141. #define NO_FLAG 0x00000000 // NO FLAG
  142. #define IPC_FLAG0 0x00000001 // IPC FLAG 0
  143. #define IPC_FLAG1 0x00000002 // IPC FLAG 1
  144. #define IPC_FLAG2 0x00000004 // IPC FLAG 2
  145. #define IPC_FLAG3 0x00000008 // IPC FLAG 3
  146. #define IPC_FLAG4 0x00000010 // IPC FLAG 4
  147. #define IPC_FLAG5 0x00000020 // IPC FLAG 5
  148. #define IPC_FLAG6 0x00000040 // IPC FLAG 6
  149. #define IPC_FLAG7 0x00000080 // IPC FLAG 7
  150. #define IPC_FLAG8 0x00000100 // IPC FLAG 8
  151. #define IPC_FLAG9 0x00000200 // IPC FLAG 9
  152. #define IPC_FLAG10 0x00000400 // IPC FLAG 10
  153. #define IPC_FLAG11 0x00000800 // IPC FLAG 11
  154. #define IPC_FLAG12 0x00001000 // IPC FLAG 12
  155. #define IPC_FLAG13 0x00002000 // IPC FLAG 13
  156. #define IPC_FLAG14 0x00004000 // IPC FLAG 14
  157. #define IPC_FLAG15 0x00008000 // IPC FLAG 15
  158. #define IPC_FLAG16 0x00010000 // IPC FLAG 16
  159. #define IPC_FLAG17 0x00020000 // IPC FLAG 17
  160. #define IPC_FLAG18 0x00040000 // IPC FLAG 18
  161. #define IPC_FLAG19 0x00080000 // IPC FLAG 19
  162. #define IPC_FLAG20 0x00100000 // IPC FLAG 20
  163. #define IPC_FLAG21 0x00200000 // IPC FLAG 21
  164. #define IPC_FLAG22 0x00400000 // IPC FLAG 22
  165. #define IPC_FLAG23 0x00800000 // IPC FLAG 23
  166. #define IPC_FLAG24 0x01000000 // IPC FLAG 24
  167. #define IPC_FLAG25 0x02000000 // IPC FLAG 25
  168. #define IPC_FLAG26 0x04000000 // IPC FLAG 26
  169. #define IPC_FLAG27 0x08000000 // IPC FLAG 27
  170. #define IPC_FLAG28 0x10000000 // IPC FLAG 28
  171. #define IPC_FLAG29 0x20000000 // IPC FLAG 29
  172. #define IPC_FLAG30 0x40000000 // IPC FLAG 30
  173. #define IPC_FLAG31 0x80000000 // IPC FLAG 31
  174. //
  175. // The following are values that are used by all command functions and passed
  176. // between processors in tIpcMessage.ulmessage or in the xTOyIPCCOM register
  177. // to determine what command is requested by the sending processor.
  178. //
  179. #define IPC_SET_BITS_16 0x00000001 // Used for IPC-Lite
  180. #define IPC_SET_BITS_32 0x00000002 // Used for IPC-Lite
  181. #define IPC_CLEAR_BITS_16 0x00000003 // Used for IPC-Lite
  182. #define IPC_CLEAR_BITS_32 0x00000004 // Used for IPC-Lite
  183. #define IPC_DATA_WRITE_16 0x00000005 // Used for IPC-Lite
  184. #define IPC_DATA_WRITE_32 0x00000006 // Used for IPC-Lite
  185. #define IPC_DATA_READ_16 0x00000007 // Used for Boot ROM
  186. #define IPC_DATA_READ_32 0x00000008 // Used for Boot ROM
  187. #define IPC_DATA_READ 0x00000008
  188. #define IPC_SET_BITS_16_PROTECTED 0x00000009 // Used for IPC-Lite
  189. #define IPC_SET_BITS_32_PROTECTED 0x0000000A // Used for IPC-Lite
  190. #define IPC_CLEAR_BITS_16_PROTECTED 0x0000000B // Used for IPC-Lite
  191. #define IPC_CLEAR_BITS_32_PROTECTED 0x0000000C // Used for IPC-Lite
  192. #define IPC_DATA_WRITE_16_PROTECTED 0x0000000D // Used for IPC-Lite
  193. #define IPC_DATA_WRITE_32_PROTECTED 0x0000000E // Used for IPC-Lite
  194. //
  195. // 0x0000000F and 0x0000010 are reserved by boot ROM
  196. //
  197. #define IPC_BRANCH 0x00000011
  198. #define IPC_FUNC_CALL 0x00000012
  199. #define IPC_MTOC_EXECUTE_BOOTMODE_CMD 0x00000013
  200. #define IPC_SET_BITS 0x00010001
  201. #define IPC_CLEAR_BITS 0x00010002
  202. #define IPC_DATA_WRITE 0x00010003
  203. #define IPC_BLOCK_READ 0x00010004
  204. #define IPC_BLOCK_WRITE 0x00010005
  205. #define IPC_DATA_READ_PROTECTED 0x00010007
  206. #define IPC_SET_BITS_PROTECTED 0x00010008
  207. #define IPC_CLEAR_BITS_PROTECTED 0x00010009
  208. #define IPC_DATA_WRITE_PROTECTED 0x0001000A
  209. #define IPC_BLOCK_WRITE_PROTECTED 0x0001000B
  210. //
  211. // The following are values that can be passed into the
  212. // IPCBootControlSystem() function in the ulBootMode parameter.
  213. //
  214. #define BROM_IPC_EXECUTE_BOOTMODE_CMD 0x00000013
  215. //
  216. // Below are the values programmed into IPCBOOTMODE register
  217. //
  218. #define C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL 0x00000000
  219. #define C1C2_BROM_BOOTMODE_BOOT_FROM_SCI 0x00000001
  220. #define C1C2_BROM_BOOTMODE_BOOT_FROM_SPI 0x00000004
  221. #define C1C2_BROM_BOOTMODE_BOOT_FROM_I2C 0x00000005
  222. #define C1C2_BROM_BOOTMODE_BOOT_FROM_CAN 0x00000007
  223. #define C1C2_BROM_BOOTMODE_BOOT_FROM_RAM 0x0000000A
  224. #define C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH 0x0000000B
  225. //
  226. // The following value is used by the
  227. // IPCBootControlSystem() function to limit the allowed boot mode values.
  228. //
  229. #define C1C2_BROM_BOOTMODE_BOOT_COMMAND_MAX_SUPPORT_VALUE 0x0000000C
  230. //
  231. // The following values report on the CPU02 boot ROM status at all times while
  232. // the CPU02 is booting, and will reside in IPCBOOTSTS[11:0].
  233. //
  234. //
  235. // CPU02 has not filled in a valid value yet
  236. //
  237. #define C2_BOOTROM_BOOTSTS_C2TOC1_IGNORE 0x00000000
  238. //
  239. // CPU02 has started to boot, but not completed
  240. // the boot process yet
  241. //
  242. #define C2_BOOTROM_BOOTSTS_SYSTEM_START_BOOT 0x00000001
  243. //
  244. // CPU02 has completed the boot and is ready for
  245. // CPU01 TO CPU02 IPC commands
  246. //
  247. #define C2_BOOTROM_BOOTSTS_SYSTEM_READY 0x00000002
  248. //
  249. // CPU02 ACKs the command in CPU01 TO CPU01
  250. // BOOTMODE register
  251. //
  252. #define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_ACK 0x00000003
  253. //
  254. // CPU02 un-supported command in CPU01 TO CPU01
  255. // BOOTMODE register
  256. //
  257. #define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_NAK_STATUS_NOT_SUPPORTED 0x00000004
  258. //
  259. // CPU2 NAKs the current boot command in
  260. // CPU01 TO CPU01 BOOTMODE register
  261. //
  262. #define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_NAK_STATUS_BUSY_WITH_BOOT 0x00000005
  263. //
  264. //! A structure that defines an IPC message. These fields are used by the
  265. //! IPC drivers to determine handling of data passed between processors.
  266. //! Although they have a defined naming scheme, they can also be used
  267. //! generically
  268. //! to pass 32-bit data words between processors.
  269. //
  270. typedef struct
  271. {
  272. //! The command passed between processor systems.
  273. uint32_t ulcommand;
  274. //! The receiving processor address the command is requesting action on.
  275. uint32_t uladdress;
  276. //! A 32-bit variable, the usage of which is determined by ulcommand.
  277. //! The most common usage is to pass length requirements
  278. //! with the upper 16-bits storing a Response Flag for read commands.
  279. uint32_t uldataw1;
  280. //! A 32-bit variable, the usage of which is determined by ulcommand.
  281. //! For block transfers, this variable is generally the address in
  282. //! shared memory used to pass data between processors.
  283. uint32_t uldataw2;
  284. } tIpcMessage;
  285. //
  286. //! A structure that defines an IPC control instance. These
  287. //! fields are used by the IPC drivers, and normally it is not necessary for
  288. //! user software to directly read or write fields in the table.
  289. //
  290. typedef struct
  291. {
  292. //! The address of the PutBuffer IPC message (in MSGRAM)
  293. tIpcMessage *psPutBuffer;
  294. //! The IPC INT flag to set when sending messages
  295. //! for this IPC controller instance.
  296. uint32_t ulPutFlag;
  297. //! The address of the PutBuffer Write index (in MSGRAM)
  298. uint16_t *pusPutWriteIndex;
  299. //! The address of the PutBuffer Read index (in MSGRAM)
  300. uint16_t *pusPutReadIndex;
  301. //! The address of the GetBuffer IPC message(in MSGRAM)
  302. tIpcMessage *psGetBuffer;
  303. //! The address of the GetBuffer Write Index (in MSGRAM)
  304. uint16_t *pusGetWriteIndex;
  305. //! The address of the GetBuffer Read Index (in MSGRAM)
  306. uint16_t *pusGetReadIndex;
  307. } tIpcController;
  308. //
  309. // A type definition for the IPC function call command.
  310. //
  311. typedef uint32_t (*tfIpcFuncCall)(uint32_t ulParam);
  312. //
  313. // Prototypes for Circular Buffers
  314. //
  315. extern tIpcMessage g_asIPCCPU1toCPU2Buffers[NUM_IPC_INTERRUPTS][IPC_BUFFER_SIZE];
  316. extern tIpcMessage g_asIPCCPU2toCPU1Buffers[NUM_IPC_INTERRUPTS][IPC_BUFFER_SIZE];
  317. //
  318. // Function Prototypes
  319. //
  320. extern void IPCInitialize (volatile tIpcController *psController,
  321. uint16_t usCPU2IpcInterrupt,
  322. uint16_t usCPU1IpcInterrupt);
  323. extern uint16_t IpcPut (volatile tIpcController *psController,
  324. tIpcMessage *psMessage,
  325. uint16_t bBlock);
  326. extern uint16_t IpcGet (volatile tIpcController *psController,
  327. tIpcMessage *psMessage,
  328. uint16_t bBlock);
  329. extern uint16_t IPCLtoRDataRead (volatile tIpcController *psController,
  330. uint32_t ulAddress, void *pvData,
  331. uint16_t usLength, uint16_t bBlock,
  332. uint32_t ulResponseFlag);
  333. extern uint16_t IPCLtoRDataRead_Protected (volatile tIpcController *psController,
  334. uint32_t ulAddress, void *pvData,
  335. uint16_t usLength, uint16_t bBlock,
  336. uint32_t ulResponseFlag);
  337. extern uint16_t IPCLtoRSetBits(volatile tIpcController *psController,
  338. uint32_t ulAddress, uint32_t ulMask,
  339. uint16_t usLength,uint16_t bBlock);
  340. extern uint16_t IPCLtoRSetBits_Protected(volatile tIpcController *psController,
  341. uint32_t ulAddress, uint32_t ulMask,
  342. uint16_t usLength, uint16_t bBlock);
  343. extern uint16_t IPCLtoRClearBits(volatile tIpcController *psController,
  344. uint32_t ulAddress, uint32_t ulMask,
  345. uint16_t usLength,uint16_t bBlock);
  346. extern uint16_t IPCLtoRClearBits_Protected(volatile tIpcController *psController,
  347. uint32_t ulAddress, uint32_t ulMask,
  348. uint16_t usLength, uint16_t bBlock);
  349. extern uint16_t IPCLtoRDataWrite(volatile tIpcController *psController,
  350. uint32_t ulAddress, uint32_t ulData,
  351. uint16_t usLength, uint16_t bBlock,
  352. uint32_t ulResponseFlag);
  353. extern uint16_t IPCLtoRDataWrite_Protected(volatile tIpcController *psController,
  354. uint32_t ulAddress, uint32_t ulData,
  355. uint16_t usLength, uint16_t bBlock,
  356. uint32_t ulResponseFlag);
  357. extern uint16_t IPCLtoRBlockRead(volatile tIpcController *psController,
  358. uint32_t ulAddress, uint32_t ulShareAddress,
  359. uint16_t usLength, uint16_t bBlock,
  360. uint32_t ulResponseFlag);
  361. extern uint16_t IPCLtoRBlockWrite(volatile tIpcController *psController,
  362. uint32_t ulAddress, uint32_t ulShareAddress,
  363. uint16_t usLength, uint16_t usWordLength,
  364. uint16_t bBlock);
  365. extern uint16_t IPCLtoRBlockWrite_Protected(volatile tIpcController *psController,
  366. uint32_t ulAddress,
  367. uint32_t ulShareAddress,
  368. uint16_t usLength,
  369. uint16_t usWordLength,
  370. uint16_t bBlock);
  371. extern uint16_t IPCLtoRFunctionCall(volatile tIpcController *psController,
  372. uint32_t ulAddress, uint32_t ulParam,
  373. uint16_t bBlock);
  374. extern uint16_t IPCLtoRSendMessage(volatile tIpcController *psController,
  375. uint32_t ulCommand, uint32_t ulAddress,
  376. uint32_t ulDataW1, uint32_t ulDataW2,
  377. uint16_t bBlock);
  378. #if defined (CPU2)
  379. uint16_t
  380. IPCReqMemAccess (volatile tIpcController *psController, uint32_t ulMask,
  381. uint16_t usMaster, uint16_t bBlock);
  382. #endif
  383. extern void IPCRtoLDataWrite(tIpcMessage *psMessage);
  384. extern void IPCRtoLDataWrite_Protected(tIpcMessage *psMessage);
  385. extern void IPCRtoLDataRead(volatile tIpcController *psController,
  386. tIpcMessage *psMessage, uint16_t bBlock);
  387. extern void IPCRtoLDataRead_Protected(volatile tIpcController *psController,
  388. tIpcMessage *psMessage,uint16_t bBlock);
  389. extern void IPCRtoLSetBits(tIpcMessage *psMessage);
  390. extern void IPCRtoLSetBits_Protected(tIpcMessage *psMessage);
  391. extern void IPCRtoLClearBits(tIpcMessage *psMessage);
  392. extern void IPCRtoLClearBits_Protected(tIpcMessage *psMessage);
  393. extern void IPCRtoLBlockRead(tIpcMessage *psMessage);
  394. extern void IPCRtoLBlockWrite(tIpcMessage *psMessage);
  395. extern void IPCRtoLBlockWrite_Protected(tIpcMessage *psMessage);
  396. extern void IPCRtoLFunctionCall(tIpcMessage *psMessage);
  397. //
  398. // IPC Lite Driver Prototype Definitions
  399. //
  400. extern uint16_t IPCLiteLtoRGetResult (void *pvData, uint16_t usLength,
  401. uint32_t ulStatusFlag);
  402. extern uint16_t IPCLiteLtoRDataRead(uint32_t ulFlag, uint32_t ulAddress,
  403. uint16_t usLength, uint32_t ulStatusFlag);
  404. extern uint16_t IPCLiteLtoRSetBits(uint32_t ulFlag, uint32_t ulAddress,
  405. uint32_t ulMask, uint16_t usLength,
  406. uint32_t ulStatusFlag);
  407. extern uint16_t IPCLiteLtoRSetBits_Protected (uint32_t ulFlag,
  408. uint32_t ulAddress,
  409. uint32_t ulMask,
  410. uint16_t usLength,
  411. uint32_t ulStatusFlag);
  412. extern uint16_t IPCLiteLtoRClearBits(uint32_t ulFlag, uint32_t ulAddress,
  413. uint32_t ulMask, uint16_t usLength,
  414. uint32_t ulStatusFlag);
  415. extern uint16_t IPCLiteLtoRClearBits_Protected (uint32_t ulFlag,
  416. uint32_t ulAddress,
  417. uint32_t ulMask,
  418. uint16_t usLength,
  419. uint32_t ulStatusFlag);
  420. extern uint16_t IPCLiteLtoRDataWrite(uint32_t ulFlag, uint32_t ulAddress,
  421. uint32_t ulData, uint16_t usLength,
  422. uint32_t ulStatusFlag);
  423. extern uint16_t IPCLiteLtoRDataWrite_Protected(uint32_t ulFlag,
  424. uint32_t ulAddress,
  425. uint32_t ulData,
  426. uint16_t usLength,
  427. uint32_t ulStatusFlag);
  428. extern uint16_t IPCLiteLtoRFunctionCall(uint32_t ulFlag, uint32_t ulAddress,
  429. uint32_t ulParam, uint32_t ulStatusFlag);
  430. extern uint16_t IPCLiteReqMemAccess (uint32_t ulFlag, uint32_t ulMask,
  431. uint16_t ulMaster, uint32_t ulStatusFlag);
  432. extern void IPCLiteRtoLDataRead(uint32_t ulFlag, uint32_t ulStatusFlag);
  433. extern void IPCLiteRtoLSetBits(uint32_t ulFlag, uint32_t ulStatusFlag);
  434. extern void IPCLiteRtoLSetBits_Protected (uint32_t ulFlag, uint32_t ulStatusFlag);
  435. extern void IPCLiteRtoLClearBits(uint32_t ulFlag, uint32_t ulStatusFlag);
  436. extern void IPCLiteRtoLClearBits_Protected (uint32_t ulFlag,
  437. uint32_t ulStatusFlag);
  438. extern void IPCLiteRtoLDataWrite(uint32_t ulFlag, uint32_t ulStatusFlag);
  439. extern void IPCLiteRtoLDataWrite_Protected(uint32_t ulFlag,
  440. uint32_t ulStatusFlag);
  441. extern void IPCLiteRtoLFunctionCall(uint32_t ulFlag, uint32_t ulStatusFlag);
  442. //
  443. // IPC Utility Driver Prototype Definitions
  444. //
  445. extern void IPCRtoLFlagAcknowledge (uint32_t ulFlags);
  446. extern Uint16 IPCRtoLFlagBusy (uint32_t ulFlags);
  447. extern Uint16 IPCLtoRFlagBusy (uint32_t ulFlags);
  448. extern void IPCLtoRFlagSet (uint32_t ulFlags);
  449. extern void IPCLtoRFlagClear (uint32_t ulFlags);
  450. extern uint32_t IPCGetBootStatus (void);
  451. extern uint16_t IPCBootCPU2(uint32_t ulBootMode);
  452. #ifdef __cplusplus
  453. }
  454. #endif /* extern "C" */
  455. //
  456. // Close the Doxygen group.
  457. //! @}
  458. //
  459. #endif // end of F2837xD_IPC_DRIVERS_H definition
  460. //
  461. // End of file
  462. //