F2837xD_dcsm.h 21 KB

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  1. //###########################################################################
  2. //
  3. // FILE: F2837xD_dcsm.h
  4. //
  5. // TITLE: DCSM Register Definitions.
  6. //
  7. //###########################################################################
  8. // $TI Release: F2837xD Support Library v3.05.00.00 $
  9. // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
  10. // $Copyright:
  11. // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
  12. //
  13. // Redistribution and use in source and binary forms, with or without
  14. // modification, are permitted provided that the following conditions
  15. // are met:
  16. //
  17. // Redistributions of source code must retain the above copyright
  18. // notice, this list of conditions and the following disclaimer.
  19. //
  20. // Redistributions in binary form must reproduce the above copyright
  21. // notice, this list of conditions and the following disclaimer in the
  22. // documentation and/or other materials provided with the
  23. // distribution.
  24. //
  25. // Neither the name of Texas Instruments Incorporated nor the names of
  26. // its contributors may be used to endorse or promote products derived
  27. // from this software without specific prior written permission.
  28. //
  29. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40. // $
  41. //###########################################################################
  42. #ifndef __F2837xD_DCSM_H__
  43. #define __F2837xD_DCSM_H__
  44. #ifdef __cplusplus
  45. extern "C" {
  46. #endif
  47. //---------------------------------------------------------------------------
  48. // DCSM Individual Register Bit Definitions:
  49. struct Z1_LINKPOINTER_BITS { // bits description
  50. Uint32 LINKPOINTER:29; // 28:0 Zone1 LINK Pointer.
  51. Uint16 rsvd1:3; // 31:29 Reserved
  52. };
  53. union Z1_LINKPOINTER_REG {
  54. Uint32 all;
  55. struct Z1_LINKPOINTER_BITS bit;
  56. };
  57. struct Z1_OTPSECLOCK_BITS { // bits description
  58. Uint16 rsvd1:4; // 3:0 Reserved
  59. Uint16 PSWDLOCK:4; // 7:4 Zone1 Password Lock.
  60. Uint16 CRCLOCK:4; // 11:8 Zone1 CRC Lock.
  61. Uint16 rsvd2:4; // 15:12 Reserved
  62. Uint16 rsvd3:16; // 31:16 Reserved
  63. };
  64. union Z1_OTPSECLOCK_REG {
  65. Uint32 all;
  66. struct Z1_OTPSECLOCK_BITS bit;
  67. };
  68. struct Z1_BOOTCTRL_BITS { // bits description
  69. Uint16 KEY:8; // 7:0 OTP Boot Key
  70. Uint16 BMODE:8; // 15:8 OTP Boot Mode
  71. Uint16 BOOTPIN0:8; // 23:16 OTP Boot Pin 0 Mapping
  72. Uint16 BOOTPIN1:8; // 31:24 OTP Boot Pin 1 Mapping
  73. };
  74. union Z1_BOOTCTRL_REG {
  75. Uint32 all;
  76. struct Z1_BOOTCTRL_BITS bit;
  77. };
  78. struct Z1_CR_BITS { // bits description
  79. Uint16 rsvd1:3; // 2:0 Reserved
  80. Uint16 ALLZERO:1; // 3 CSMPSWD All Zeros
  81. Uint16 ALLONE:1; // 4 CSMPSWD All Ones
  82. Uint16 UNSECURE:1; // 5 CSMPSWD Match CSMKEY
  83. Uint16 ARMED:1; // 6 CSM Armed
  84. Uint16 rsvd2:1; // 7 Reserved
  85. Uint16 rsvd3:7; // 14:8 Reserved
  86. Uint16 FORCESEC:1; // 15 Force Secure
  87. };
  88. union Z1_CR_REG {
  89. Uint16 all;
  90. struct Z1_CR_BITS bit;
  91. };
  92. struct Z1_GRABSECTR_BITS { // bits description
  93. Uint16 GRAB_SECTA:2; // 1:0 Grab Flash Sector A
  94. Uint16 GRAB_SECTB:2; // 3:2 Grab Flash Sector B
  95. Uint16 GRAB_SECTC:2; // 5:4 Grab Flash Sector C
  96. Uint16 GRAB_SECTD:2; // 7:6 Grab Flash Sector D
  97. Uint16 GRAB_SECTE:2; // 9:8 Grab Flash Sector E
  98. Uint16 GRAB_SECTF:2; // 11:10 Grab Flash Sector F
  99. Uint16 GRAB_SECTG:2; // 13:12 Grab Flash Sector G
  100. Uint16 GRAB_SECTH:2; // 15:14 Grab Flash Sector H
  101. Uint16 GRAB_SECTI:2; // 17:16 Grab Flash Sector I
  102. Uint16 GRAB_SECTJ:2; // 19:18 Grab Flash Sector J
  103. Uint16 GRAB_SECTK:2; // 21:20 Grab Flash Sector K
  104. Uint16 GRAB_SECTL:2; // 23:22 Grab Flash Sector L
  105. Uint16 GRAB_SECTM:2; // 25:24 Grab Flash Sector M
  106. Uint16 GRAB_SECTN:2; // 27:26 Grab Flash Sector N
  107. Uint16 rsvd1:2; // 29:28 Reserved
  108. Uint16 rsvd2:2; // 31:30 Reserved
  109. };
  110. union Z1_GRABSECTR_REG {
  111. Uint32 all;
  112. struct Z1_GRABSECTR_BITS bit;
  113. };
  114. struct Z1_GRABRAMR_BITS { // bits description
  115. Uint16 GRAB_RAM0:2; // 1:0 Grab RAM LS0
  116. Uint16 GRAB_RAM1:2; // 3:2 Grab RAM LS1
  117. Uint16 GRAB_RAM2:2; // 5:4 Grab RAM LS2
  118. Uint16 GRAB_RAM3:2; // 7:6 Grab RAM LS3
  119. Uint16 GRAB_RAM4:2; // 9:8 Grab RAM LS4
  120. Uint16 GRAB_RAM5:2; // 11:10 Grab RAM LS5
  121. Uint16 GRAB_RAM6:2; // 13:12 Grab RAM D0
  122. Uint16 GRAB_RAM7:2; // 15:14 Grab RAM D1
  123. Uint16 rsvd1:12; // 27:16 Reserved
  124. Uint16 GRAB_CLA1:2; // 29:28 Grab CLA1
  125. Uint16 rsvd2:2; // 31:30 Reserved
  126. };
  127. union Z1_GRABRAMR_REG {
  128. Uint32 all;
  129. struct Z1_GRABRAMR_BITS bit;
  130. };
  131. struct Z1_EXEONLYSECTR_BITS { // bits description
  132. Uint16 EXEONLY_SECTA:1; // 0 Execute-Only Flash Sector A
  133. Uint16 EXEONLY_SECTB:1; // 1 Execute-Only Flash Sector B
  134. Uint16 EXEONLY_SECTC:1; // 2 Execute-Only Flash Sector C
  135. Uint16 EXEONLY_SECTD:1; // 3 Execute-Only Flash Sector D
  136. Uint16 EXEONLY_SECTE:1; // 4 Execute-Only Flash Sector E
  137. Uint16 EXEONLY_SECTF:1; // 5 Execute-Only Flash Sector F
  138. Uint16 EXEONLY_SECTG:1; // 6 Execute-Only Flash Sector G
  139. Uint16 EXEONLY_SECTH:1; // 7 Execute-Only Flash Sector H
  140. Uint16 EXEONLY_SECTI:1; // 8 Execute-Only Flash Sector I
  141. Uint16 EXEONLY_SECTJ:1; // 9 Execute-Only Flash Sector J
  142. Uint16 EXEONLY_SECTK:1; // 10 Execute-Only Flash Sector K
  143. Uint16 EXEONLY_SECTL:1; // 11 Execute-Only Flash Sector L
  144. Uint16 EXEONLY_SECTM:1; // 12 Execute-Only Flash Sector M
  145. Uint16 EXEONLY_SECTN:1; // 13 Execute-Only Flash Sector N
  146. Uint16 rsvd1:1; // 14 Reserved
  147. Uint16 rsvd2:1; // 15 Reserved
  148. Uint16 rsvd3:16; // 31:16 Reserved
  149. };
  150. union Z1_EXEONLYSECTR_REG {
  151. Uint32 all;
  152. struct Z1_EXEONLYSECTR_BITS bit;
  153. };
  154. struct Z1_EXEONLYRAMR_BITS { // bits description
  155. Uint16 EXEONLY_RAM0:1; // 0 Execute-Only RAM LS0
  156. Uint16 EXEONLY_RAM1:1; // 1 Execute-Only RAM LS1
  157. Uint16 EXEONLY_RAM2:1; // 2 Execute-Only RAM LS2
  158. Uint16 EXEONLY_RAM3:1; // 3 Execute-Only RAM LS3
  159. Uint16 EXEONLY_RAM4:1; // 4 Execute-Only RAM LS4
  160. Uint16 EXEONLY_RAM5:1; // 5 Execute-Only RAM LS5
  161. Uint16 EXEONLY_RAM6:1; // 6 Execute-Only RAM D0
  162. Uint16 EXEONLY_RAM7:1; // 7 Execute-Only RAM D1
  163. Uint16 rsvd1:8; // 15:8 Reserved
  164. Uint16 rsvd2:16; // 31:16 Reserved
  165. };
  166. union Z1_EXEONLYRAMR_REG {
  167. Uint32 all;
  168. struct Z1_EXEONLYRAMR_BITS bit;
  169. };
  170. struct DCSM_Z1_REGS {
  171. union Z1_LINKPOINTER_REG Z1_LINKPOINTER; // Zone 1 Link Pointer
  172. union Z1_OTPSECLOCK_REG Z1_OTPSECLOCK; // Zone 1 OTP Secure JTAG lock
  173. union Z1_BOOTCTRL_REG Z1_BOOTCTRL; // Boot Mode
  174. Uint32 Z1_LINKPOINTERERR; // Link Pointer Error
  175. Uint16 rsvd1[8]; // Reserved
  176. Uint32 Z1_CSMKEY0; // Zone 1 CSM Key 0
  177. Uint32 Z1_CSMKEY1; // Zone 1 CSM Key 1
  178. Uint32 Z1_CSMKEY2; // Zone 1 CSM Key 2
  179. Uint32 Z1_CSMKEY3; // Zone 1 CSM Key 3
  180. Uint16 rsvd2; // Reserved
  181. union Z1_CR_REG Z1_CR; // Zone 1 CSM Control Register
  182. union Z1_GRABSECTR_REG Z1_GRABSECTR; // Zone 1 Grab Flash Sectors Register
  183. union Z1_GRABRAMR_REG Z1_GRABRAMR; // Zone 1 Grab RAM Blocks Register
  184. union Z1_EXEONLYSECTR_REG Z1_EXEONLYSECTR; // Zone 1 Flash Execute_Only Sector Register
  185. union Z1_EXEONLYRAMR_REG Z1_EXEONLYRAMR; // Zone 1 RAM Execute_Only Block Register
  186. Uint16 rsvd3; // Reserved
  187. };
  188. struct Z2_LINKPOINTER_BITS { // bits description
  189. Uint32 LINKPOINTER:29; // 28:0 Zone2 LINK Pointer.
  190. Uint16 rsvd1:3; // 31:29 Reserved
  191. };
  192. union Z2_LINKPOINTER_REG {
  193. Uint32 all;
  194. struct Z2_LINKPOINTER_BITS bit;
  195. };
  196. struct Z2_OTPSECLOCK_BITS { // bits description
  197. Uint16 rsvd1:4; // 3:0 Reserved
  198. Uint16 PSWDLOCK:4; // 7:4 Zone2 Password Lock.
  199. Uint16 CRCLOCK:4; // 11:8 Zone2 CRC Lock.
  200. Uint16 rsvd2:4; // 15:12 Reserved
  201. Uint16 rsvd3:16; // 31:16 Reserved
  202. };
  203. union Z2_OTPSECLOCK_REG {
  204. Uint32 all;
  205. struct Z2_OTPSECLOCK_BITS bit;
  206. };
  207. struct Z2_BOOTCTRL_BITS { // bits description
  208. Uint16 KEY:8; // 7:0 OTP Boot Key
  209. Uint16 BMODE:8; // 15:8 OTP Boot Mode
  210. Uint16 BOOTPIN0:8; // 23:16 OTP Boot Pin 0 Mapping
  211. Uint16 BOOTPIN1:8; // 31:24 OTP Boot Pin 1 Mapping
  212. };
  213. union Z2_BOOTCTRL_REG {
  214. Uint32 all;
  215. struct Z2_BOOTCTRL_BITS bit;
  216. };
  217. struct Z2_CR_BITS { // bits description
  218. Uint16 rsvd1:3; // 2:0 Reserved
  219. Uint16 ALLZERO:1; // 3 CSMPSWD All Zeros
  220. Uint16 ALLONE:1; // 4 CSMPSWD All Ones
  221. Uint16 UNSECURE:1; // 5 CSMPSWD Match CSMKEY
  222. Uint16 ARMED:1; // 6 CSM Armed
  223. Uint16 rsvd2:1; // 7 Reserved
  224. Uint16 rsvd3:7; // 14:8 Reserved
  225. Uint16 FORCESEC:1; // 15 Force Secure
  226. };
  227. union Z2_CR_REG {
  228. Uint16 all;
  229. struct Z2_CR_BITS bit;
  230. };
  231. struct Z2_GRABSECTR_BITS { // bits description
  232. Uint16 GRAB_SECTA:2; // 1:0 Grab Flash Sector A
  233. Uint16 GRAB_SECTB:2; // 3:2 Grab Flash Sector B
  234. Uint16 GRAB_SECTC:2; // 5:4 Grab Flash Sector C
  235. Uint16 GRAB_SECTD:2; // 7:6 Grab Flash Sector D
  236. Uint16 GRAB_SECTE:2; // 9:8 Grab Flash Sector E
  237. Uint16 GRAB_SECTF:2; // 11:10 Grab Flash Sector F
  238. Uint16 GRAB_SECTG:2; // 13:12 Grab Flash Sector G
  239. Uint16 GRAB_SECTH:2; // 15:14 Grab Flash Sector H
  240. Uint16 GRAB_SECTI:2; // 17:16 Grab Flash Sector I
  241. Uint16 GRAB_SECTJ:2; // 19:18 Grab Flash Sector J
  242. Uint16 GRAB_SECTK:2; // 21:20 Grab Flash Sector K
  243. Uint16 GRAB_SECTL:2; // 23:22 Grab Flash Sector L
  244. Uint16 GRAB_SECTM:2; // 25:24 Grab Flash Sector M
  245. Uint16 GRAB_SECTN:2; // 27:26 Grab Flash Sector N
  246. Uint16 rsvd1:2; // 29:28 Reserved
  247. Uint16 rsvd2:2; // 31:30 Reserved
  248. };
  249. union Z2_GRABSECTR_REG {
  250. Uint32 all;
  251. struct Z2_GRABSECTR_BITS bit;
  252. };
  253. struct Z2_GRABRAMR_BITS { // bits description
  254. Uint16 GRAB_RAM0:2; // 1:0 Grab RAM LS0
  255. Uint16 GRAB_RAM1:2; // 3:2 Grab RAM LS1
  256. Uint16 GRAB_RAM2:2; // 5:4 Grab RAM LS2
  257. Uint16 GRAB_RAM3:2; // 7:6 Grab RAM LS3
  258. Uint16 GRAB_RAM4:2; // 9:8 Grab RAM LS4
  259. Uint16 GRAB_RAM5:2; // 11:10 Grab RAM LS5
  260. Uint16 GRAB_RAM6:2; // 13:12 Grab RAM D0
  261. Uint16 GRAB_RAM7:2; // 15:14 Grab RAM D1
  262. Uint16 rsvd1:12; // 27:16 Reserved
  263. Uint16 GRAB_CLA1:2; // 29:28 Grab CLA1
  264. Uint16 rsvd2:2; // 31:30 Reserved
  265. };
  266. union Z2_GRABRAMR_REG {
  267. Uint32 all;
  268. struct Z2_GRABRAMR_BITS bit;
  269. };
  270. struct Z2_EXEONLYSECTR_BITS { // bits description
  271. Uint16 EXEONLY_SECTA:1; // 0 Execute-Only Flash Sector A
  272. Uint16 EXEONLY_SECTB:1; // 1 Execute-Only Flash Sector B
  273. Uint16 EXEONLY_SECTC:1; // 2 Execute-Only Flash Sector C
  274. Uint16 EXEONLY_SECTD:1; // 3 Execute-Only Flash Sector D
  275. Uint16 EXEONLY_SECTE:1; // 4 Execute-Only Flash Sector E
  276. Uint16 EXEONLY_SECTF:1; // 5 Execute-Only Flash Sector F
  277. Uint16 EXEONLY_SECTG:1; // 6 Execute-Only Flash Sector G
  278. Uint16 EXEONLY_SECTH:1; // 7 Execute-Only Flash Sector H
  279. Uint16 EXEONLY_SECTI:1; // 8 Execute-Only Flash Sector I
  280. Uint16 EXEONLY_SECTJ:1; // 9 Execute-Only Flash Sector J
  281. Uint16 EXEONLY_SECTK:1; // 10 Execute-Only Flash Sector K
  282. Uint16 EXEONLY_SECTL:1; // 11 Execute-Only Flash Sector L
  283. Uint16 EXEONLY_SECTM:1; // 12 Execute-Only Flash Sector M
  284. Uint16 EXEONLY_SECTN:1; // 13 Execute-Only Flash Sector N
  285. Uint16 rsvd1:1; // 14 Reserved
  286. Uint16 rsvd2:1; // 15 Reserved
  287. Uint16 rsvd3:16; // 31:16 Reserved
  288. };
  289. union Z2_EXEONLYSECTR_REG {
  290. Uint32 all;
  291. struct Z2_EXEONLYSECTR_BITS bit;
  292. };
  293. struct Z2_EXEONLYRAMR_BITS { // bits description
  294. Uint16 EXEONLY_RAM0:1; // 0 Execute-Only RAM LS0
  295. Uint16 EXEONLY_RAM1:1; // 1 Execute-Only RAM LS1
  296. Uint16 EXEONLY_RAM2:1; // 2 Execute-Only RAM LS2
  297. Uint16 EXEONLY_RAM3:1; // 3 Execute-Only RAM LS3
  298. Uint16 EXEONLY_RAM4:1; // 4 Execute-Only RAM LS4
  299. Uint16 EXEONLY_RAM5:1; // 5 Execute-Only RAM LS5
  300. Uint16 EXEONLY_RAM6:1; // 6 Execute-Only RAM D0
  301. Uint16 EXEONLY_RAM7:1; // 7 Execute-Only RAM D1
  302. Uint16 rsvd1:8; // 15:8 Reserved
  303. Uint16 rsvd2:16; // 31:16 Reserved
  304. };
  305. union Z2_EXEONLYRAMR_REG {
  306. Uint32 all;
  307. struct Z2_EXEONLYRAMR_BITS bit;
  308. };
  309. struct DCSM_Z2_REGS {
  310. union Z2_LINKPOINTER_REG Z2_LINKPOINTER; // Zone 2 Link Pointer
  311. union Z2_OTPSECLOCK_REG Z2_OTPSECLOCK; // Zone 2 OTP Secure JTAG lock
  312. union Z2_BOOTCTRL_REG Z2_BOOTCTRL; // Boot Mode
  313. Uint32 Z2_LINKPOINTERERR; // Link Pointer Error
  314. Uint16 rsvd1[8]; // Reserved
  315. Uint32 Z2_CSMKEY0; // Zone 2 CSM Key 0
  316. Uint32 Z2_CSMKEY1; // Zone 2 CSM Key 1
  317. Uint32 Z2_CSMKEY2; // Zone 2 CSM Key 2
  318. Uint32 Z2_CSMKEY3; // Zone 2 CSM Key 3
  319. Uint16 rsvd2; // Reserved
  320. union Z2_CR_REG Z2_CR; // Zone 2 CSM Control Register
  321. union Z2_GRABSECTR_REG Z2_GRABSECTR; // Zone 2 Grab Flash Sectors Register
  322. union Z2_GRABRAMR_REG Z2_GRABRAMR; // Zone 2 Grab RAM Blocks Register
  323. union Z2_EXEONLYSECTR_REG Z2_EXEONLYSECTR; // Zone 2 Flash Execute_Only Sector Register
  324. union Z2_EXEONLYRAMR_REG Z2_EXEONLYRAMR; // Zone 2 RAM Execute_Only Block Register
  325. Uint16 rsvd3; // Reserved
  326. };
  327. struct FLSEM_BITS { // bits description
  328. Uint16 SEM:2; // 1:0 Flash Semaphore Bit
  329. Uint16 rsvd1:6; // 7:2 Reserved
  330. Uint16 KEY:8; // 15:8 Semaphore Key
  331. Uint16 rsvd2:16; // 31:16 Reserved
  332. };
  333. union FLSEM_REG {
  334. Uint32 all;
  335. struct FLSEM_BITS bit;
  336. };
  337. struct SECTSTAT_BITS { // bits description
  338. Uint16 STATUS_SECTA:2; // 1:0 Zone Status Flash Sector A
  339. Uint16 STATUS_SECTB:2; // 3:2 Zone Status Flash Sector B
  340. Uint16 STATUS_SECTC:2; // 5:4 Zone Status Flash Sector C
  341. Uint16 STATUS_SECTD:2; // 7:6 Zone Status Flash Sector D
  342. Uint16 STATUS_SECTE:2; // 9:8 Zone Status Flash Sector E
  343. Uint16 STATUS_SECTF:2; // 11:10 Zone Status Flash Sector F
  344. Uint16 STATUS_SECTG:2; // 13:12 Zone Status Flash Sector G
  345. Uint16 STATUS_SECTH:2; // 15:14 Zone Status Flash Sector H
  346. Uint16 STATUS_SECTI:2; // 17:16 Zone Status Flash Sector I
  347. Uint16 STATUS_SECTJ:2; // 19:18 Zone Status Flash Sector J
  348. Uint16 STATUS_SECTK:2; // 21:20 Zone Status Flash Sector K
  349. Uint16 STATUS_SECTL:2; // 23:22 Zone Status Flash Sector L
  350. Uint16 STATUS_SECTM:2; // 25:24 Zone Status Flash Sector M
  351. Uint16 STATUS_SECTN:2; // 27:26 Zone Status Flash Sector N
  352. Uint16 rsvd1:2; // 29:28 Reserved
  353. Uint16 rsvd2:2; // 31:30 Reserved
  354. };
  355. union SECTSTAT_REG {
  356. Uint32 all;
  357. struct SECTSTAT_BITS bit;
  358. };
  359. struct RAMSTAT_BITS { // bits description
  360. Uint16 STATUS_RAM0:2; // 1:0 Zone Status RAM LS0
  361. Uint16 STATUS_RAM1:2; // 3:2 Zone Status RAM LS1
  362. Uint16 STATUS_RAM2:2; // 5:4 Zone Status RAM LS2
  363. Uint16 STATUS_RAM3:2; // 7:6 Zone Status RAM LS3
  364. Uint16 STATUS_RAM4:2; // 9:8 Zone Status RAM LS4
  365. Uint16 STATUS_RAM5:2; // 11:10 Zone Status RAM LS5
  366. Uint16 STATUS_RAM6:2; // 13:12 Zone Status RAM D0
  367. Uint16 STATUS_RAM7:2; // 15:14 Zone Status RAM D1
  368. Uint16 rsvd1:12; // 27:16 Reserved
  369. Uint16 STATUS_CLA1:2; // 29:28 Zone Status CLA1
  370. Uint16 rsvd2:2; // 31:30 Reserved
  371. };
  372. union RAMSTAT_REG {
  373. Uint32 all;
  374. struct RAMSTAT_BITS bit;
  375. };
  376. struct DCSM_COMMON_REGS {
  377. union FLSEM_REG FLSEM; // Flash Wrapper Semaphore Register
  378. union SECTSTAT_REG SECTSTAT; // Sectors Status Register
  379. union RAMSTAT_REG RAMSTAT; // RAM Status Register
  380. Uint16 rsvd1[2]; // Reserved
  381. };
  382. //---------------------------------------------------------------------------
  383. // DCSM External References & Function Declarations:
  384. //
  385. #ifdef CPU1
  386. extern volatile struct DCSM_Z1_REGS DcsmZ1Regs;
  387. extern volatile struct DCSM_Z2_REGS DcsmZ2Regs;
  388. extern volatile struct DCSM_COMMON_REGS DcsmCommonRegs;
  389. #endif
  390. #ifdef CPU2
  391. extern volatile struct DCSM_Z1_REGS DcsmZ1Regs;
  392. extern volatile struct DCSM_Z2_REGS DcsmZ2Regs;
  393. extern volatile struct DCSM_COMMON_REGS DcsmCommonRegs;
  394. #endif
  395. #ifdef __cplusplus
  396. }
  397. #endif /* extern "C" */
  398. #endif
  399. //===========================================================================
  400. // End of file.
  401. //===========================================================================