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F2837xD_epwm_xbar.h

F2837xD_epwm_xbar.h 53 KB
Cronologia Originale

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  1. //###########################################################################
    2. 

  2. //
    3. 

  3. // FILE:    F2837xD_epwm_xbar.h
    4. 

  4. //
    5. 

  5. // TITLE:   EPWM_XBAR Register Definitions.
    6. 

  6. //
    7. 

  7. //###########################################################################
    8. 

  8. // $TI Release: F2837xD Support Library v3.05.00.00 $
    9. 

  9. // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
    10. 

  10. // $Copyright:
    11. 

  11. // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
    12. 

  12. //
    13. 

  13. // Redistribution and use in source and binary forms, with or without 
    14. 

  14. // modification, are permitted provided that the following conditions 
    15. 

  15. // are met:
    16. 

  16. // 
    17. 

  17. //   Redistributions of source code must retain the above copyright 
    18. 

  18. //   notice, this list of conditions and the following disclaimer.
    19. 

  19. // 
    20. 

  20. //   Redistributions in binary form must reproduce the above copyright
    21. 

  21. //   notice, this list of conditions and the following disclaimer in the 
    22. 

  22. //   documentation and/or other materials provided with the   
    23. 

  23. //   distribution.
    24. 

  24. // 
    25. 

  25. //   Neither the name of Texas Instruments Incorporated nor the names of
    26. 

  26. //   its contributors may be used to endorse or promote products derived
    27. 

  27. //   from this software without specific prior written permission.
    28. 

  28. // 
    29. 

  29. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
    30. 

  30. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
    31. 

  31. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    32. 

  32. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
    33. 

  33. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
    34. 

  34. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
    35. 

  35. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    36. 

  36. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    37. 

  37. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
    38. 

  38. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
    39. 

  39. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    40. 

  40. // $
    41. 

  41. //###########################################################################
    42. 

  42. 

  43. #ifndef __F2837xD_EPWM_XBAR_H__
    44. 

  44. #define __F2837xD_EPWM_XBAR_H__
    45. 

  45. 

  46. #ifdef __cplusplus
    47. 

  47. extern "C" {
    48. 

  48. #endif
    49. 

  49. 

  50. 

  51. //---------------------------------------------------------------------------
    52. 

  52. // EPWM_XBAR Individual Register Bit Definitions:
    53. 

  53. 

  54. struct TRIP4MUX0TO15CFG_BITS {          // bits description
    55. 

  55.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP4 of EPWM-XBAR
    56. 

  56.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP4 of EPWM-XBAR
    57. 

  57.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP4 of EPWM-XBAR
    58. 

  58.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP4 of EPWM-XBAR
    59. 

  59.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP4 of EPWM-XBAR
    60. 

  60.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP4 of EPWM-XBAR
    61. 

  61.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP4 of EPWM-XBAR
    62. 

  62.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP4 of EPWM-XBAR
    63. 

  63.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP4 of EPWM-XBAR
    64. 

  64.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP4 of EPWM-XBAR
    65. 

  65.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP4 of EPWM-XBAR
    66. 

  66.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP4 of EPWM-XBAR
    67. 

  67.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP4 of EPWM-XBAR
    68. 

  68.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP4 of EPWM-XBAR
    69. 

  69.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP4 of EPWM-XBAR
    70. 

  70.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP4 of EPWM-XBAR
    71. 

  71. };
    72. 

  72. 

  73. union TRIP4MUX0TO15CFG_REG {
    74. 

  74.     Uint32  all;
    75. 

  75.     struct  TRIP4MUX0TO15CFG_BITS  bit;
    76. 

  76. };
    77. 

  77. 

  78. struct TRIP4MUX16TO31CFG_BITS {         // bits description
    79. 

  79.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP4 of EPWM-XBAR
    80. 

  80.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP4 of EPWM-XBAR
    81. 

  81.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP4 of EPWM-XBAR
    82. 

  82.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP4 of EPWM-XBAR
    83. 

  83.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP4 of EPWM-XBAR
    84. 

  84.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP4 of EPWM-XBAR
    85. 

  85.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP4 of EPWM-XBAR
    86. 

  86.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP4 of EPWM-XBAR
    87. 

  87.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP4 of EPWM-XBAR
    88. 

  88.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP4 of EPWM-XBAR
    89. 

  89.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP4 of EPWM-XBAR
    90. 

  90.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP4 of EPWM-XBAR
    91. 

  91.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP4 of EPWM-XBAR
    92. 

  92.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP4 of EPWM-XBAR
    93. 

  93.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP4 of EPWM-XBAR
    94. 

  94.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP4 of EPWM-XBAR
    95. 

  95. };
    96. 

  96. 

  97. union TRIP4MUX16TO31CFG_REG {
    98. 

  98.     Uint32  all;
    99. 

  99.     struct  TRIP4MUX16TO31CFG_BITS  bit;
    100. 

  100. };
    101. 

  101. 

  102. struct TRIP5MUX0TO15CFG_BITS {          // bits description
    103. 

  103.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP5 of EPWM-XBAR
    104. 

  104.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP5 of EPWM-XBAR
    105. 

  105.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP5 of EPWM-XBAR
    106. 

  106.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP5 of EPWM-XBAR
    107. 

  107.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP5 of EPWM-XBAR
    108. 

  108.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP5 of EPWM-XBAR
    109. 

  109.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP5 of EPWM-XBAR
    110. 

  110.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP5 of EPWM-XBAR
    111. 

  111.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP5 of EPWM-XBAR
    112. 

  112.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP5 of EPWM-XBAR
    113. 

  113.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP5 of EPWM-XBAR
    114. 

  114.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP5 of EPWM-XBAR
    115. 

  115.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP5 of EPWM-XBAR
    116. 

  116.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP5 of EPWM-XBAR
    117. 

  117.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP5 of EPWM-XBAR
    118. 

  118.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP5 of EPWM-XBAR
    119. 

  119. };
    120. 

  120. 

  121. union TRIP5MUX0TO15CFG_REG {
    122. 

  122.     Uint32  all;
    123. 

  123.     struct  TRIP5MUX0TO15CFG_BITS  bit;
    124. 

  124. };
    125. 

  125. 

  126. struct TRIP5MUX16TO31CFG_BITS {         // bits description
    127. 

  127.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP5 of EPWM-XBAR
    128. 

  128.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP5 of EPWM-XBAR
    129. 

  129.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP5 of EPWM-XBAR
    130. 

  130.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP5 of EPWM-XBAR
    131. 

  131.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP5 of EPWM-XBAR
    132. 

  132.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP5 of EPWM-XBAR
    133. 

  133.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP5 of EPWM-XBAR
    134. 

  134.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP5 of EPWM-XBAR
    135. 

  135.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP5 of EPWM-XBAR
    136. 

  136.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP5 of EPWM-XBAR
    137. 

  137.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP5 of EPWM-XBAR
    138. 

  138.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP5 of EPWM-XBAR
    139. 

  139.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP5 of EPWM-XBAR
    140. 

  140.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP5 of EPWM-XBAR
    141. 

  141.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP5 of EPWM-XBAR
    142. 

  142.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP5 of EPWM-XBAR
    143. 

  143. };
    144. 

  144. 

  145. union TRIP5MUX16TO31CFG_REG {
    146. 

  146.     Uint32  all;
    147. 

  147.     struct  TRIP5MUX16TO31CFG_BITS  bit;
    148. 

  148. };
    149. 

  149. 

  150. struct TRIP7MUX0TO15CFG_BITS {          // bits description
    151. 

  151.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP7 of EPWM-XBAR
    152. 

  152.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP7 of EPWM-XBAR
    153. 

  153.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP7 of EPWM-XBAR
    154. 

  154.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP7 of EPWM-XBAR
    155. 

  155.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP7 of EPWM-XBAR
    156. 

  156.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP7 of EPWM-XBAR
    157. 

  157.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP7 of EPWM-XBAR
    158. 

  158.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP7 of EPWM-XBAR
    159. 

  159.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP7 of EPWM-XBAR
    160. 

  160.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP7 of EPWM-XBAR
    161. 

  161.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP7 of EPWM-XBAR
    162. 

  162.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP7 of EPWM-XBAR
    163. 

  163.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP7 of EPWM-XBAR
    164. 

  164.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP7 of EPWM-XBAR
    165. 

  165.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP7 of EPWM-XBAR
    166. 

  166.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP7 of EPWM-XBAR
    167. 

  167. };
    168. 

  168. 

  169. union TRIP7MUX0TO15CFG_REG {
    170. 

  170.     Uint32  all;
    171. 

  171.     struct  TRIP7MUX0TO15CFG_BITS  bit;
    172. 

  172. };
    173. 

  173. 

  174. struct TRIP7MUX16TO31CFG_BITS {         // bits description
    175. 

  175.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP7 of EPWM-XBAR
    176. 

  176.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP7 of EPWM-XBAR
    177. 

  177.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP7 of EPWM-XBAR
    178. 

  178.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP7 of EPWM-XBAR
    179. 

  179.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP7 of EPWM-XBAR
    180. 

  180.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP7 of EPWM-XBAR
    181. 

  181.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP7 of EPWM-XBAR
    182. 

  182.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP7 of EPWM-XBAR
    183. 

  183.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP7 of EPWM-XBAR
    184. 

  184.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP7 of EPWM-XBAR
    185. 

  185.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP7 of EPWM-XBAR
    186. 

  186.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP7 of EPWM-XBAR
    187. 

  187.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP7 of EPWM-XBAR
    188. 

  188.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP7 of EPWM-XBAR
    189. 

  189.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP7 of EPWM-XBAR
    190. 

  190.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP7 of EPWM-XBAR
    191. 

  191. };
    192. 

  192. 

  193. union TRIP7MUX16TO31CFG_REG {
    194. 

  194.     Uint32  all;
    195. 

  195.     struct  TRIP7MUX16TO31CFG_BITS  bit;
    196. 

  196. };
    197. 

  197. 

  198. struct TRIP8MUX0TO15CFG_BITS {          // bits description
    199. 

  199.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP8 of EPWM-XBAR
    200. 

  200.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP8 of EPWM-XBAR
    201. 

  201.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP8 of EPWM-XBAR
    202. 

  202.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP8 of EPWM-XBAR
    203. 

  203.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP8 of EPWM-XBAR
    204. 

  204.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP8 of EPWM-XBAR
    205. 

  205.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP8 of EPWM-XBAR
    206. 

  206.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP8 of EPWM-XBAR
    207. 

  207.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP8 of EPWM-XBAR
    208. 

  208.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP8 of EPWM-XBAR
    209. 

  209.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP8 of EPWM-XBAR
    210. 

  210.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP8 of EPWM-XBAR
    211. 

  211.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP8 of EPWM-XBAR
    212. 

  212.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP8 of EPWM-XBAR
    213. 

  213.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP8 of EPWM-XBAR
    214. 

  214.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP8 of EPWM-XBAR
    215. 

  215. };
    216. 

  216. 

  217. union TRIP8MUX0TO15CFG_REG {
    218. 

  218.     Uint32  all;
    219. 

  219.     struct  TRIP8MUX0TO15CFG_BITS  bit;
    220. 

  220. };
    221. 

  221. 

  222. struct TRIP8MUX16TO31CFG_BITS {         // bits description
    223. 

  223.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP8 of EPWM-XBAR
    224. 

  224.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP8 of EPWM-XBAR
    225. 

  225.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP8 of EPWM-XBAR
    226. 

  226.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP8 of EPWM-XBAR
    227. 

  227.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP8 of EPWM-XBAR
    228. 

  228.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP8 of EPWM-XBAR
    229. 

  229.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP8 of EPWM-XBAR
    230. 

  230.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP8 of EPWM-XBAR
    231. 

  231.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP8 of EPWM-XBAR
    232. 

  232.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP8 of EPWM-XBAR
    233. 

  233.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP8 of EPWM-XBAR
    234. 

  234.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP8 of EPWM-XBAR
    235. 

  235.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP8 of EPWM-XBAR
    236. 

  236.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP8 of EPWM-XBAR
    237. 

  237.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP8 of EPWM-XBAR
    238. 

  238.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP8 of EPWM-XBAR
    239. 

  239. };
    240. 

  240. 

  241. union TRIP8MUX16TO31CFG_REG {
    242. 

  242.     Uint32  all;
    243. 

  243.     struct  TRIP8MUX16TO31CFG_BITS  bit;
    244. 

  244. };
    245. 

  245. 

  246. struct TRIP9MUX0TO15CFG_BITS {          // bits description
    247. 

  247.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP9 of EPWM-XBAR
    248. 

  248.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP9 of EPWM-XBAR
    249. 

  249.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP9 of EPWM-XBAR
    250. 

  250.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP9 of EPWM-XBAR
    251. 

  251.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP9 of EPWM-XBAR
    252. 

  252.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP9 of EPWM-XBAR
    253. 

  253.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP9 of EPWM-XBAR
    254. 

  254.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP9 of EPWM-XBAR
    255. 

  255.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP9 of EPWM-XBAR
    256. 

  256.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP9 of EPWM-XBAR
    257. 

  257.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP9 of EPWM-XBAR
    258. 

  258.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP9 of EPWM-XBAR
    259. 

  259.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP9 of EPWM-XBAR
    260. 

  260.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP9 of EPWM-XBAR
    261. 

  261.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP9 of EPWM-XBAR
    262. 

  262.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP9 of EPWM-XBAR
    263. 

  263. };
    264. 

  264. 

  265. union TRIP9MUX0TO15CFG_REG {
    266. 

  266.     Uint32  all;
    267. 

  267.     struct  TRIP9MUX0TO15CFG_BITS  bit;
    268. 

  268. };
    269. 

  269. 

  270. struct TRIP9MUX16TO31CFG_BITS {         // bits description
    271. 

  271.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP9 of EPWM-XBAR
    272. 

  272.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP9 of EPWM-XBAR
    273. 

  273.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP9 of EPWM-XBAR
    274. 

  274.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP9 of EPWM-XBAR
    275. 

  275.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP9 of EPWM-XBAR
    276. 

  276.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP9 of EPWM-XBAR
    277. 

  277.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP9 of EPWM-XBAR
    278. 

  278.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP9 of EPWM-XBAR
    279. 

  279.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP9 of EPWM-XBAR
    280. 

  280.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP9 of EPWM-XBAR
    281. 

  281.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP9 of EPWM-XBAR
    282. 

  282.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP9 of EPWM-XBAR
    283. 

  283.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP9 of EPWM-XBAR
    284. 

  284.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP9 of EPWM-XBAR
    285. 

  285.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP9 of EPWM-XBAR
    286. 

  286.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP9 of EPWM-XBAR
    287. 

  287. };
    288. 

  288. 

  289. union TRIP9MUX16TO31CFG_REG {
    290. 

  290.     Uint32  all;
    291. 

  291.     struct  TRIP9MUX16TO31CFG_BITS  bit;
    292. 

  292. };
    293. 

  293. 

  294. struct TRIP10MUX0TO15CFG_BITS {         // bits description
    295. 

  295.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP10 of EPWM-XBAR
    296. 

  296.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP10 of EPWM-XBAR
    297. 

  297.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP10 of EPWM-XBAR
    298. 

  298.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP10 of EPWM-XBAR
    299. 

  299.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP10 of EPWM-XBAR
    300. 

  300.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP10 of EPWM-XBAR
    301. 

  301.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP10 of EPWM-XBAR
    302. 

  302.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP10 of EPWM-XBAR
    303. 

  303.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP10 of EPWM-XBAR
    304. 

  304.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP10 of EPWM-XBAR
    305. 

  305.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP10 of EPWM-XBAR
    306. 

  306.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP10 of EPWM-XBAR
    307. 

  307.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP10 of EPWM-XBAR
    308. 

  308.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP10 of EPWM-XBAR
    309. 

  309.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP10 of EPWM-XBAR
    310. 

  310.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP10 of EPWM-XBAR
    311. 

  311. };
    312. 

  312. 

  313. union TRIP10MUX0TO15CFG_REG {
    314. 

  314.     Uint32  all;
    315. 

  315.     struct  TRIP10MUX0TO15CFG_BITS  bit;
    316. 

  316. };
    317. 

  317. 

  318. struct TRIP10MUX16TO31CFG_BITS {        // bits description
    319. 

  319.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP10 of EPWM-XBAR
    320. 

  320.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP10 of EPWM-XBAR
    321. 

  321.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP10 of EPWM-XBAR
    322. 

  322.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP10 of EPWM-XBAR
    323. 

  323.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP10 of EPWM-XBAR
    324. 

  324.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP10 of EPWM-XBAR
    325. 

  325.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP10 of EPWM-XBAR
    326. 

  326.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP10 of EPWM-XBAR
    327. 

  327.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP10 of EPWM-XBAR
    328. 

  328.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP10 of EPWM-XBAR
    329. 

  329.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP10 of EPWM-XBAR
    330. 

  330.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP10 of EPWM-XBAR
    331. 

  331.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP10 of EPWM-XBAR
    332. 

  332.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP10 of EPWM-XBAR
    333. 

  333.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP10 of EPWM-XBAR
    334. 

  334.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP10 of EPWM-XBAR
    335. 

  335. };
    336. 

  336. 

  337. union TRIP10MUX16TO31CFG_REG {
    338. 

  338.     Uint32  all;
    339. 

  339.     struct  TRIP10MUX16TO31CFG_BITS  bit;
    340. 

  340. };
    341. 

  341. 

  342. struct TRIP11MUX0TO15CFG_BITS {         // bits description
    343. 

  343.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP11 of EPWM-XBAR
    344. 

  344.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP11 of EPWM-XBAR
    345. 

  345.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP11 of EPWM-XBAR
    346. 

  346.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP11 of EPWM-XBAR
    347. 

  347.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP11 of EPWM-XBAR
    348. 

  348.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP11 of EPWM-XBAR
    349. 

  349.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP11 of EPWM-XBAR
    350. 

  350.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP11 of EPWM-XBAR
    351. 

  351.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP11 of EPWM-XBAR
    352. 

  352.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP11 of EPWM-XBAR
    353. 

  353.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP11 of EPWM-XBAR
    354. 

  354.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP11 of EPWM-XBAR
    355. 

  355.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP11 of EPWM-XBAR
    356. 

  356.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP11 of EPWM-XBAR
    357. 

  357.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP11 of EPWM-XBAR
    358. 

  358.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP11 of EPWM-XBAR
    359. 

  359. };
    360. 

  360. 

  361. union TRIP11MUX0TO15CFG_REG {
    362. 

  362.     Uint32  all;
    363. 

  363.     struct  TRIP11MUX0TO15CFG_BITS  bit;
    364. 

  364. };
    365. 

  365. 

  366. struct TRIP11MUX16TO31CFG_BITS {        // bits description
    367. 

  367.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP11 of EPWM-XBAR
    368. 

  368.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP11 of EPWM-XBAR
    369. 

  369.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP11 of EPWM-XBAR
    370. 

  370.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP11 of EPWM-XBAR
    371. 

  371.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP11 of EPWM-XBAR
    372. 

  372.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP11 of EPWM-XBAR
    373. 

  373.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP11 of EPWM-XBAR
    374. 

  374.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP11 of EPWM-XBAR
    375. 

  375.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP11 of EPWM-XBAR
    376. 

  376.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP11 of EPWM-XBAR
    377. 

  377.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP11 of EPWM-XBAR
    378. 

  378.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP11 of EPWM-XBAR
    379. 

  379.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP11 of EPWM-XBAR
    380. 

  380.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP11 of EPWM-XBAR
    381. 

  381.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP11 of EPWM-XBAR
    382. 

  382.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP11 of EPWM-XBAR
    383. 

  383. };
    384. 

  384. 

  385. union TRIP11MUX16TO31CFG_REG {
    386. 

  386.     Uint32  all;
    387. 

  387.     struct  TRIP11MUX16TO31CFG_BITS  bit;
    388. 

  388. };
    389. 

  389. 

  390. struct TRIP12MUX0TO15CFG_BITS {         // bits description
    391. 

  391.     Uint16 MUX0:2;                      // 1:0 Mux0 Configuration for TRIP12 of EPWM-XBAR
    392. 

  392.     Uint16 MUX1:2;                      // 3:2 Mux1 Configuration for TRIP12 of EPWM-XBAR
    393. 

  393.     Uint16 MUX2:2;                      // 5:4 Mux2 Configuration for TRIP12 of EPWM-XBAR
    394. 

  394.     Uint16 MUX3:2;                      // 7:6 Mux3 Configuration for TRIP12 of EPWM-XBAR
    395. 

  395.     Uint16 MUX4:2;                      // 9:8 Mux4 Configuration for TRIP12 of EPWM-XBAR
    396. 

  396.     Uint16 MUX5:2;                      // 11:10 Mux5 Configuration for TRIP12 of EPWM-XBAR
    397. 

  397.     Uint16 MUX6:2;                      // 13:12 Mux6 Configuration for TRIP12 of EPWM-XBAR
    398. 

  398.     Uint16 MUX7:2;                      // 15:14 Mux7 Configuration for TRIP12 of EPWM-XBAR
    399. 

  399.     Uint16 MUX8:2;                      // 17:16 Mux8 Configuration for TRIP12 of EPWM-XBAR
    400. 

  400.     Uint16 MUX9:2;                      // 19:18 Mux9 Configuration for TRIP12 of EPWM-XBAR
    401. 

  401.     Uint16 MUX10:2;                     // 21:20 Mux10 Configuration for TRIP12 of EPWM-XBAR
    402. 

  402.     Uint16 MUX11:2;                     // 23:22 Mux11 Configuration for TRIP12 of EPWM-XBAR
    403. 

  403.     Uint16 MUX12:2;                     // 25:24 Mux12 Configuration for TRIP12 of EPWM-XBAR
    404. 

  404.     Uint16 MUX13:2;                     // 27:26 Mux13 Configuration for TRIP12 of EPWM-XBAR
    405. 

  405.     Uint16 MUX14:2;                     // 29:28 Mux14 Configuration for TRIP12 of EPWM-XBAR
    406. 

  406.     Uint16 MUX15:2;                     // 31:30 Mux15 Configuration for TRIP12 of EPWM-XBAR
    407. 

  407. };
    408. 

  408. 

  409. union TRIP12MUX0TO15CFG_REG {
    410. 

  410.     Uint32  all;
    411. 

  411.     struct  TRIP12MUX0TO15CFG_BITS  bit;
    412. 

  412. };
    413. 

  413. 

  414. struct TRIP12MUX16TO31CFG_BITS {        // bits description
    415. 

  415.     Uint16 MUX16:2;                     // 1:0 Mux16 Configuration for TRIP12 of EPWM-XBAR
    416. 

  416.     Uint16 MUX17:2;                     // 3:2 Mux17 Configuration for TRIP12 of EPWM-XBAR
    417. 

  417.     Uint16 MUX18:2;                     // 5:4 Mux18 Configuration for TRIP12 of EPWM-XBAR
    418. 

  418.     Uint16 MUX19:2;                     // 7:6 Mux19 Configuration for TRIP12 of EPWM-XBAR
    419. 

  419.     Uint16 MUX20:2;                     // 9:8 Mux20 Configuration for TRIP12 of EPWM-XBAR
    420. 

  420.     Uint16 MUX21:2;                     // 11:10 Mux21 Configuration for TRIP12 of EPWM-XBAR
    421. 

  421.     Uint16 MUX22:2;                     // 13:12 Mux22 Configuration for TRIP12 of EPWM-XBAR
    422. 

  422.     Uint16 MUX23:2;                     // 15:14 Mux23 Configuration for TRIP12 of EPWM-XBAR
    423. 

  423.     Uint16 MUX24:2;                     // 17:16 Mux24 Configuration for TRIP12 of EPWM-XBAR
    424. 

  424.     Uint16 MUX25:2;                     // 19:18 Mux25 Configuration for TRIP12 of EPWM-XBAR
    425. 

  425.     Uint16 MUX26:2;                     // 21:20 Mux26 Configuration for TRIP12 of EPWM-XBAR
    426. 

  426.     Uint16 MUX27:2;                     // 23:22 Mux27 Configuration for TRIP12 of EPWM-XBAR
    427. 

  427.     Uint16 MUX28:2;                     // 25:24 Mux28 Configuration for TRIP12 of EPWM-XBAR
    428. 

  428.     Uint16 MUX29:2;                     // 27:26 Mux29 Configuration for TRIP12 of EPWM-XBAR
    429. 

  429.     Uint16 MUX30:2;                     // 29:28 Mux30 Configuration for TRIP12 of EPWM-XBAR
    430. 

  430.     Uint16 MUX31:2;                     // 31:30 Mux31 Configuration for TRIP12 of EPWM-XBAR
    431. 

  431. };
    432. 

  432. 

  433. union TRIP12MUX16TO31CFG_REG {
    434. 

  434.     Uint32  all;
    435. 

  435.     struct  TRIP12MUX16TO31CFG_BITS  bit;
    436. 

  436. };
    437. 

  437. 

  438. struct TRIP4MUXENABLE_BITS {            // bits description
    439. 

  439.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP4 of EPWM-XBAR
    440. 

  440.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP4 of EPWM-XBAR
    441. 

  441.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP4 of EPWM-XBAR
    442. 

  442.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP4 of EPWM-XBAR
    443. 

  443.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP4 of EPWM-XBAR
    444. 

  444.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP4 of EPWM-XBAR
    445. 

  445.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP4 of EPWM-XBAR
    446. 

  446.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP4 of EPWM-XBAR
    447. 

  447.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP4 of EPWM-XBAR
    448. 

  448.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP4 of EPWM-XBAR
    449. 

  449.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP4 of EPWM-XBAR
    450. 

  450.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP4 of EPWM-XBAR
    451. 

  451.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP4 of EPWM-XBAR
    452. 

  452.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP4 of EPWM-XBAR
    453. 

  453.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP4 of EPWM-XBAR
    454. 

  454.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP4 of EPWM-XBAR
    455. 

  455.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP4 of EPWM-XBAR
    456. 

  456.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP4 of EPWM-XBAR
    457. 

  457.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP4 of EPWM-XBAR
    458. 

  458.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP4 of EPWM-XBAR
    459. 

  459.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP4 of EPWM-XBAR
    460. 

  460.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP4 of EPWM-XBAR
    461. 

  461.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP4 of EPWM-XBAR
    462. 

  462.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP4 of EPWM-XBAR
    463. 

  463.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP4 of EPWM-XBAR
    464. 

  464.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP4 of EPWM-XBAR
    465. 

  465.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP4 of EPWM-XBAR
    466. 

  466.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP4 of EPWM-XBAR
    467. 

  467.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP4 of EPWM-XBAR
    468. 

  468.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP4 of EPWM-XBAR
    469. 

  469.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP4 of EPWM-XBAR
    470. 

  470.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP4 of EPWM-XBAR
    471. 

  471. };
    472. 

  472. 

  473. union TRIP4MUXENABLE_REG {
    474. 

  474.     Uint32  all;
    475. 

  475.     struct  TRIP4MUXENABLE_BITS  bit;
    476. 

  476. };
    477. 

  477. 

  478. struct TRIP5MUXENABLE_BITS {            // bits description
    479. 

  479.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP5 of EPWM-XBAR
    480. 

  480.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP5 of EPWM-XBAR
    481. 

  481.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP5 of EPWM-XBAR
    482. 

  482.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP5 of EPWM-XBAR
    483. 

  483.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP5 of EPWM-XBAR
    484. 

  484.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP5 of EPWM-XBAR
    485. 

  485.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP5 of EPWM-XBAR
    486. 

  486.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP5 of EPWM-XBAR
    487. 

  487.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP5 of EPWM-XBAR
    488. 

  488.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP5 of EPWM-XBAR
    489. 

  489.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP5 of EPWM-XBAR
    490. 

  490.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP5 of EPWM-XBAR
    491. 

  491.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP5 of EPWM-XBAR
    492. 

  492.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP5 of EPWM-XBAR
    493. 

  493.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP5 of EPWM-XBAR
    494. 

  494.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP5 of EPWM-XBAR
    495. 

  495.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP5 of EPWM-XBAR
    496. 

  496.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP5 of EPWM-XBAR
    497. 

  497.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP5 of EPWM-XBAR
    498. 

  498.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP5 of EPWM-XBAR
    499. 

  499.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP5 of EPWM-XBAR
    500. 

  500.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP5 of EPWM-XBAR
    501. 

  501.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP5 of EPWM-XBAR
    502. 

  502.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP5 of EPWM-XBAR
    503. 

  503.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP5 of EPWM-XBAR
    504. 

  504.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP5 of EPWM-XBAR
    505. 

  505.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP5 of EPWM-XBAR
    506. 

  506.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP5 of EPWM-XBAR
    507. 

  507.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP5 of EPWM-XBAR
    508. 

  508.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP5 of EPWM-XBAR
    509. 

  509.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP5 of EPWM-XBAR
    510. 

  510.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP5 of EPWM-XBAR
    511. 

  511. };
    512. 

  512. 

  513. union TRIP5MUXENABLE_REG {
    514. 

  514.     Uint32  all;
    515. 

  515.     struct  TRIP5MUXENABLE_BITS  bit;
    516. 

  516. };
    517. 

  517. 

  518. struct TRIP7MUXENABLE_BITS {            // bits description
    519. 

  519.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP7 of EPWM-XBAR
    520. 

  520.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP7 of EPWM-XBAR
    521. 

  521.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP7 of EPWM-XBAR
    522. 

  522.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP7 of EPWM-XBAR
    523. 

  523.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP7 of EPWM-XBAR
    524. 

  524.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP7 of EPWM-XBAR
    525. 

  525.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP7 of EPWM-XBAR
    526. 

  526.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP7 of EPWM-XBAR
    527. 

  527.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP7 of EPWM-XBAR
    528. 

  528.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP7 of EPWM-XBAR
    529. 

  529.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP7 of EPWM-XBAR
    530. 

  530.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP7 of EPWM-XBAR
    531. 

  531.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP7 of EPWM-XBAR
    532. 

  532.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP7 of EPWM-XBAR
    533. 

  533.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP7 of EPWM-XBAR
    534. 

  534.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP7 of EPWM-XBAR
    535. 

  535.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP7 of EPWM-XBAR
    536. 

  536.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP7 of EPWM-XBAR
    537. 

  537.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP7 of EPWM-XBAR
    538. 

  538.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP7 of EPWM-XBAR
    539. 

  539.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP7 of EPWM-XBAR
    540. 

  540.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP7 of EPWM-XBAR
    541. 

  541.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP7 of EPWM-XBAR
    542. 

  542.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP7 of EPWM-XBAR
    543. 

  543.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP7 of EPWM-XBAR
    544. 

  544.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP7 of EPWM-XBAR
    545. 

  545.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP7 of EPWM-XBAR
    546. 

  546.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP7 of EPWM-XBAR
    547. 

  547.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP7 of EPWM-XBAR
    548. 

  548.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP7 of EPWM-XBAR
    549. 

  549.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP7 of EPWM-XBAR
    550. 

  550.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP7 of EPWM-XBAR
    551. 

  551. };
    552. 

  552. 

  553. union TRIP7MUXENABLE_REG {
    554. 

  554.     Uint32  all;
    555. 

  555.     struct  TRIP7MUXENABLE_BITS  bit;
    556. 

  556. };
    557. 

  557. 

  558. struct TRIP8MUXENABLE_BITS {            // bits description
    559. 

  559.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP8 of EPWM-XBAR
    560. 

  560.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP8 of EPWM-XBAR
    561. 

  561.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP8 of EPWM-XBAR
    562. 

  562.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP8 of EPWM-XBAR
    563. 

  563.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP8 of EPWM-XBAR
    564. 

  564.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP8 of EPWM-XBAR
    565. 

  565.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP8 of EPWM-XBAR
    566. 

  566.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP8 of EPWM-XBAR
    567. 

  567.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP8 of EPWM-XBAR
    568. 

  568.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP8 of EPWM-XBAR
    569. 

  569.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP8 of EPWM-XBAR
    570. 

  570.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP8 of EPWM-XBAR
    571. 

  571.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP8 of EPWM-XBAR
    572. 

  572.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP8 of EPWM-XBAR
    573. 

  573.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP8 of EPWM-XBAR
    574. 

  574.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP8 of EPWM-XBAR
    575. 

  575.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP8 of EPWM-XBAR
    576. 

  576.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP8 of EPWM-XBAR
    577. 

  577.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP8 of EPWM-XBAR
    578. 

  578.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP8 of EPWM-XBAR
    579. 

  579.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP8 of EPWM-XBAR
    580. 

  580.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP8 of EPWM-XBAR
    581. 

  581.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP8 of EPWM-XBAR
    582. 

  582.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP8 of EPWM-XBAR
    583. 

  583.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP8 of EPWM-XBAR
    584. 

  584.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP8 of EPWM-XBAR
    585. 

  585.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP8 of EPWM-XBAR
    586. 

  586.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP8 of EPWM-XBAR
    587. 

  587.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP8 of EPWM-XBAR
    588. 

  588.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP8 of EPWM-XBAR
    589. 

  589.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP8 of EPWM-XBAR
    590. 

  590.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP8 of EPWM-XBAR
    591. 

  591. };
    592. 

  592. 

  593. union TRIP8MUXENABLE_REG {
    594. 

  594.     Uint32  all;
    595. 

  595.     struct  TRIP8MUXENABLE_BITS  bit;
    596. 

  596. };
    597. 

  597. 

  598. struct TRIP9MUXENABLE_BITS {            // bits description
    599. 

  599.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP9 of EPWM-XBAR
    600. 

  600.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP9 of EPWM-XBAR
    601. 

  601.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP9 of EPWM-XBAR
    602. 

  602.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP9 of EPWM-XBAR
    603. 

  603.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP9 of EPWM-XBAR
    604. 

  604.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP9 of EPWM-XBAR
    605. 

  605.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP9 of EPWM-XBAR
    606. 

  606.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP9 of EPWM-XBAR
    607. 

  607.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP9 of EPWM-XBAR
    608. 

  608.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP9 of EPWM-XBAR
    609. 

  609.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP9 of EPWM-XBAR
    610. 

  610.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP9 of EPWM-XBAR
    611. 

  611.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP9 of EPWM-XBAR
    612. 

  612.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP9 of EPWM-XBAR
    613. 

  613.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP9 of EPWM-XBAR
    614. 

  614.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP9 of EPWM-XBAR
    615. 

  615.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP9 of EPWM-XBAR
    616. 

  616.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP9 of EPWM-XBAR
    617. 

  617.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP9 of EPWM-XBAR
    618. 

  618.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP9 of EPWM-XBAR
    619. 

  619.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP9 of EPWM-XBAR
    620. 

  620.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP9 of EPWM-XBAR
    621. 

  621.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP9 of EPWM-XBAR
    622. 

  622.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP9 of EPWM-XBAR
    623. 

  623.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP9 of EPWM-XBAR
    624. 

  624.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP9 of EPWM-XBAR
    625. 

  625.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP9 of EPWM-XBAR
    626. 

  626.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP9 of EPWM-XBAR
    627. 

  627.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP9 of EPWM-XBAR
    628. 

  628.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP9 of EPWM-XBAR
    629. 

  629.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP9 of EPWM-XBAR
    630. 

  630.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP9 of EPWM-XBAR
    631. 

  631. };
    632. 

  632. 

  633. union TRIP9MUXENABLE_REG {
    634. 

  634.     Uint32  all;
    635. 

  635.     struct  TRIP9MUXENABLE_BITS  bit;
    636. 

  636. };
    637. 

  637. 

  638. struct TRIP10MUXENABLE_BITS {           // bits description
    639. 

  639.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP10 of EPWM-XBAR
    640. 

  640.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP10 of EPWM-XBAR
    641. 

  641.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP10 of EPWM-XBAR
    642. 

  642.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP10 of EPWM-XBAR
    643. 

  643.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP10 of EPWM-XBAR
    644. 

  644.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP10 of EPWM-XBAR
    645. 

  645.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP10 of EPWM-XBAR
    646. 

  646.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP10 of EPWM-XBAR
    647. 

  647.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP10 of EPWM-XBAR
    648. 

  648.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP10 of EPWM-XBAR
    649. 

  649.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP10 of EPWM-XBAR
    650. 

  650.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP10 of EPWM-XBAR
    651. 

  651.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP10 of EPWM-XBAR
    652. 

  652.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP10 of EPWM-XBAR
    653. 

  653.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP10 of EPWM-XBAR
    654. 

  654.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP10 of EPWM-XBAR
    655. 

  655.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP10 of EPWM-XBAR
    656. 

  656.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP10 of EPWM-XBAR
    657. 

  657.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP10 of EPWM-XBAR
    658. 

  658.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP10 of EPWM-XBAR
    659. 

  659.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP10 of EPWM-XBAR
    660. 

  660.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP10 of EPWM-XBAR
    661. 

  661.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP10 of EPWM-XBAR
    662. 

  662.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP10 of EPWM-XBAR
    663. 

  663.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP10 of EPWM-XBAR
    664. 

  664.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP10 of EPWM-XBAR
    665. 

  665.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP10 of EPWM-XBAR
    666. 

  666.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP10 of EPWM-XBAR
    667. 

  667.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP10 of EPWM-XBAR
    668. 

  668.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP10 of EPWM-XBAR
    669. 

  669.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP10 of EPWM-XBAR
    670. 

  670.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP10 of EPWM-XBAR
    671. 

  671. };
    672. 

  672. 

  673. union TRIP10MUXENABLE_REG {
    674. 

  674.     Uint32  all;
    675. 

  675.     struct  TRIP10MUXENABLE_BITS  bit;
    676. 

  676. };
    677. 

  677. 

  678. struct TRIP11MUXENABLE_BITS {           // bits description
    679. 

  679.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP11 of EPWM-XBAR
    680. 

  680.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP11 of EPWM-XBAR
    681. 

  681.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP11 of EPWM-XBAR
    682. 

  682.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP11 of EPWM-XBAR
    683. 

  683.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP11 of EPWM-XBAR
    684. 

  684.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP11 of EPWM-XBAR
    685. 

  685.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP11 of EPWM-XBAR
    686. 

  686.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP11 of EPWM-XBAR
    687. 

  687.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP11 of EPWM-XBAR
    688. 

  688.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP11 of EPWM-XBAR
    689. 

  689.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP11 of EPWM-XBAR
    690. 

  690.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP11 of EPWM-XBAR
    691. 

  691.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP11 of EPWM-XBAR
    692. 

  692.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP11 of EPWM-XBAR
    693. 

  693.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP11 of EPWM-XBAR
    694. 

  694.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP11 of EPWM-XBAR
    695. 

  695.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP11 of EPWM-XBAR
    696. 

  696.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP11 of EPWM-XBAR
    697. 

  697.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP11 of EPWM-XBAR
    698. 

  698.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP11 of EPWM-XBAR
    699. 

  699.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP11 of EPWM-XBAR
    700. 

  700.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP11 of EPWM-XBAR
    701. 

  701.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP11 of EPWM-XBAR
    702. 

  702.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP11 of EPWM-XBAR
    703. 

  703.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP11 of EPWM-XBAR
    704. 

  704.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP11 of EPWM-XBAR
    705. 

  705.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP11 of EPWM-XBAR
    706. 

  706.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP11 of EPWM-XBAR
    707. 

  707.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP11 of EPWM-XBAR
    708. 

  708.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP11 of EPWM-XBAR
    709. 

  709.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP11 of EPWM-XBAR
    710. 

  710.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP11 of EPWM-XBAR
    711. 

  711. };
    712. 

  712. 

  713. union TRIP11MUXENABLE_REG {
    714. 

  714.     Uint32  all;
    715. 

  715.     struct  TRIP11MUXENABLE_BITS  bit;
    716. 

  716. };
    717. 

  717. 

  718. struct TRIP12MUXENABLE_BITS {           // bits description
    719. 

  719.     Uint16 MUX0:1;                      // 0 mux0 to drive TRIP12 of EPWM-XBAR
    720. 

  720.     Uint16 MUX1:1;                      // 1 Mux1 to drive TRIP12 of EPWM-XBAR
    721. 

  721.     Uint16 MUX2:1;                      // 2 Mux2 to drive TRIP12 of EPWM-XBAR
    722. 

  722.     Uint16 MUX3:1;                      // 3 Mux3 to drive TRIP12 of EPWM-XBAR
    723. 

  723.     Uint16 MUX4:1;                      // 4 Mux4 to drive TRIP12 of EPWM-XBAR
    724. 

  724.     Uint16 MUX5:1;                      // 5 Mux5 to drive TRIP12 of EPWM-XBAR
    725. 

  725.     Uint16 MUX6:1;                      // 6 Mux6 to drive TRIP12 of EPWM-XBAR
    726. 

  726.     Uint16 MUX7:1;                      // 7 Mux7 to drive TRIP12 of EPWM-XBAR
    727. 

  727.     Uint16 MUX8:1;                      // 8 Mux8 to drive TRIP12 of EPWM-XBAR
    728. 

  728.     Uint16 MUX9:1;                      // 9 Mux9 to drive TRIP12 of EPWM-XBAR
    729. 

  729.     Uint16 MUX10:1;                     // 10 Mux10 to drive TRIP12 of EPWM-XBAR
    730. 

  730.     Uint16 MUX11:1;                     // 11 Mux11 to drive TRIP12 of EPWM-XBAR
    731. 

  731.     Uint16 MUX12:1;                     // 12 Mux12 to drive TRIP12 of EPWM-XBAR
    732. 

  732.     Uint16 MUX13:1;                     // 13 Mux13 to drive TRIP12 of EPWM-XBAR
    733. 

  733.     Uint16 MUX14:1;                     // 14 Mux14 to drive TRIP12 of EPWM-XBAR
    734. 

  734.     Uint16 MUX15:1;                     // 15 Mux15 to drive TRIP12 of EPWM-XBAR
    735. 

  735.     Uint16 MUX16:1;                     // 16 Mux16 to drive TRIP12 of EPWM-XBAR
    736. 

  736.     Uint16 MUX17:1;                     // 17 Mux17 to drive TRIP12 of EPWM-XBAR
    737. 

  737.     Uint16 MUX18:1;                     // 18 Mux18 to drive TRIP12 of EPWM-XBAR
    738. 

  738.     Uint16 MUX19:1;                     // 19 Mux19 to drive TRIP12 of EPWM-XBAR
    739. 

  739.     Uint16 MUX20:1;                     // 20 Mux20 to drive TRIP12 of EPWM-XBAR
    740. 

  740.     Uint16 MUX21:1;                     // 21 Mux21 to drive TRIP12 of EPWM-XBAR
    741. 

  741.     Uint16 MUX22:1;                     // 22 Mux22 to drive TRIP12 of EPWM-XBAR
    742. 

  742.     Uint16 MUX23:1;                     // 23 Mux23 to drive TRIP12 of EPWM-XBAR
    743. 

  743.     Uint16 MUX24:1;                     // 24 Mux24 to drive TRIP12 of EPWM-XBAR
    744. 

  744.     Uint16 MUX25:1;                     // 25 Mux25 to drive TRIP12 of EPWM-XBAR
    745. 

  745.     Uint16 MUX26:1;                     // 26 Mux26 to drive TRIP12 of EPWM-XBAR
    746. 

  746.     Uint16 MUX27:1;                     // 27 Mux27 to drive TRIP12 of EPWM-XBAR
    747. 

  747.     Uint16 MUX28:1;                     // 28 Mux28 to drive TRIP12 of EPWM-XBAR
    748. 

  748.     Uint16 MUX29:1;                     // 29 Mux29 to drive TRIP12 of EPWM-XBAR
    749. 

  749.     Uint16 MUX30:1;                     // 30 Mux30 to drive TRIP12 of EPWM-XBAR
    750. 

  750.     Uint16 MUX31:1;                     // 31 Mux31 to drive TRIP12 of EPWM-XBAR
    751. 

  751. };
    752. 

  752. 

  753. union TRIP12MUXENABLE_REG {
    754. 

  754.     Uint32  all;
    755. 

  755.     struct  TRIP12MUXENABLE_BITS  bit;
    756. 

  756. };
    757. 

  757. 

  758. struct TRIPOUTINV_BITS {                // bits description
    759. 

  759.     Uint16 TRIP4:1;                     // 0 Selects polarity for TRIP4 of EPWM-XBAR
    760. 

  760.     Uint16 TRIP5:1;                     // 1 Selects polarity for TRIP5 of EPWM-XBAR
    761. 

  761.     Uint16 TRIP7:1;                     // 2 Selects polarity for TRIP7 of EPWM-XBAR
    762. 

  762.     Uint16 TRIP8:1;                     // 3 Selects polarity for TRIP8 of EPWM-XBAR
    763. 

  763.     Uint16 TRIP9:1;                     // 4 Selects polarity for TRIP9 of EPWM-XBAR
    764. 

  764.     Uint16 TRIP10:1;                    // 5 Selects polarity for TRIP10 of EPWM-XBAR
    765. 

  765.     Uint16 TRIP11:1;                    // 6 Selects polarity for TRIP11 of EPWM-XBAR
    766. 

  766.     Uint16 TRIP12:1;                    // 7 Selects polarity for TRIP12 of EPWM-XBAR
    767. 

  767.     Uint16 rsvd1:8;                     // 15:8 Reserved
    768. 

  768.     Uint16 rsvd2:16;                    // 31:16 Reserved
    769. 

  769. };
    770. 

  770. 

  771. union TRIPOUTINV_REG {
    772. 

  772.     Uint32  all;
    773. 

  773.     struct  TRIPOUTINV_BITS  bit;
    774. 

  774. };
    775. 

  775. 

  776. struct TRIPLOCK_BITS {                  // bits description
    777. 

  777.     Uint16 LOCK:1;                      // 0 Locks the configuration for EPWM-XBAR
    778. 

  778.     Uint16 rsvd1:15;                    // 15:1 Reserved
    779. 

  779.     Uint16 KEY:16;                      // 31:16 Write protection KEY
    780. 

  780. };
    781. 

  781. 

  782. union TRIPLOCK_REG {
    783. 

  783.     Uint32  all;
    784. 

  784.     struct  TRIPLOCK_BITS  bit;
    785. 

  785. };
    786. 

  786. 

  787. struct EPWM_XBAR_REGS {
    788. 

  788.     union   TRIP4MUX0TO15CFG_REG             TRIP4MUX0TO15CFG;             // ePWM XBAR Mux Configuration for TRIP4
    789. 

  789.     union   TRIP4MUX16TO31CFG_REG            TRIP4MUX16TO31CFG;            // ePWM XBAR Mux Configuration for TRIP4
    790. 

  790.     union   TRIP5MUX0TO15CFG_REG             TRIP5MUX0TO15CFG;             // ePWM XBAR Mux Configuration for TRIP5
    791. 

  791.     union   TRIP5MUX16TO31CFG_REG            TRIP5MUX16TO31CFG;            // ePWM XBAR Mux Configuration for TRIP5
    792. 

  792.     union   TRIP7MUX0TO15CFG_REG             TRIP7MUX0TO15CFG;             // ePWM XBAR Mux Configuration for TRIP7
    793. 

  793.     union   TRIP7MUX16TO31CFG_REG            TRIP7MUX16TO31CFG;            // ePWM XBAR Mux Configuration for TRIP7
    794. 

  794.     union   TRIP8MUX0TO15CFG_REG             TRIP8MUX0TO15CFG;             // ePWM XBAR Mux Configuration for TRIP8
    795. 

  795.     union   TRIP8MUX16TO31CFG_REG            TRIP8MUX16TO31CFG;            // ePWM XBAR Mux Configuration for TRIP8
    796. 

  796.     union   TRIP9MUX0TO15CFG_REG             TRIP9MUX0TO15CFG;             // ePWM XBAR Mux Configuration for TRIP9
    797. 

  797.     union   TRIP9MUX16TO31CFG_REG            TRIP9MUX16TO31CFG;            // ePWM XBAR Mux Configuration for TRIP9
    798. 

  798.     union   TRIP10MUX0TO15CFG_REG            TRIP10MUX0TO15CFG;            // ePWM XBAR Mux Configuration for TRIP10
    799. 

  799.     union   TRIP10MUX16TO31CFG_REG           TRIP10MUX16TO31CFG;           // ePWM XBAR Mux Configuration for TRIP10
    800. 

  800.     union   TRIP11MUX0TO15CFG_REG            TRIP11MUX0TO15CFG;            // ePWM XBAR Mux Configuration for TRIP11
    801. 

  801.     union   TRIP11MUX16TO31CFG_REG           TRIP11MUX16TO31CFG;           // ePWM XBAR Mux Configuration for TRIP11
    802. 

  802.     union   TRIP12MUX0TO15CFG_REG            TRIP12MUX0TO15CFG;            // ePWM XBAR Mux Configuration for TRIP12
    803. 

  803.     union   TRIP12MUX16TO31CFG_REG           TRIP12MUX16TO31CFG;           // ePWM XBAR Mux Configuration for TRIP12
    804. 

  804.     union   TRIP4MUXENABLE_REG               TRIP4MUXENABLE;               // ePWM XBAR Mux Enable for TRIP4
    805. 

  805.     union   TRIP5MUXENABLE_REG               TRIP5MUXENABLE;               // ePWM XBAR Mux Enable for TRIP5
    806. 

  806.     union   TRIP7MUXENABLE_REG               TRIP7MUXENABLE;               // ePWM XBAR Mux Enable for TRIP7
    807. 

  807.     union   TRIP8MUXENABLE_REG               TRIP8MUXENABLE;               // ePWM XBAR Mux Enable for TRIP8
    808. 

  808.     union   TRIP9MUXENABLE_REG               TRIP9MUXENABLE;               // ePWM XBAR Mux Enable for TRIP9
    809. 

  809.     union   TRIP10MUXENABLE_REG              TRIP10MUXENABLE;              // ePWM XBAR Mux Enable for TRIP10
    810. 

  810.     union   TRIP11MUXENABLE_REG              TRIP11MUXENABLE;              // ePWM XBAR Mux Enable for TRIP11
    811. 

  811.     union   TRIP12MUXENABLE_REG              TRIP12MUXENABLE;              // ePWM XBAR Mux Enable for TRIP12
    812. 

  812.     Uint16                                   rsvd1[8];                     // Reserved
    813. 

  813.     union   TRIPOUTINV_REG                   TRIPOUTINV;                   // ePWM XBAR Output Inversion Register
    814. 

  814.     Uint16                                   rsvd2[4];                     // Reserved
    815. 

  815.     union   TRIPLOCK_REG                     TRIPLOCK;                     // ePWM XBAR Configuration Lock register
    816. 

  816. };
    817. 

  817. 

  818. //---------------------------------------------------------------------------
    819. 

  819. // EPWM_XBAR External References & Function Declarations:
    820. 

  820. //
    821. 

  821. #ifdef CPU1
    822. 

  822. extern volatile struct EPWM_XBAR_REGS EPwmXbarRegs;
    823. 

  823. #endif
    824. 

  824. #ifdef __cplusplus
    825. 

  825. }
    826. 

  826. #endif                                  /* extern "C" */
    827. 

  827. 

  828. #endif
    829. 

  829. 

  830. //===========================================================================
    831. 

  831. // End of file.
    832. 

  832. //===========================================================================
    833.