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juicevm
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interrupt_gcc.S

interrupt_gcc.S 1.8 KB
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  1. /*
    2. 

  2.  * Copyright (c) 2006-2021, RT-Thread Development Team
    3. 

  3.  *
    4. 

  4.  * SPDX-License-Identifier: Apache-2.0
    5. 

  5.  *
    6. 

  6.  * Change Logs:
    7. 

  7.  * Date           Author       Notes
    8. 

  8.  * 2021/04/24     Juice      The first version
    9. 

  9.  */
    10. 

  10. 

  11. #include "cpuport.h"
    12. 

  12. 

  13. .section      .text.entry
    14. 

  14. .align 2
    15. 

  15. .global trap_entry
    16. 

  16. trap_entry:
    17. 

  17. 

  18. /* save thread context to thread stack */
    19. 

  19. addi sp, sp, -32 * REGBYTES
    20. 

  20. 

  21. STORE x1,   1 * REGBYTES(sp)
    22. 

  22. 

  23. csrr  x1, mstatus
    24. 

  24. STORE x1,   2 * REGBYTES(sp)
    25. 

  25. 

  26. csrr  x1, mepc
    27. 

  27. STORE x1, 0 * REGBYTES(sp)
    28. 

  28. 

  29. STORE x4,   4 * REGBYTES(sp)
    30. 

  30. STORE x5,   5 * REGBYTES(sp)
    31. 

  31. STORE x6,   6 * REGBYTES(sp)
    32. 

  32. STORE x7,   7 * REGBYTES(sp)
    33. 

  33. STORE x8,   8 * REGBYTES(sp)
    34. 

  34. STORE x9,   9 * REGBYTES(sp)
    35. 

  35. STORE x10, 10 * REGBYTES(sp)
    36. 

  36. STORE x11, 11 * REGBYTES(sp)
    37. 

  37. STORE x12, 12 * REGBYTES(sp)
    38. 

  38. STORE x13, 13 * REGBYTES(sp)
    39. 

  39. STORE x14, 14 * REGBYTES(sp)
    40. 

  40. STORE x15, 15 * REGBYTES(sp)
    41. 

  41. STORE x16, 16 * REGBYTES(sp)
    42. 

  42. STORE x17, 17 * REGBYTES(sp)
    43. 

  43. STORE x18, 18 * REGBYTES(sp)
    44. 

  44. STORE x19, 19 * REGBYTES(sp)
    45. 

  45. STORE x20, 20 * REGBYTES(sp)
    46. 

  46. STORE x21, 21 * REGBYTES(sp)
    47. 

  47. STORE x22, 22 * REGBYTES(sp)
    48. 

  48. STORE x23, 23 * REGBYTES(sp)
    49. 

  49. STORE x24, 24 * REGBYTES(sp)
    50. 

  50. STORE x25, 25 * REGBYTES(sp)
    51. 

  51. STORE x26, 26 * REGBYTES(sp)
    52. 

  52. STORE x27, 27 * REGBYTES(sp)
    53. 

  53. STORE x28, 28 * REGBYTES(sp)
    54. 

  54. STORE x29, 29 * REGBYTES(sp)
    55. 

  55. STORE x30, 30 * REGBYTES(sp)
    56. 

  56. STORE x31, 31 * REGBYTES(sp)
    57. 

  57. 

  58. /* switch to interrupt stack */
    59. 

  59. move  s0, sp
    60. 

  60. 

  61. /* handle interrupt */
    62. 

  62. call  rt_interrupt_enter
    63. 

  63. csrr  a0, mcause
    64. 

  64. csrr  a1, mepc
    65. 

  65. mv    a2, s0
    66. 

  66. call  handle_trap
    67. 

  67. call  rt_interrupt_leave
    68. 

  68. 

  69. 

  70. /* switch to from_thread stack */
    71. 

  71. move  sp, s0
    72. 

  72. 

  73. /* need to switch new thread */
    74. 

  74. la    s0, rt_thread_switch_interrupt_flag
    75. 

  75. lw    s2, 0(s0)
    76. 

  76. beqz  s2, spurious_interrupt
    77. 

  77. sw    zero, 0(s0)
    78. 

  78. 

  79. la    s0, rt_interrupt_from_thread
    80. 

  80. LOAD  s1, 0(s0)
    81. 

  81. STORE sp, 0(s1)
    82. 

  82. 

  83. la    s0, rt_interrupt_to_thread
    84. 

  84. LOAD  s1, 0(s0)
    85. 

  85. LOAD  sp, 0(s1)
    86. 

  86. 

  87. spurious_interrupt:
    88. 

  88. tail rt_hw_context_switch_exit
    89.