usb_phy.h 3.6 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016 - 2017 NXP
  4. * All rights reserved.
  5. *
  6. * SPDX-License-Identifier: BSD-3-Clause
  7. */
  8. #ifndef __USB_PHY_H__
  9. #define __USB_PHY_H__
  10. /*******************************************************************************
  11. * Definitions
  12. ******************************************************************************/
  13. typedef struct _usb_phy_config_struct
  14. {
  15. uint8_t D_CAL; /* Decode to trim the nominal 17.78mA current source */
  16. uint8_t TXCAL45DP; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DP output pin */
  17. uint8_t TXCAL45DM; /* Decode to trim the nominal 45-Ohm series termination resistance to the USB_DM output pin */
  18. } usb_phy_config_struct_t;
  19. #if defined(__cplusplus)
  20. extern "C" {
  21. #endif
  22. /*******************************************************************************
  23. * API
  24. ******************************************************************************/
  25. /*!
  26. * @brief EHCI PHY get USB phy bass address.
  27. *
  28. * This function is used to get USB phy bass address.
  29. *
  30. * @param[in] controllerId EHCI controller ID; See the #usb_controller_index_t.
  31. *
  32. * @retval USB phy bass address.
  33. */
  34. extern void *USB_EhciPhyGetBase(uint8_t controllerId);
  35. /*!
  36. * @brief EHCI PHY initialization.
  37. *
  38. * This function initializes the EHCI PHY IP.
  39. *
  40. * @param[in] controllerId EHCI controller ID; See the #usb_controller_index_t.
  41. * @param[in] freq The external input clock.
  42. *
  43. * @retval kStatus_USB_Success Cancel successfully.
  44. * @retval kStatus_USB_Error The freq value is incorrect.
  45. */
  46. extern uint32_t USB_EhciPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig);
  47. /*!
  48. * @brief ehci phy initialization for suspend and resume.
  49. *
  50. * This function initialize ehci phy IP for suspend and resume.
  51. *
  52. * @param[in] controllerId ehci controller id, please reference to #usb_controller_index_t.
  53. * @param[in] freq the external input clock.
  54. * for example: if the external input clock is 16M, the parameter freq should be 16000000.
  55. *
  56. * @retval kStatus_USB_Success cancel successfully.
  57. * @retval kStatus_USB_Error the freq value is incorrect.
  58. */
  59. extern uint32_t USB_EhciLowPowerPhyInit(uint8_t controllerId, uint32_t freq, usb_phy_config_struct_t *phyConfig);
  60. /*!
  61. * @brief EHCI PHY deinitialization.
  62. *
  63. * This function deinitializes the EHCI PHY IP.
  64. *
  65. * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t.
  66. */
  67. extern void USB_EhciPhyDeinit(uint8_t controllerId);
  68. /*!
  69. * @brief EHCI PHY disconnect detection enable or disable.
  70. *
  71. * This function enable/disable the host EHCI disconnect detection.
  72. *
  73. * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t.
  74. * @param[in] enable
  75. * 1U - enable;
  76. * 0U - disable;
  77. */
  78. extern void USB_EhcihostPhyDisconnectDetectCmd(uint8_t controllerId, uint8_t enable);
  79. #if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U))
  80. #if ((defined FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE) && (FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE > 0U))
  81. /*!
  82. * @brief Force the PHY enter FS Mode
  83. *
  84. * on RT500 and RT600, the device doesn't enter FS Mode after vbus is invalide and the controller works as HS.
  85. *
  86. * @param[in] controllerId EHCI controller ID; See #usb_controller_index_t.
  87. * @param[in] enable
  88. * 1U - enable;
  89. * 0U - disable;
  90. */
  91. extern void USB_PhyDeviceForceEnterFSMode(uint8_t controllerId, uint8_t enable);
  92. #endif
  93. #endif
  94. #if defined(__cplusplus)
  95. }
  96. #endif
  97. #endif /* __USB_PHY_H__ */