cpuport.h 2.0 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-10-25 Shell Move ffs to cpuport, add general implementation
  9. * by inline assembly
  10. */
  11. #ifndef CPUPORT_H__
  12. #define CPUPORT_H__
  13. #include <armv8.h>
  14. #include <rtcompiler.h>
  15. #include <rtdef.h>
  16. #ifdef RT_USING_SMP
  17. typedef struct {
  18. volatile unsigned int lock;
  19. } rt_hw_spinlock_t;
  20. #endif
  21. #define rt_hw_barrier(cmd, ...) \
  22. __asm__ volatile (RT_STRINGIFY(cmd) " "RT_STRINGIFY(__VA_ARGS__):::"memory")
  23. #define rt_hw_isb() rt_hw_barrier(isb)
  24. #define rt_hw_dmb() rt_hw_barrier(dmb, ish)
  25. #define rt_hw_wmb() rt_hw_barrier(dmb, ishst)
  26. #define rt_hw_rmb() rt_hw_barrier(dmb, ishld)
  27. #define rt_hw_dsb() rt_hw_barrier(dsb, ish)
  28. #define rt_hw_wfi() rt_hw_barrier(wfi)
  29. #define rt_hw_wfe() rt_hw_barrier(wfe)
  30. #define rt_hw_sev() rt_hw_barrier(sev)
  31. #define rt_hw_cpu_relax() rt_hw_barrier(yield)
  32. #define rt_hw_sysreg_write(sysreg, val) \
  33. __asm__ volatile ("msr "RT_STRINGIFY(sysreg)", %0"::"r"((rt_uint64_t)(val)))
  34. #define rt_hw_sysreg_read(sysreg, val) \
  35. __asm__ volatile ("mrs %0, "RT_STRINGIFY(sysreg)"":"=r"((val)))
  36. void _thread_start(void);
  37. #ifdef RT_USING_CPU_FFS
  38. /**
  39. * This function finds the first bit set (beginning with the least significant bit)
  40. * in value and return the index of that bit.
  41. *
  42. * Bits are numbered starting at 1 (the least significant bit). A return value of
  43. * zero from any of these functions means that the argument was zero.
  44. *
  45. * @return return the index of the first bit set. If value is 0, then this function
  46. * shall return 0.
  47. */
  48. rt_inline int __rt_ffs(int value)
  49. {
  50. #ifdef __GNUC__
  51. return __builtin_ffs(value);
  52. #else
  53. __asm__ volatile (
  54. "rbit w1, %w0\n"
  55. "cmp %w0, 0\n"
  56. "clz w1, w1\n"
  57. "csinc %w0, wzr, w1, eq\n"
  58. : "=r"(value)
  59. : "0"(value)
  60. );
  61. return value;
  62. #endif
  63. }
  64. #endif /* RT_USING_CPU_FFS */
  65. #endif /*CPUPORT_H__*/