board.c 4.6 KB

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  1. /*
  2. * Copyright (c) 2006-2019, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-29 zdzn first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include "board.h"
  13. #include "drv_uart.h"
  14. #include "drv_timer.h"
  15. #include "cp15.h"
  16. #include "mmu.h"
  17. #include "raspi.h"
  18. #ifdef BSP_USING_CORETIMER
  19. static rt_uint64_t timerStep;
  20. #define CORE0_TIMER_IRQ_CTRL HWREG32(0x40000040)
  21. int rt_hw_get_gtimer_frq(void);
  22. void rt_hw_set_gtimer_val(rt_uint64_t value);
  23. void rt_hw_gtimer_enable(void);
  24. void core0_timer_enable_interrupt_controller()
  25. {
  26. CORE0_TIMER_IRQ_CTRL |= NON_SECURE_TIMER_IRQ;
  27. }
  28. #endif
  29. #ifdef RT_USING_SMP
  30. extern void rt_hw_ipi_handler_install(int ipi_vector, rt_isr_handler_t ipi_isr_handler);
  31. void ipi_handler(){
  32. rt_scheduler_ipi_handler(0,RT_NULL);
  33. }
  34. #endif
  35. void rt_hw_timer_isr(int vector, void *parameter)
  36. {
  37. #ifdef BSP_USING_CORETIMER
  38. rt_hw_set_gtimer_val(timerStep);
  39. #else
  40. ARM_TIMER_IRQCLR = 0;
  41. #endif
  42. rt_tick_increase();
  43. }
  44. void rt_hw_timer_init(void)
  45. {
  46. rt_hw_interrupt_install(IRQ_ARM_TIMER, rt_hw_timer_isr, RT_NULL, "tick");
  47. rt_hw_interrupt_umask(IRQ_ARM_TIMER);
  48. #ifdef BSP_USING_CORETIMER
  49. __ISB();
  50. timerStep = rt_hw_get_gtimer_frq();
  51. __DSB();
  52. timerStep /= RT_TICK_PER_SECOND;
  53. rt_hw_gtimer_enable();
  54. rt_hw_set_gtimer_val(timerStep);
  55. core0_timer_enable_interrupt_controller();
  56. #else
  57. __DSB();
  58. /* timer_clock = apb_clock/(pre_divider + 1) */
  59. ARM_TIMER_PREDIV = (250 - 1);
  60. ARM_TIMER_RELOAD = 0;
  61. ARM_TIMER_LOAD = 0;
  62. ARM_TIMER_IRQCLR = 0;
  63. ARM_TIMER_CTRL = 0;
  64. ARM_TIMER_RELOAD = 10000;
  65. ARM_TIMER_LOAD = 10000;
  66. /* 23-bit counter, enable interrupt, enable timer */
  67. ARM_TIMER_CTRL = (1 << 1) | (1 << 5) | (1 << 7);
  68. #endif
  69. }
  70. void idle_wfi(void)
  71. {
  72. asm volatile ("wfi");
  73. }
  74. /**
  75. * Initialize the Hardware related stuffs. Called from rtthread_startup()
  76. * after interrupt disabled.
  77. */
  78. void rt_hw_board_init(void)
  79. {
  80. mmu_init();
  81. armv8_map(0, 0, 0x6400000, MEM_ATTR_MEMORY);
  82. armv8_map(0x3f000000, 0x3f000000, 0x200000, MEM_ATTR_IO);//timer
  83. armv8_map(0x3f200000, 0x3f200000, 0x16000, MEM_ATTR_IO);//uart
  84. armv8_map(0x40000000, 0x40000000, 0x1000, MEM_ATTR_IO);//core timer
  85. armv8_map(0x3F300000, 0x3F300000, 0x1000, MEM_ATTR_IO);//sdio
  86. armv8_map(0xc00000, 0xc00000, 0x1000, MEM_ATTR_IO);//mbox
  87. armv8_map(0x3f804000, 0x3f804000, 0x1000, MEM_ATTR_IO);//i2c0
  88. armv8_map(0x3f205000, 0x3f205000, 0x1000, MEM_ATTR_IO);//i2c1
  89. mmu_enable();
  90. /* initialize hardware interrupt */
  91. rt_hw_interrupt_init(); // in libcpu/interrupt.c. Set some data structures, no operation on device
  92. rt_hw_vector_init(); // in libcpu/interrupt.c. == rt_cpu_vector_set_base((rt_ubase_t)&system_vectors);
  93. /* initialize uart */
  94. rt_hw_uart_init(); // driver/drv_uart.c
  95. /* initialize timer for os tick */
  96. rt_hw_timer_init();
  97. rt_thread_idle_sethook(idle_wfi);
  98. #ifdef RT_USING_CONSOLE
  99. /* set console device */
  100. rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
  101. #endif /* RT_USING_CONSOLE */
  102. #ifdef RT_USING_HEAP
  103. /* initialize memory system */
  104. rt_kprintf("heap: 0x%08x - 0x%08x\n", RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
  105. rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
  106. #endif
  107. #ifdef RT_USING_COMPONENTS_INIT
  108. rt_components_board_init();
  109. #endif
  110. }
  111. #ifdef RT_USING_SMP
  112. void _reset(void);
  113. void secondary_cpu_start(void);
  114. void rt_hw_secondary_cpu_up(void)
  115. {
  116. int i;
  117. int retry,val;
  118. rt_cpu_dcache_clean_flush();
  119. rt_cpu_icache_flush();
  120. /*TODO maybe, there is some bug */
  121. for(i=RT_CPUS_NR-1; i>0; i-- )
  122. {
  123. rt_kprintf("boot cpu:%d\n", i);
  124. setup_bootstrap_addr(i, (int)_reset);
  125. __SEV();
  126. __DSB();
  127. __ISB();
  128. retry = 10;
  129. rt_thread_delay(RT_TICK_PER_SECOND/1000);
  130. do
  131. {
  132. val = CORE_MAILBOX3_CLEAR(i);
  133. if (val == 0)
  134. {
  135. rt_kprintf("start OK: CPU %d \n",i);
  136. break;
  137. }
  138. rt_thread_delay(RT_TICK_PER_SECOND);
  139. retry --;
  140. if (retry <= 0)
  141. {
  142. rt_kprintf("can't start for CPU %d \n",i);
  143. break;
  144. }
  145. }while (1);
  146. }
  147. __DSB();
  148. __SEV();
  149. }
  150. void secondary_cpu_c_start(void)
  151. {
  152. uint32_t id;
  153. id = rt_hw_cpu_id();
  154. rt_kprintf("cpu = 0x%08x\n",id);
  155. rt_hw_timer_init();
  156. rt_kprintf("cpu %d startup.\n",id);
  157. rt_hw_vector_init();
  158. enable_cpu_ipi_intr(id);
  159. rt_hw_spin_lock(&_cpus_lock);
  160. rt_system_scheduler_start();
  161. }
  162. void rt_hw_secondary_cpu_idle_exec(void)
  163. {
  164. __WFE();
  165. }
  166. #endif