drv_usart.c 15 KB

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  1. /*****************************************************************************
  2. * Copyright (c) 2019, Nations Technologies Inc.
  3. *
  4. * All rights reserved.
  5. * ****************************************************************************
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions are met:
  9. *
  10. * - Redistributions of source code must retain the above copyright notice,
  11. * this list of conditions and the disclaimer below.
  12. *
  13. * Nations' name may not be used to endorse or promote products derived from
  14. * this software without specific prior written permission.
  15. *
  16. * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
  17. * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  18. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
  19. * DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
  20. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
  22. * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  23. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  24. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  25. * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26. * ****************************************************************************/
  27. /**
  28. * @file drv_usart.c
  29. * @author Nations
  30. * @version v1.0.0
  31. *
  32. * @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
  33. */
  34. #include <drv_usart.h>
  35. #include "board.h"
  36. #ifdef RT_USING_SERIAL
  37. #if defined(BSP_USING_USART1) || defined(BSP_USING_USART2) || \
  38. defined(BSP_USING_USART3) || defined(BSP_USING_UART4) || \
  39. defined(BSP_USING_UART5) || defined(BSP_USING_UART6) || \
  40. defined(BSP_USING_UART7)
  41. #include <rtdevice.h>
  42. /* n32 uart driver */
  43. // Todo: compress uart info
  44. struct n32_uart
  45. {
  46. USART_Module* uart_periph; //Todo: 3bits
  47. IRQn_Type irqn; //Todo: 7bits
  48. uint32_t per_clk; //Todo: 5bits
  49. uint32_t tx_gpio_clk; //Todo: 5bits
  50. uint32_t rx_gpio_clk; //Todo: 5bits
  51. GPIO_Module* tx_port; //Todo: 4bits
  52. GPIO_ModeType tx_af; //Todo: 4bits
  53. uint16_t tx_pin; //Todo: 4bits
  54. GPIO_Module* rx_port; //Todo: 4bits
  55. GPIO_ModeType rx_af; //Todo: 4bits
  56. uint16_t rx_pin; //Todo: 4bits
  57. struct rt_serial_device * serial;
  58. char *device_name;
  59. };
  60. static void uart_isr(struct rt_serial_device *serial);
  61. #if defined(BSP_USING_USART1)
  62. struct rt_serial_device serial1;
  63. void USART1_IRQHandler(void)
  64. {
  65. /* enter interrupt */
  66. rt_interrupt_enter();
  67. uart_isr(&serial1);
  68. /* leave interrupt */
  69. rt_interrupt_leave();
  70. }
  71. #endif /* BSP_USING_USART1 */
  72. #if defined(BSP_USING_USART2)
  73. struct rt_serial_device serial2;
  74. void USART2_IRQHandler(void)
  75. {
  76. /* enter interrupt */
  77. rt_interrupt_enter();
  78. uart_isr(&serial2);
  79. /* leave interrupt */
  80. rt_interrupt_leave();
  81. }
  82. #endif /* BSP_USING_USART2 */
  83. #if defined(BSP_USING_USART3)
  84. struct rt_serial_device serial3;
  85. void USART3_IRQHandler(void)
  86. {
  87. /* enter interrupt */
  88. rt_interrupt_enter();
  89. uart_isr(&serial3);
  90. /* leave interrupt */
  91. rt_interrupt_leave();
  92. }
  93. #endif /* BSP_USING_USART3 */
  94. #if defined(BSP_USING_UART4)
  95. struct rt_serial_device serial4;
  96. void UART4_IRQHandler(void)
  97. {
  98. /* enter interrupt */
  99. rt_interrupt_enter();
  100. uart_isr(&serial4);
  101. /* leave interrupt */
  102. rt_interrupt_leave();
  103. }
  104. #endif /* BSP_USING_UART4 */
  105. #if defined(BSP_USING_UART5)
  106. struct rt_serial_device serial5;
  107. void UART5_IRQHandler(void)
  108. {
  109. /* enter interrupt */
  110. rt_interrupt_enter();
  111. uart_isr(&serial5);
  112. /* leave interrupt */
  113. rt_interrupt_leave();
  114. }
  115. #endif /* BSP_USING_UART5 */
  116. #if defined(BSP_USING_UART6)
  117. struct rt_serial_device serial6;
  118. void UART6_IRQHandler(void)
  119. {
  120. /* enter interrupt */
  121. rt_interrupt_enter();
  122. uart_isr(&serial6);
  123. /* leave interrupt */
  124. rt_interrupt_leave();
  125. }
  126. #endif /* BSP_USING_UART6 */
  127. #if defined(BSP_USING_UART7)
  128. struct rt_serial_device serial7;
  129. void UART7_IRQHandler(void)
  130. {
  131. /* enter interrupt */
  132. rt_interrupt_enter();
  133. uart_isr(&serial7);
  134. /* leave interrupt */
  135. rt_interrupt_leave();
  136. }
  137. #endif /* BSP_USING_UART7 */
  138. static const struct n32_uart uarts[] = {
  139. #ifdef BSP_USING_USART1
  140. {
  141. USART1, // uart peripheral index
  142. USART1_IRQn, // uart iqrn
  143. RCC_APB2_PERIPH_USART1, RCC_APB2_PERIPH_GPIOA, RCC_APB2_PERIPH_GPIOA, // periph clock, tx gpio clock, rt gpio clock
  144. GPIOA, GPIO_Mode_AF_PP, GPIO_PIN_9, // tx port, tx alternate, tx pin
  145. GPIOA, GPIO_Mode_IN_FLOATING, GPIO_PIN_10, // rx port, rx alternate, rx pin
  146. &serial1,
  147. "usart1",
  148. },
  149. #endif
  150. #ifdef BSP_USING_USART2
  151. {
  152. USART2, // uart peripheral index
  153. USART2_IRQn, // uart iqrn
  154. RCC_APB1_PERIPH_USART2, RCC_APB2_PERIPH_GPIOA, RCC_APB2_PERIPH_GPIOA, // periph clock, tx gpio clock, rt gpio clock
  155. GPIOA, GPIO_Mode_AF_PP, GPIO_PIN_2, // tx port, tx alternate, tx pin
  156. GPIOA, GPIO_Mode_IN_FLOATING, GPIO_PIN_3, // rx port, rx alternate, rx pin
  157. &serial2,
  158. "usart2",
  159. },
  160. #endif
  161. #ifdef BSP_USING_USART3
  162. {
  163. USART3, // uart peripheral index
  164. USART3_IRQn, // uart iqrn
  165. RCC_APB1_PERIPH_USART3, RCC_APB2_PERIPH_GPIOB, RCC_APB2_PERIPH_GPIOB, // periph clock, tx gpio clock, rt gpio clock
  166. GPIOB, GPIO_Mode_AF_PP, GPIO_PIN_10, // tx port, tx alternate, tx pin
  167. GPIOB, GPIO_Mode_IN_FLOATING, GPIO_PIN_11, // rx port, rx alternate, rx pin
  168. &serial3,
  169. "usart3",
  170. },
  171. #endif
  172. #ifdef BSP_USING_UART4
  173. {
  174. UART4, // uart peripheral index
  175. UART4_IRQn, // uart iqrn
  176. RCC_APB1_PERIPH_UART4, RCC_APB2_PERIPH_GPIOC, RCC_APB2_PERIPH_GPIOC, // periph clock, tx gpio clock, rt gpio clock
  177. GPIOC, GPIO_Mode_AF_PP, GPIO_PIN_10, // tx port, tx alternate, tx pin
  178. GPIOC, GPIO_Mode_IN_FLOATING, GPIO_PIN_11, // rx port, rx alternate, rx pin
  179. &serial4,
  180. "uart4",
  181. },
  182. #endif
  183. #ifdef BSP_USING_UART5
  184. {
  185. UART5, // uart peripheral index
  186. UART5_IRQn, // uart iqrn
  187. RCC_APB1_PERIPH_UART5, RCC_APB2_PERIPH_GPIOC, RCC_APB2_PERIPH_GPIOD, // periph clock, tx gpio clock, rt gpio clock
  188. GPIOC, GPIO_Mode_AF_PP, GPIO_PIN_12, // tx port, tx alternate, tx pin
  189. GPIOD, GPIO_Mode_IN_FLOATING, GPIO_PIN_2, // rx port, rx alternate, rx pin
  190. &serial5,
  191. "uart5",
  192. },
  193. #endif
  194. #ifdef BSP_USING_UART6
  195. {
  196. UART6, // uart peripheral index
  197. UART6_IRQn, // uart iqrn
  198. RCC_APB2_PERIPH_UART6, RCC_APB2_PERIPH_GPIOE, RCC_APB2_PERIPH_GPIOE, // periph clock, tx gpio clock, rt gpio clock
  199. GPIOE, GPIO_Mode_AF_PP, GPIO_PIN_2, // tx port, tx alternate, tx pin
  200. GPIOE, GPIO_Mode_IN_FLOATING, GPIO_PIN_3, // rx port, rx alternate, rx pin
  201. &serial6,
  202. "uart6",
  203. },
  204. #endif
  205. #ifdef BSP_USING_UART7
  206. {
  207. UART7, // uart peripheral index
  208. UART7_IRQn, // uart iqrn
  209. RCC_APB2_PERIPH_UART7, RCC_APB2_PERIPH_GPIOC, RCC_APB2_PERIPH_GPIOC, // periph clock, tx gpio clock, rt gpio clock
  210. GPIOC, GPIO_Mode_AF_PP, GPIO_PIN_4, // tx port, tx alternate, tx pin
  211. GPIOC, GPIO_Mode_IN_FLOATING, GPIO_PIN_5, // rx port, rx alternate, rx pin
  212. &serial7,
  213. "uart7",
  214. },
  215. #endif
  216. };
  217. /**
  218. * @brief UART MSP Initialization
  219. * This function configures the hardware resources used in this example:
  220. * - Peripheral's clock enable
  221. * - Peripheral's GPIO Configuration
  222. * - NVIC configuration for UART interrupt request enable
  223. * @param huart: UART handle pointer
  224. * @retval None
  225. */
  226. void n32_uart_gpio_init(struct n32_uart *uart, struct serial_configure *cfg)
  227. {
  228. /* enable USART clock */
  229. RCC_EnableAPB2PeriphClk(uart->tx_gpio_clk | uart->rx_gpio_clk | RCC_APB2_PERIPH_AFIO, ENABLE);
  230. if(uart->uart_periph == USART1 || uart->uart_periph == UART6 || uart->uart_periph == UART7)
  231. {
  232. RCC_EnableAPB2PeriphClk(uart->per_clk, ENABLE);
  233. }
  234. else
  235. {
  236. RCC_EnableAPB1PeriphClk(uart->per_clk, ENABLE);
  237. }
  238. /* connect port to USARTx_Tx */
  239. GPIOInit(uart->tx_port, uart->tx_af, GPIO_Speed_50MHz, uart->tx_pin);
  240. /* connect port to USARTx_Rx */
  241. GPIOInit(uart->tx_port, uart->rx_af, GPIO_Speed_50MHz, uart->rx_pin);
  242. NVIC_SetPriority(uart->irqn, 0);
  243. NVIC_EnableIRQ(uart->irqn);
  244. }
  245. static rt_err_t n32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  246. {
  247. struct n32_uart *uart;
  248. USART_InitType USART_InitStructure;
  249. RT_ASSERT(serial != RT_NULL);
  250. RT_ASSERT(cfg != RT_NULL);
  251. uart = (struct n32_uart *)serial->parent.user_data;
  252. n32_uart_gpio_init(uart, cfg);
  253. USART_InitStructure.BaudRate = cfg->baud_rate;
  254. switch (cfg->data_bits)
  255. {
  256. case DATA_BITS_9:
  257. USART_InitStructure.WordLength = USART_WL_9B;
  258. break;
  259. default:
  260. USART_InitStructure.WordLength = USART_WL_8B;;
  261. break;
  262. }
  263. switch (cfg->stop_bits)
  264. {
  265. case STOP_BITS_1:
  266. USART_InitStructure.StopBits = USART_STPB_1;
  267. break;
  268. case STOP_BITS_2:
  269. USART_InitStructure.StopBits = USART_STPB_0_5;
  270. break;
  271. case STOP_BITS_3:
  272. USART_InitStructure.StopBits = USART_STPB_2;
  273. break;
  274. case STOP_BITS_4:
  275. USART_InitStructure.StopBits = USART_STPB_1_5;
  276. break;
  277. default:
  278. break;
  279. }
  280. switch (cfg->parity)
  281. {
  282. case PARITY_ODD:
  283. USART_InitStructure.Parity = USART_PE_ODD;
  284. break;
  285. case PARITY_EVEN:
  286. USART_InitStructure.Parity = USART_PE_EVEN;
  287. break;
  288. case PARITY_NONE:
  289. USART_InitStructure.Parity = USART_PE_NO;
  290. break;
  291. default:
  292. break;
  293. }
  294. switch (cfg->flowcontrol)
  295. {
  296. case RT_SERIAL_FLOWCONTROL_NONE:
  297. USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
  298. break;
  299. case RT_SERIAL_FLOWCONTROL_CTSRTS:
  300. USART_InitStructure.HardwareFlowControl = USART_HFCTRL_RTS_CTS;
  301. break;
  302. default:
  303. USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
  304. break;
  305. }
  306. USART_InitStructure.Mode = USART_MODE_TX | USART_MODE_RX;
  307. USART_Init(uart->uart_periph, &USART_InitStructure);
  308. USART_Enable(uart->uart_periph, ENABLE);
  309. return RT_EOK;
  310. }
  311. static rt_err_t n32_control(struct rt_serial_device *serial, int cmd, void *arg)
  312. {
  313. struct n32_uart *uart;
  314. NVIC_InitType NVIC_InitStructure;
  315. /* Configure the NVIC Preemption Priority Bits */
  316. NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
  317. RT_ASSERT(serial != RT_NULL);
  318. uart = (struct n32_uart *)serial->parent.user_data;
  319. switch (cmd)
  320. {
  321. case RT_DEVICE_CTRL_CLR_INT:
  322. /* disable rx irq */
  323. NVIC_InitStructure.NVIC_IRQChannel = uart->irqn;
  324. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  325. NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
  326. NVIC_Init(&NVIC_InitStructure);
  327. /* disable interrupt */
  328. USART_ConfigInt(uart->uart_periph, USART_INT_RXDNE, DISABLE);
  329. break;
  330. case RT_DEVICE_CTRL_SET_INT:
  331. /* enable rx irq */
  332. NVIC_InitStructure.NVIC_IRQChannel = uart->irqn;
  333. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  334. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  335. NVIC_Init(&NVIC_InitStructure);
  336. /* enable interrupt */
  337. USART_ConfigInt(uart->uart_periph, USART_INT_RXDNE, ENABLE);
  338. break;
  339. }
  340. return RT_EOK;
  341. }
  342. static int n32_putc(struct rt_serial_device *serial, char ch)
  343. {
  344. struct n32_uart *uart;
  345. RT_ASSERT(serial != RT_NULL);
  346. uart = (struct n32_uart *)serial->parent.user_data;
  347. USART_SendData(uart->uart_periph, ch);
  348. while((USART_GetFlagStatus(uart->uart_periph, USART_FLAG_TXDE) == RESET));
  349. return 1;
  350. }
  351. static int n32_getc(struct rt_serial_device *serial)
  352. {
  353. int ch;
  354. struct n32_uart *uart;
  355. RT_ASSERT(serial != RT_NULL);
  356. uart = (struct n32_uart *)serial->parent.user_data;
  357. ch = -1;
  358. if (USART_GetFlagStatus(uart->uart_periph, USART_FLAG_RXDNE) != RESET)
  359. ch = USART_ReceiveData(uart->uart_periph);
  360. return ch;
  361. }
  362. /**
  363. * Uart common interrupt process. This need add to uart ISR.
  364. *
  365. * @param serial serial device
  366. */
  367. static void uart_isr(struct rt_serial_device *serial)
  368. {
  369. struct n32_uart *uart = (struct n32_uart *) serial->parent.user_data;
  370. RT_ASSERT(uart != RT_NULL);
  371. /* UART in mode Receiver -------------------------------------------------*/
  372. if (USART_GetIntStatus(uart->uart_periph, USART_INT_RXDNE) != RESET &&
  373. USART_GetFlagStatus(uart->uart_periph, USART_FLAG_RXDNE) != RESET)
  374. {
  375. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  376. }
  377. if (USART_GetIntStatus(uart->uart_periph, USART_INT_TXDE) != RESET &&
  378. USART_GetFlagStatus(uart->uart_periph, USART_FLAG_TXDE) != RESET)
  379. {
  380. /* Write one byte to the transmit data register */
  381. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
  382. }
  383. }
  384. static const struct rt_uart_ops n32_uart_ops =
  385. {
  386. n32_configure,
  387. n32_control,
  388. n32_putc,
  389. n32_getc,
  390. };
  391. int rt_hw_usart_init(void)
  392. {
  393. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  394. int i;
  395. for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
  396. {
  397. uarts[i].serial->ops = &n32_uart_ops;
  398. uarts[i].serial->config = config;
  399. /* register UART device */
  400. rt_hw_serial_register(uarts[i].serial,
  401. uarts[i].device_name,
  402. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  403. (void *)&uarts[i]);
  404. }
  405. return 0;
  406. }
  407. INIT_BOARD_EXPORT(rt_hw_usart_init);
  408. #endif /* defined(BSP_USING_USARTx) */
  409. #endif /* BSP_USING_SERIAL */