i2c-bit-ops.c 9.9 KB

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  1. /*
  2. * File : i2c-bit-ops.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2012-04-25 weety first version
  13. */
  14. #include <rtdevice.h>
  15. #ifdef RT_I2C_BIT_DEBUG
  16. #define bit_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
  17. #else
  18. #define bit_dbg(fmt, ...)
  19. #endif
  20. #define SET_SDA(ops, val) ops->set_sda(ops->data, val)
  21. #define SET_SCL(ops, val) ops->set_scl(ops->data, val)
  22. #define GET_SDA(ops) ops->get_sda(ops->data)
  23. #define GET_SCL(ops) ops->get_scl(ops->data)
  24. rt_inline void i2c_delay(struct rt_i2c_bit_ops *ops)
  25. {
  26. ops->udelay((ops->delay_us + 1) >> 1);
  27. }
  28. rt_inline void i2c_delay2(struct rt_i2c_bit_ops *ops)
  29. {
  30. ops->udelay(ops->delay_us);
  31. }
  32. #define SDA_L(ops) SET_SDA(ops, 0)
  33. #define SDA_H(ops) SET_SDA(ops, 1)
  34. #define SCL_L(ops) SET_SCL(ops, 0)
  35. /**
  36. * release scl line, and wait scl line to high.
  37. */
  38. static rt_err_t SCL_H(struct rt_i2c_bit_ops *ops)
  39. {
  40. rt_tick_t start;
  41. SET_SCL(ops, 1);
  42. if (!ops->get_scl)
  43. goto done;
  44. start = rt_tick_get();
  45. while (!GET_SCL(ops))
  46. {
  47. if ((rt_tick_get() - start) > ops->timeout)
  48. return -RT_ETIMEOUT;
  49. rt_thread_delay((ops->timeout + 1) >> 1);
  50. }
  51. #ifdef RT_I2C_BIT_DEBUG
  52. if (rt_tick_get() != start)
  53. {
  54. bit_dbg("wait %ld tick for SCL line to go high\n",
  55. rt_tick_get() - start);
  56. }
  57. #endif
  58. done:
  59. i2c_delay(ops);
  60. return RT_EOK;
  61. }
  62. static void i2c_start(struct rt_i2c_bit_ops *ops)
  63. {
  64. #ifdef RT_I2C_BIT_DEBUG
  65. if (ops->get_scl && !GET_SCL(ops))
  66. {
  67. bit_dbg("I2C bus error, SCL line low\n");
  68. }
  69. if (ops->get_sda && !GET_SDA(ops))
  70. {
  71. bit_dbg("I2C bus error, SDA line low\n");
  72. }
  73. #endif
  74. SDA_L(ops);
  75. i2c_delay(ops);
  76. SCL_L(ops);
  77. }
  78. static void i2c_restart(struct rt_i2c_bit_ops *ops)
  79. {
  80. SDA_H(ops);
  81. SCL_H(ops);
  82. i2c_delay(ops);
  83. SDA_L(ops);
  84. i2c_delay(ops);
  85. SCL_L(ops);
  86. }
  87. static void i2c_stop(struct rt_i2c_bit_ops *ops)
  88. {
  89. SDA_L(ops);
  90. i2c_delay(ops);
  91. SCL_H(ops);
  92. i2c_delay(ops);
  93. SDA_H(ops);
  94. i2c_delay2(ops);
  95. }
  96. rt_inline rt_bool_t i2c_waitack(struct rt_i2c_bit_ops *ops)
  97. {
  98. rt_bool_t ack;
  99. SDA_H(ops);
  100. i2c_delay(ops);
  101. if (SCL_H(ops) < 0)
  102. {
  103. bit_dbg("wait ack timeout\n");
  104. return -RT_ETIMEOUT;
  105. }
  106. ack = !GET_SDA(ops); /* ACK : SDA pin is pulled low */
  107. bit_dbg("%s\n", ack ? "ACK" : "NACK");
  108. SCL_L(ops);
  109. return ack;
  110. }
  111. static rt_int32_t i2c_writeb(struct rt_i2c_bus_device *bus, rt_uint8_t data)
  112. {
  113. rt_int32_t i;
  114. rt_uint8_t bit;
  115. struct rt_i2c_bit_ops *ops = bus->priv;
  116. for (i = 7; i >= 0; i--)
  117. {
  118. SCL_L(ops);
  119. bit = (data >> i) & 1;
  120. SET_SDA(ops, bit);
  121. i2c_delay(ops);
  122. if (SCL_H(ops) < 0)
  123. {
  124. bit_dbg("i2c_writeb: 0x%02x, "
  125. "wait scl pin high timeout at bit %d\n",
  126. data, i);
  127. return -RT_ETIMEOUT;
  128. }
  129. }
  130. SCL_L(ops);
  131. i2c_delay(ops);
  132. return i2c_waitack(ops);
  133. }
  134. static rt_int32_t i2c_readb(struct rt_i2c_bus_device *bus)
  135. {
  136. rt_uint8_t i;
  137. rt_uint8_t data = 0;
  138. struct rt_i2c_bit_ops *ops = bus->priv;
  139. SDA_H(ops);
  140. i2c_delay(ops);
  141. for (i = 0; i < 8; i++)
  142. {
  143. data <<= 1;
  144. if (SCL_H(ops) < 0)
  145. {
  146. bit_dbg("i2c_readb: wait scl pin high "
  147. "timeout at bit %d\n", 7 - i);
  148. return -RT_ETIMEOUT;
  149. }
  150. if (GET_SDA(ops))
  151. data |= 1;
  152. SCL_L(ops);
  153. i2c_delay2(ops);
  154. }
  155. return data;
  156. }
  157. static rt_size_t i2c_send_bytes(struct rt_i2c_bus_device *bus,
  158. struct rt_i2c_msg *msg)
  159. {
  160. rt_int32_t ret;
  161. rt_size_t bytes = 0;
  162. const rt_uint8_t *ptr = msg->buf;
  163. rt_int32_t count = msg->len;
  164. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  165. while (count > 0)
  166. {
  167. ret = i2c_writeb(bus, *ptr);
  168. if ((ret > 0) || (ignore_nack && (ret == 0)))
  169. {
  170. count --;
  171. ptr ++;
  172. bytes ++;
  173. }
  174. else if (ret == 0)
  175. {
  176. i2c_dbg("send bytes: NACK.\n");
  177. return 0;
  178. }
  179. else
  180. {
  181. i2c_dbg("send bytes: error %d\n", ret);
  182. return ret;
  183. }
  184. }
  185. return bytes;
  186. }
  187. static rt_err_t i2c_send_ack_or_nack(struct rt_i2c_bus_device *bus, int ack)
  188. {
  189. struct rt_i2c_bit_ops *ops = bus->priv;
  190. if (ack)
  191. SET_SDA(ops, 0);
  192. i2c_delay(ops);
  193. if (SCL_H(ops) < 0)
  194. {
  195. bit_dbg("ACK or NACK timeout\n");
  196. return -RT_ETIMEOUT;
  197. }
  198. SCL_L(ops);
  199. return RT_EOK;
  200. }
  201. static rt_size_t i2c_recv_bytes(struct rt_i2c_bus_device *bus,
  202. struct rt_i2c_msg *msg)
  203. {
  204. rt_int32_t val;
  205. rt_int32_t bytes = 0; /* actual bytes */
  206. rt_uint8_t *ptr = msg->buf;
  207. rt_int32_t count = msg->len;
  208. const rt_uint32_t flags = msg->flags;
  209. while (count > 0)
  210. {
  211. val = i2c_readb(bus);
  212. if (val >= 0)
  213. {
  214. *ptr = val;
  215. bytes ++;
  216. }
  217. else
  218. {
  219. break;
  220. }
  221. ptr ++;
  222. count --;
  223. bit_dbg("recieve bytes: 0x%02x, %s\n",
  224. val, (flags & RT_I2C_NO_READ_ACK) ?
  225. "(No ACK/NACK)" : (count ? "ACK" : "NACK"));
  226. if (!(flags & RT_I2C_NO_READ_ACK))
  227. {
  228. val = i2c_send_ack_or_nack(bus, count);
  229. if (val < 0)
  230. return val;
  231. }
  232. }
  233. return bytes;
  234. }
  235. static rt_int32_t i2c_send_address(struct rt_i2c_bus_device *bus,
  236. rt_uint8_t addr,
  237. rt_int32_t retries)
  238. {
  239. struct rt_i2c_bit_ops *ops = bus->priv;
  240. rt_int32_t i;
  241. rt_err_t ret = 0;
  242. for (i = 0; i <= retries; i++)
  243. {
  244. ret = i2c_writeb(bus, addr);
  245. if (ret == 1 || i == retries)
  246. break;
  247. bit_dbg("send stop condition\n");
  248. i2c_stop(ops);
  249. i2c_delay2(ops);
  250. bit_dbg("send start condition\n");
  251. i2c_start(ops);
  252. }
  253. return ret;
  254. }
  255. static rt_err_t i2c_bit_send_address(struct rt_i2c_bus_device *bus,
  256. struct rt_i2c_msg *msg)
  257. {
  258. rt_uint16_t flags = msg->flags;
  259. rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  260. struct rt_i2c_bit_ops *ops = bus->priv;
  261. rt_uint8_t addr1, addr2;
  262. rt_int32_t retries;
  263. rt_err_t ret;
  264. retries = ignore_nack ? 0 : bus->retries;
  265. if (flags & RT_I2C_ADDR_10BIT)
  266. {
  267. addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
  268. addr2 = msg->addr & 0xff;
  269. bit_dbg("addr1: %d, addr2: %d\n", addr1, addr2);
  270. ret = i2c_send_address(bus, addr1, retries);
  271. if ((ret != 1) && !ignore_nack)
  272. {
  273. bit_dbg("NACK: sending first addr\n");
  274. return -RT_EIO;
  275. }
  276. ret = i2c_writeb(bus, addr2);
  277. if ((ret != 1) && !ignore_nack)
  278. {
  279. bit_dbg("NACK: sending second addr\n");
  280. return -RT_EIO;
  281. }
  282. if (flags & RT_I2C_RD)
  283. {
  284. bit_dbg("send repeated start condition\n");
  285. i2c_restart(ops);
  286. addr1 |= 0x01;
  287. ret = i2c_send_address(bus, addr1, retries);
  288. if ((ret != 1) && !ignore_nack)
  289. {
  290. bit_dbg("NACK: sending repeated addr\n");
  291. return -RT_EIO;
  292. }
  293. }
  294. }
  295. else
  296. {
  297. /* 7-bit addr */
  298. addr1 = msg->addr << 1;
  299. if (flags & RT_I2C_RD)
  300. addr1 |= 1;
  301. ret = i2c_send_address(bus, addr1, retries);
  302. if ((ret != 1) && !ignore_nack)
  303. return -RT_EIO;
  304. }
  305. return RT_EOK;
  306. }
  307. static rt_size_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
  308. struct rt_i2c_msg msgs[],
  309. rt_uint32_t num)
  310. {
  311. struct rt_i2c_msg *msg;
  312. struct rt_i2c_bit_ops *ops = bus->priv;
  313. rt_int32_t i, ret;
  314. rt_uint16_t ignore_nack;
  315. bit_dbg("send start condition\n");
  316. i2c_start(ops);
  317. for (i = 0; i < num; i++)
  318. {
  319. msg = &msgs[i];
  320. ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
  321. if (!(msg->flags & RT_I2C_NO_START))
  322. {
  323. if (i)
  324. {
  325. i2c_restart(ops);
  326. }
  327. ret = i2c_bit_send_address(bus, msg);
  328. if ((ret != RT_EOK) && !ignore_nack)
  329. {
  330. bit_dbg("receive NACK from device addr 0x%02x msg %d\n",
  331. msgs[i].addr, i);
  332. goto out;
  333. }
  334. }
  335. if (msg->flags & RT_I2C_RD)
  336. {
  337. ret = i2c_recv_bytes(bus, msg);
  338. if (ret >= 1)
  339. bit_dbg("read %d byte%s\n", ret, ret == 1 ? "" : "s");
  340. if (ret < msg->len)
  341. {
  342. if (ret >= 0)
  343. ret = -RT_EIO;
  344. goto out;
  345. }
  346. }
  347. else
  348. {
  349. ret = i2c_send_bytes(bus, msg);
  350. if (ret >= 1)
  351. bit_dbg("write %d byte%s\n", ret, ret == 1 ? "" : "s");
  352. if (ret < msg->len)
  353. {
  354. if (ret >= 0)
  355. ret = -RT_ERROR;
  356. goto out;
  357. }
  358. }
  359. }
  360. ret = i;
  361. out:
  362. bit_dbg("send stop condition\n");
  363. i2c_stop(ops);
  364. return ret;
  365. }
  366. static const struct rt_i2c_bus_device_ops i2c_bit_bus_ops =
  367. {
  368. i2c_bit_xfer,
  369. RT_NULL,
  370. RT_NULL
  371. };
  372. rt_err_t rt_i2c_bit_add_bus(struct rt_i2c_bus_device *bus,
  373. const char *bus_name)
  374. {
  375. struct rt_i2c_bit_ops *bit_ops = bus->priv;
  376. RT_ASSERT(bit_ops != RT_NULL);
  377. bus->ops = &i2c_bit_bus_ops;
  378. return rt_i2c_bus_device_register(bus, bus_name);
  379. }