usart.c 8.3 KB

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  1. /*
  2. * File : usart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2017-07-28 Tanek the first version
  13. */
  14. #include <rtthread.h>
  15. #include "usart.h"
  16. #include "peri_driver.h"
  17. #ifdef RT_USING_UART
  18. #ifdef RT_USING_DEVICE
  19. #include <rtdevice.h>
  20. #endif
  21. #define UART_RX_BUFSZ 8
  22. /* LPC8XX uart driver */
  23. struct lpc8xx_uart
  24. {
  25. struct rt_device parent;
  26. struct rt_ringbuffer rx_rb;
  27. LPC_USART_T * uart_base;
  28. IRQn_Type uart_irq;
  29. rt_uint8_t rx_buffer[UART_RX_BUFSZ];
  30. };
  31. #ifdef RT_USING_UART0
  32. struct lpc8xx_uart uart0_device;
  33. #endif
  34. #ifdef RT_USING_UART1
  35. struct lpc8xx_uart uart1_device;
  36. #endif
  37. #ifdef RT_USING_UART2
  38. struct lpc8xx_uart uart2_device;
  39. #endif
  40. void uart_irq_handler(struct lpc8xx_uart* uart)
  41. {
  42. uint32_t status;
  43. /* enter interrupt */
  44. rt_interrupt_enter();
  45. status = Chip_UART_GetStatus(uart->uart_base);
  46. if(status & UART_STAT_RXRDY) // RXIRQ
  47. {
  48. rt_ringbuffer_putchar_force(&(uart->rx_rb), (rt_uint8_t)Chip_UART_ReadByte(uart->uart_base));
  49. /* invoke callback */
  50. if(uart->parent.rx_indicate != RT_NULL)
  51. {
  52. uart->parent.rx_indicate(&uart->parent, rt_ringbuffer_data_len(&uart->rx_rb));
  53. }
  54. }
  55. /* leave interrupt */
  56. rt_interrupt_leave();
  57. }
  58. #ifdef RT_USING_UART0
  59. void UART0_IRQHandler(void)
  60. {
  61. uart_irq_handler(&uart0_device);
  62. }
  63. #endif
  64. #ifdef RT_USING_UART1
  65. void UART1_IRQHandler(void)
  66. {
  67. uart_irq_handler(&uart1_device);
  68. }
  69. #endif
  70. #ifdef RT_USING_UART2
  71. void UART2_IRQHandler(void)
  72. {
  73. uart_irq_handler(&uart2_device);
  74. }
  75. #endif
  76. static void uart1_io_init(LPC_USART_T * uart_base)
  77. {
  78. /* Enable the clock to the Switch Matrix */
  79. Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
  80. Chip_Clock_SetUARTClockDiv(1);
  81. #ifdef RT_USING_UART0
  82. if (uart_base == LPC_USART0)
  83. {
  84. Chip_SWM_MovablePinAssign(SWM_U0_TXD_O, 4);
  85. Chip_SWM_MovablePinAssign(SWM_U0_RXD_I, 0);
  86. }
  87. else
  88. #endif
  89. #ifdef RT_USING_UART1
  90. if (uart_base == LPC_USART1)
  91. {
  92. Chip_SWM_MovablePinAssign(SWM_U1_TXD_O, 4);
  93. Chip_SWM_MovablePinAssign(SWM_U1_RXD_I, 0);
  94. }
  95. else
  96. #endif
  97. #ifdef RT_USING_UART2
  98. if (uart_base == LPC_USART2)
  99. {
  100. Chip_SWM_MovablePinAssign(SWM_U2_TXD_O, 4);
  101. Chip_SWM_MovablePinAssign(SWM_U2_RXD_I, 0);
  102. }
  103. else
  104. #endif
  105. {
  106. RT_ASSERT((uart_base == USART0) || (uart_base == USART2) || (uart_base == USART2));
  107. }
  108. /* Disable the clock to the Switch Matrix to save power */
  109. Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);
  110. }
  111. static void uart_ll_init(LPC_USART_T * uart)
  112. {
  113. Chip_UART_Init(uart);
  114. Chip_UART_ConfigData(uart, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
  115. Chip_Clock_SetUSARTNBaseClockRate((115200 * 6 * 16), true);
  116. Chip_UART_SetBaud(uart, 115200);
  117. Chip_UART_Enable(uart);
  118. Chip_UART_TXEnable(uart);
  119. // we must NOT enable TX ready/idle IRQ before we want to write data
  120. // otherwise the IRQs will happen as soon as Uart IRQ is enabled in NVIC
  121. Chip_UART_IntDisable(uart, UART_INTEN_TXRDY | UART_INTEN_TXIDLE);
  122. Chip_UART_IntEnable(uart, UART_INTEN_RXRDY);
  123. }
  124. static rt_err_t rt_uart_init (rt_device_t dev)
  125. {
  126. struct lpc8xx_uart* uart;
  127. RT_ASSERT(dev != RT_NULL);
  128. uart = (struct lpc8xx_uart *)dev;
  129. uart1_io_init(uart->uart_base);
  130. uart_ll_init(uart->uart_base);
  131. return RT_EOK;
  132. }
  133. static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
  134. {
  135. struct lpc8xx_uart* uart;
  136. RT_ASSERT(dev != RT_NULL);
  137. uart = (struct lpc8xx_uart *)dev;
  138. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  139. {
  140. /* Enable the UART Interrupt */
  141. NVIC_EnableIRQ(uart->uart_irq);
  142. }
  143. return RT_EOK;
  144. }
  145. static rt_err_t rt_uart_close(rt_device_t dev)
  146. {
  147. struct lpc8xx_uart* uart;
  148. RT_ASSERT(dev != RT_NULL);
  149. uart = (struct lpc8xx_uart *)dev;
  150. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  151. {
  152. /* Disable the UART Interrupt */
  153. NVIC_DisableIRQ(uart->uart_irq);
  154. }
  155. return RT_EOK;
  156. }
  157. static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  158. {
  159. /* interrupt receive */
  160. rt_base_t level;
  161. rt_size_t length;
  162. struct lpc8xx_uart* uart;
  163. RT_ASSERT(serial != RT_NULL);
  164. uart = (struct lpc8xx_uart *)dev;
  165. RT_ASSERT(uart != RT_NULL);
  166. /* disable interrupt */
  167. level = rt_hw_interrupt_disable();
  168. length = rt_ringbuffer_get(&(uart->rx_rb), buffer, size);
  169. /* enable interrupt */
  170. rt_hw_interrupt_enable(level);
  171. return length;
  172. }
  173. static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  174. {
  175. char *ptr = (char*) buffer;
  176. struct lpc8xx_uart* uart;
  177. RT_ASSERT(serial != RT_NULL);
  178. uart = (struct lpc8xx_uart *)dev;
  179. if (dev->open_flag & RT_DEVICE_FLAG_STREAM)
  180. {
  181. /* stream mode */
  182. while (size)
  183. {
  184. if (*ptr == '\n')
  185. {
  186. while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
  187. Chip_UART_SendByte(uart->uart_base, '\r');
  188. }
  189. while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
  190. Chip_UART_SendByte(uart->uart_base, *ptr);
  191. ptr ++;
  192. size --;
  193. }
  194. }
  195. else
  196. {
  197. while (size)
  198. {
  199. while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
  200. Chip_UART_SendByte(uart->uart_base, *ptr);
  201. ptr++;
  202. size--;
  203. }
  204. }
  205. return (rt_size_t) ptr - (rt_size_t) buffer;
  206. }
  207. int rt_hw_usart_init(void)
  208. {
  209. #ifdef RT_USING_UART0
  210. {
  211. struct lpc8xx_uart* uart;
  212. /* get uart device */
  213. uart = &uart1_device;
  214. /* device initialization */
  215. uart->parent.type = RT_Device_Class_Char;
  216. uart->uart_base = LPC_USART0;
  217. uart->uart_irq = UART0_IRQn;
  218. rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
  219. /* device interface */
  220. uart->parent.init = rt_uart_init;
  221. uart->parent.open = rt_uart_open;
  222. uart->parent.close = rt_uart_close;
  223. uart->parent.read = rt_uart_read;
  224. uart->parent.write = rt_uart_write;
  225. uart->parent.control = RT_NULL;
  226. uart->parent.user_data = RT_NULL;
  227. rt_device_register(&uart->parent, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  228. }
  229. #endif
  230. #ifdef RT_USING_UART1
  231. {
  232. struct lpc8xx_uart* uart;
  233. /* get uart device */
  234. uart = &uart1_device;
  235. /* device initialization */
  236. uart->parent.type = RT_Device_Class_Char;
  237. uart->uart_base = LPC_USART1;
  238. uart->uart_irq = UART1_IRQn;
  239. rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
  240. /* device interface */
  241. uart->parent.init = rt_uart_init;
  242. uart->parent.open = rt_uart_open;
  243. uart->parent.close = rt_uart_close;
  244. uart->parent.read = rt_uart_read;
  245. uart->parent.write = rt_uart_write;
  246. uart->parent.control = RT_NULL;
  247. uart->parent.user_data = RT_NULL;
  248. rt_device_register(&uart->parent, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  249. }
  250. #endif
  251. #ifdef RT_USING_UART2
  252. {
  253. struct lpc8xx_uart* uart;
  254. /* get uart device */
  255. uart = &uart2_device;
  256. /* device initialization */
  257. uart->parent.type = RT_Device_Class_Char;
  258. uart->uart_base = LPC_USART1;
  259. uart->uart_irq = UART2_IRQn;
  260. rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
  261. /* device interface */
  262. uart->parent.init = rt_uart_init;
  263. uart->parent.open = rt_uart_open;
  264. uart->parent.close = rt_uart_close;
  265. uart->parent.read = rt_uart_read;
  266. uart->parent.write = rt_uart_write;
  267. uart->parent.control = RT_NULL;
  268. uart->parent.user_data = RT_NULL;
  269. rt_device_register(&uart->parent, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  270. }
  271. #endif /* RT_USING_UART2 */
  272. return 0;
  273. }
  274. INIT_BOARD_EXPORT(rt_hw_usart_init);
  275. #endif /*RT_USING_UART*/