board.c 9.3 KB

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  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-08-23 Bernard first implementation
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include "stm32f10x.h"
  17. #include "board.h"
  18. struct rt_semaphore spi1_lock;
  19. /**
  20. * @addtogroup STM32
  21. */
  22. /*@{*/
  23. /*******************************************************************************
  24. * Function Name : NVIC_Configuration
  25. * Description : Configures Vector Table base location.
  26. * Input : None
  27. * Output : None
  28. * Return : None
  29. *******************************************************************************/
  30. void NVIC_Configuration(void)
  31. {
  32. #ifdef VECT_TAB_RAM
  33. /* Set the Vector Table base location at 0x20000000 */
  34. NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
  35. #else /* VECT_TAB_FLASH */
  36. /* Set the Vector Table base location at 0x08000000 */
  37. NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
  38. #endif
  39. /*
  40. * set priority group:
  41. * 2 bits for pre-emption priority
  42. * 2 bits for subpriority
  43. */
  44. NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
  45. }
  46. extern void rt_hw_interrupt_thread_switch(void);
  47. /**
  48. * This is the timer interrupt service routine.
  49. *
  50. */
  51. void rt_hw_timer_handler(void)
  52. {
  53. /* enter interrupt */
  54. rt_interrupt_enter();
  55. rt_tick_increase();
  56. /* leave interrupt */
  57. rt_interrupt_leave();
  58. }
  59. /* NAND Flash */
  60. #include "fsmc_nand.h"
  61. static void all_device_reset(void)
  62. {
  63. /* RESET */
  64. /* DM9000A PE5 */
  65. /* LCD PF10 */
  66. /* SPI-FLASH PA3 */
  67. /* CS */
  68. /* DM9000A FSMC_NE4 PG12 */
  69. /* LCD FSMC_NE2 PG9 */
  70. /* SPI_FLASH PA4 */
  71. /* CODEC PC5 */
  72. /* TOUCH PC4 */
  73. GPIO_InitTypeDef GPIO_InitStructure;
  74. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOE
  75. | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG,ENABLE);
  76. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  77. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
  78. /* SDIO POWER */
  79. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  80. GPIO_Init(GPIOC,&GPIO_InitStructure);
  81. GPIO_SetBits(GPIOC,GPIO_Pin_6); /* SD card power down */
  82. /* SPI_FLASH CS */
  83. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
  84. GPIO_Init(GPIOA,&GPIO_InitStructure);
  85. GPIO_SetBits(GPIOA,GPIO_Pin_4);
  86. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
  87. /* CODEC && TOUCH CS */
  88. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
  89. GPIO_Init(GPIOC,&GPIO_InitStructure);
  90. GPIO_SetBits(GPIOC,GPIO_Pin_4 | GPIO_Pin_5);
  91. /* DM9000A RESET */
  92. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
  93. GPIO_Init(GPIOE,&GPIO_InitStructure);
  94. GPIO_ResetBits(GPIOE,GPIO_Pin_5);
  95. /* LCD RESET */
  96. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  97. GPIO_Init(GPIOF,&GPIO_InitStructure);
  98. GPIO_ResetBits(GPIOF,GPIO_Pin_10);
  99. /* SPI_FLASH RESET */
  100. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
  101. GPIO_Init(GPIOA,&GPIO_InitStructure);
  102. GPIO_ResetBits(GPIOA,GPIO_Pin_3);
  103. /* FSMC GPIO configure */
  104. {
  105. GPIO_InitTypeDef GPIO_InitStructure;
  106. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF
  107. | RCC_APB2Periph_GPIOG, ENABLE);
  108. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  109. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  110. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  111. /*
  112. FSMC_D0 ~ FSMC_D3
  113. PD14 FSMC_D0 PD15 FSMC_D1 PD0 FSMC_D2 PD1 FSMC_D3
  114. */
  115. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15;
  116. GPIO_Init(GPIOD,&GPIO_InitStructure);
  117. /*
  118. FSMC_D4 ~ FSMC_D12
  119. PE7 ~ PE15 FSMC_D4 ~ FSMC_D12
  120. */
  121. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
  122. | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  123. GPIO_Init(GPIOE,&GPIO_InitStructure);
  124. /* FSMC_D13 ~ FSMC_D15 PD8 ~ PD10 */
  125. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
  126. GPIO_Init(GPIOD,&GPIO_InitStructure);
  127. /*
  128. FSMC_A0 ~ FSMC_A5 FSMC_A6 ~ FSMC_A9
  129. PF0 ~ PF5 PF12 ~ PF15
  130. */
  131. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3
  132. | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  133. GPIO_Init(GPIOF,&GPIO_InitStructure);
  134. /* FSMC_A10 ~ FSMC_A15 PG0 ~ PG5 */
  135. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
  136. GPIO_Init(GPIOG,&GPIO_InitStructure);
  137. /* FSMC_A16 ~ FSMC_A18 PD11 ~ PD13 */
  138. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
  139. GPIO_Init(GPIOD,&GPIO_InitStructure);
  140. /* RD-PD4 WR-PD5 */
  141. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
  142. GPIO_Init(GPIOD,&GPIO_InitStructure);
  143. /* NBL0-PE0 NBL1-PE1 */
  144. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
  145. GPIO_Init(GPIOE,&GPIO_InitStructure);
  146. /* NE1/NCE2 */
  147. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
  148. GPIO_Init(GPIOD,&GPIO_InitStructure);
  149. /* NE2 */
  150. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
  151. GPIO_Init(GPIOG,&GPIO_InitStructure);
  152. /* NE3 */
  153. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  154. GPIO_Init(GPIOG,&GPIO_InitStructure);
  155. /* NE4 */
  156. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
  157. GPIO_Init(GPIOG,&GPIO_InitStructure);
  158. }
  159. /* FSMC GPIO configure */
  160. GPIO_SetBits(GPIOE,GPIO_Pin_5); /* DM9000A */
  161. GPIO_SetBits(GPIOF,GPIO_Pin_10); /* LCD */
  162. GPIO_SetBits(GPIOA,GPIO_Pin_3); /* SPI_FLASH */
  163. }
  164. /**
  165. * This function will initial STM32 Radio board.
  166. */
  167. extern void FSMC_SRAM_Init(void);
  168. void rt_hw_board_init()
  169. {
  170. //NAND_IDTypeDef NAND_ID;
  171. /* Configure the system clocks */
  172. SystemInit();
  173. all_device_reset();
  174. /* NVIC Configuration */
  175. NVIC_Configuration();
  176. /* Configure the SysTick */
  177. SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
  178. /* Console Initialization*/
  179. rt_hw_usart_init();
  180. rt_console_set_device("uart1");
  181. rt_kprintf("\r\n\r\nSystemInit......\r\n");
  182. /* SRAM init */
  183. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  184. FSMC_SRAM_Init();
  185. /* memtest */
  186. {
  187. unsigned char * p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
  188. unsigned int temp;
  189. rt_kprintf("\r\nmem testing....");
  190. for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
  191. {
  192. *p_extram++ = (unsigned char)temp;
  193. }
  194. p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
  195. for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
  196. {
  197. if( *p_extram++ != (unsigned char)temp )
  198. {
  199. rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);
  200. while(1);
  201. }
  202. }
  203. rt_kprintf("\rmem test pass!!\r\n");
  204. }/* memtest */
  205. /* SPI1 config */
  206. {
  207. GPIO_InitTypeDef GPIO_InitStructure;
  208. SPI_InitTypeDef SPI_InitStructure;
  209. /* Enable SPI1 Periph clock */
  210. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
  211. | RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
  212. ENABLE);
  213. /* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
  214. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
  215. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  216. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  217. GPIO_Init(GPIOA, &GPIO_InitStructure);
  218. /*------------------------ SPI1 configuration ------------------------*/
  219. SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
  220. SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  221. SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  222. SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
  223. SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
  224. SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  225. SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;/* 72M/64=1.125M */
  226. SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  227. SPI_InitStructure.SPI_CRCPolynomial = 7;
  228. SPI_I2S_DeInit(SPI1);
  229. SPI_Init(SPI1, &SPI_InitStructure);
  230. /* Enable SPI_MASTER */
  231. SPI_Cmd(SPI1, ENABLE);
  232. SPI_CalculateCRC(SPI1, DISABLE);
  233. if (rt_sem_init(&spi1_lock, "spi1lock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  234. {
  235. rt_kprintf("init spi1 lock semaphore failed\n");
  236. }
  237. }
  238. }/* rt_hw_board_init */
  239. /*@}*/